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[/] [amber/] [trunk/] [hw/] [tests/] [strb.S] - Rev 30
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/*****************************************************************// //// Amber 2 Core Instruction Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests str and strb with different indexing modes. //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:/* Store single Byte */ldr r0, StoreBaseadd r0, r0, #4mov r4, #0str r4, [r0]ldr r1, Data1strb r1, [r0]and r3, r1, #0xffldr r2, [r0]cmp r3, r2movne r10, #10 @ error numberbne testfail/* Store Byte at address 1, 2 and 3 */ldr r0, StoreBaseadd r0, r0, #8mov r4, #0@ start by writing a word of 0 to the memory locationstr r4, [r0], #1ldr r1, Data1@ then store byte 0 in r1 to 3 positions@ in the memory locationstrb r1, [r0], #1strb r1, [r0], #1strb r1, [r0], #1@ load back the memory location and check its contentsldr r0, StoreBaseldr r2, [r0, #8]ldr r3, Data3cmp r2, r3movne r10, #20 @ error numberbne testfail/* Reverse order of bytes */@ read in Data1 and store it out to@ StoreBase + 12, reversing the order@ of the bytesldr r2, StoreBaseadd r2, r2, #12ldr r1, Data1@ store byte 3mov r1, r1, ror #24strb r1, [r2], #1@ store byte 2mov r1, r1, ror #24strb r1, [r2], #1@ store byte 1mov r1, r1, ror #24strb r1, [r2], #1@ store byte 0mov r1, r1, ror #24strb r1, [r2], #1ldr r2, StoreBaseadd r2, r2, #12ldr r3, [r2]ldr r4, Data4cmp r3, r4movne r10, #30bne testfail/* Store word */ldr r0, StoreBaseldr r1, Data1str r1, [r0]ldr r2, [r0]cmp r1, r2movne r10, #50 @ error numberbne testfail@ ------------------------------------------@ ------------------------------------------b testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpass/* Write 17 to this address to generate a Test Passed message */AdrTestStatus: .word ADR_AMBER_TEST_STATUSAdrData1: .word Data1AdrData2: .word Data2StoreBase: .word 0x800Data1: .word 0x12345678Data2: .word 0xffccbbaaData3: .word 0x78787800Data4: .word 0x78563412/* ========================================================================= *//* ========================================================================= */
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