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/*****************************************************************// //// Amber 2 Core Instruction Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests add with carry //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h"#include "amber_macros.h".section .text.globl mainmain:// sets all four flags// Cant use p version of instrustion in 32-bit CPU because it writes the upper 4 bits of PCteqp pc, #0xf0000000//// Check that they are setbvc testfail // V flagbpl testfail // N flagbne testfail // Z flagbcc testfail // C flagmov r1, #0// should not unset the V flag valuetst r1, #0// Check the V flag and Z flag are still set, the C flag// is set to the carry out, and the N flag gets clearedbvc testfailbne testfailbcc testfailbmi testfail// Test "Strange issue with r12 after TEQLSP"mov r1, #0x1mov r2, #0x1mov r8, #0mov r6, #10mov r10, #13mov r12, #100nopadd r6, r6,#1cmp r6, r8ldrls r3, [r9,r6,lsl #2]movls r4, r11movhi r3, #0teqp r1, r2 // r1 XOR r2 = 0x1 -> sets the mode bits of the PC to 1mov r12, r6 // normal r12 or FIRQ r12 ?// test if carry flag correctly set// set the carry upmov r1, #0xffffffffadds r1, r1, #1// do the testmov r1, #0x00800000tst r1, #0x00ff0000movcc r0, #0movcs r0, #1// test carry flagmov r0, #2mov r1, #1mov r3, #0x930cmp r0, #1mov r1, r3tst r1, #0x10bcc testfailbcc testfailbcc testfail// clears all four flags// Cant use p version of instrustion in 32-bit CPU because it writes the upper 4 bits of PCteqp pc, #0x00000000mov r0, #2mov r1, #1mov r3, #0x930// next instruction sets the carry flag// compare subtracts a 1 from the r0 value of 2// means 2's compliment of '1' gets added to '2', so the carry bit is setcmp r0, #1mov r1, r3// leaves carry flag at previous valuetst r1, #0x10bcc testfailb testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpassAdrTestStatus: .word ADR_AMBER_TEST_STATUS