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https://opencores.org/ocsvn/hd44780_driver/hd44780_driver/trunk
Subversion Repositories hd44780_driver
[/] [hd44780_driver/] [trunk/] [lcd_driver_hd44780.sdc] - Rev 5
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## Generated SDC file "lcd_driver_hd44780.sdc"## Copyright (C) 1991-2011 Altera Corporation## Your use of Altera Corporation's design tools, logic functions## and other software and tools, and its AMPP partner logic## functions, and any output files from any of the foregoing## (including device programming or simulation files), and any## associated documentation or information are expressly subject## to the terms and conditions of the Altera Program License## Subscription Agreement, Altera MegaCore Function License## Agreement, or other applicable license agreement, including,## without limitation, that your use is for the sole purpose of## programming logic devices manufactured by Altera and sold by## Altera or its authorized distributors. Please refer to the## applicable agreement for further details.## VENDOR "Altera"## PROGRAM "Quartus II"## VERSION "Version 11.1 Build 216 11/23/2011 Service Pack 1 SJ Web Edition"## DATE "Thu Oct 11 15:50:30 2012"#### DEVICE "EP3C16F484C6"###**************************************************************# Time Information#**************************************************************set_time_format -unit ns -decimal_places 3#**************************************************************# Create Clock#**************************************************************create_clock -name {CLOCK_50} -period 20.000 -waveform { 0.000 10.000 } [get_ports {CLOCK_50}]#**************************************************************# Create Generated Clock#**************************************************************#**************************************************************# Set Clock Latency#**************************************************************#**************************************************************# Set Clock Uncertainty#**************************************************************#set_clock_uncertainty -rise_from [get_keepers {prescaler:pres|clkint}] -rise_to [get_keepers {prescaler:pres|clkint}] 0.020#set_clock_uncertainty -rise_from [get_keepers {prescaler:pres|clkint}] -fall_to [get_keepers {prescaler:pres|clkint}] 0.020#set_clock_uncertainty -fall_from [get_keepers {prescaler:pres|clkint}] -rise_to [get_keepers {prescaler:pres|clkint}] 0.020#set_clock_uncertainty -fall_from [get_keepers {prescaler:pres|clkint}] -fall_to [get_keepers {prescaler:pres|clkint}] 0.020set_clock_uncertainty -rise_from [get_clocks {CLOCK_50}] -rise_to [get_clocks {CLOCK_50}] 0.020set_clock_uncertainty -rise_from [get_clocks {CLOCK_50}] -fall_to [get_clocks {CLOCK_50}] 0.020set_clock_uncertainty -fall_from [get_clocks {CLOCK_50}] -rise_to [get_clocks {CLOCK_50}] 0.020set_clock_uncertainty -fall_from [get_clocks {CLOCK_50}] -fall_to [get_clocks {CLOCK_50}] 0.020#**************************************************************# Set Input Delay#**************************************************************#**************************************************************# Set Output Delay#**************************************************************#**************************************************************# Set Clock Groups#**************************************************************#**************************************************************# Set False Path#**************************************************************#**************************************************************# Set Multicycle Path#**************************************************************#**************************************************************# Set Maximum Delay#**************************************************************#**************************************************************# Set Minimum Delay#**************************************************************#**************************************************************# Set Input Transition#**************************************************************
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