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Subversion Repositories next186_soc_pc

[/] [next186_soc_pc/] [trunk/] [HW/] [ipcore_dir/] [coregen.cgp] - Rev 2

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SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
SET device = xc3s700an
SET devicefamily = spartan3a
SET flowvendor = Other
SET package = fgg484
SET speedgrade = -4
SET verilogsim = true
SET vhdlsim = false

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