Subversion Repositories robust_axi2apb

<##//////////////////////////////////////////////////////////////////
////                                                             ////
////  Author: Eyal Hochberg                                      ////
////          eyal@provartec.com                                 ////
////                                                             ////
////  Downloaded from: http://www.opencores.org                  ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2010 Provartec LTD                            ////
//// www.provartec.com                                           ////
//// info@provartec.com                                          ////
////                                                             ////
//// This source file may be used and distributed without        ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
////                                                             ////
//// This source file is free software; you can redistribute it  ////
//// and/or modify it under the terms of the GNU Lesser General  ////
//// Public License as published by the Free Software Foundation.////
////                                                             ////
//// This source is distributed in the hope that it will be      ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
//// PURPOSE.  See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html              ////
////                                                             ////
//////////////////////////////////////////////////////////////////##>

SWAP.GLOBAL  MODEL_NAME  AXI2APB bridge

SWAP      SLV_BITS    LOG2(EXPR(SLAVE_NUM+1)) ##one more for decerr slave

LOOP      SX          SLAVE_NUM

GROUP APB3 is {
    psel     1                      output
    penable  1                      output
    pwrite   1                      output
    paddr    ADDR_BITS              output
    pwdata   32                     output
    prdata   32                     input
    pslverr  1                      input
    pready   1                      input
}

GROUP APB_AXI_A is {
    ID       ID_BITS                input
    ADDR     ADDR_BITS              input
    LEN      4                      input
    SIZE     2                      input
    VALID    1                      input
    READY    1                      output
}

GROUP APB_AXI_W is {
    ID        ID_BITS                input
    DATA      32                     input
    STRB      4                      input
    LAST      1                      input
    VALID     1                      input
    READY     1                      output
}

GROUP APB_AXI_B is {
    ID        ID_BITS                output
    RESP      2                      output
    VALID     1                      output
    READY     1                      input
}

GROUP APB_AXI_R is {
    ID        ID_BITS                output
    DATA      32                     output
    RESP      2                      output
    LAST      1                      output
    VALID     1                      output
    READY     1                      input
}

GROUP APB_AXI joins {
    GROUP APB_AXI_A prefix_AW
    GROUP APB_AXI_W prefix_W
    GROUP APB_AXI_B prefix_B
    GROUP APB_AXI_A prefix_AR
    GROUP APB_AXI_R prefix_R
}