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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [db/] [spw_fifo_ulight.hier_info] - Rev 40
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|SPW_ULIGHT_FIFOFPGA_CLK1_50 => FPGA_CLK1_50.IN2KEY[0] => ~NO_FANOUT~KEY[1] => KEY[1].IN1din_a => din_a.IN1sin_a => sin_a.IN1dout_a << dout_a.DB_MAX_OUTPUT_PORT_TYPEsout_a << sout_a.DB_MAX_OUTPUT_PORT_TYPELED[0] << ulight_fifo:u0.led_pio_test_external_connection_exportLED[1] << ulight_fifo:u0.led_pio_test_external_connection_exportLED[2] << ulight_fifo:u0.led_pio_test_external_connection_exportLED[3] << ulight_fifo:u0.led_pio_test_external_connection_exportLED[4] << ulight_fifo:u0.led_pio_test_external_connection_exportLED[5] << debounce_db:db_system_spwulight_b.PB_downLED[6] << <GND>LED[7] << pll_tx_locked_export.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0auto_start_external_connection_export <= ulight_fifo_auto_start:auto_start.out_portclk_clk => clk_clk.IN27clock_sel_external_connection_export[0] <= ulight_fifo_clock_sel:clock_sel.out_portclock_sel_external_connection_export[1] <= ulight_fifo_clock_sel:clock_sel.out_portclock_sel_external_connection_export[2] <= ulight_fifo_clock_sel:clock_sel.out_portcounter_rx_fifo_external_connection_export[0] => counter_rx_fifo_external_connection_export[0].IN1counter_rx_fifo_external_connection_export[1] => counter_rx_fifo_external_connection_export[1].IN1counter_rx_fifo_external_connection_export[2] => counter_rx_fifo_external_connection_export[2].IN1counter_rx_fifo_external_connection_export[3] => counter_rx_fifo_external_connection_export[3].IN1counter_rx_fifo_external_connection_export[4] => counter_rx_fifo_external_connection_export[4].IN1counter_rx_fifo_external_connection_export[5] => counter_rx_fifo_external_connection_export[5].IN1counter_tx_fifo_external_connection_export[0] => counter_tx_fifo_external_connection_export[0].IN1counter_tx_fifo_external_connection_export[1] => counter_tx_fifo_external_connection_export[1].IN1counter_tx_fifo_external_connection_export[2] => counter_tx_fifo_external_connection_export[2].IN1counter_tx_fifo_external_connection_export[3] => counter_tx_fifo_external_connection_export[3].IN1counter_tx_fifo_external_connection_export[4] => counter_tx_fifo_external_connection_export[4].IN1counter_tx_fifo_external_connection_export[5] => counter_tx_fifo_external_connection_export[5].IN1data_flag_rx_external_connection_export[0] => data_flag_rx_external_connection_export[0].IN1data_flag_rx_external_connection_export[1] => data_flag_rx_external_connection_export[1].IN1data_flag_rx_external_connection_export[2] => data_flag_rx_external_connection_export[2].IN1data_flag_rx_external_connection_export[3] => data_flag_rx_external_connection_export[3].IN1data_flag_rx_external_connection_export[4] => data_flag_rx_external_connection_export[4].IN1data_flag_rx_external_connection_export[5] => data_flag_rx_external_connection_export[5].IN1data_flag_rx_external_connection_export[6] => data_flag_rx_external_connection_export[6].IN1data_flag_rx_external_connection_export[7] => data_flag_rx_external_connection_export[7].IN1data_flag_rx_external_connection_export[8] => data_flag_rx_external_connection_export[8].IN1data_info_external_connection_export[0] => data_info_external_connection_export[0].IN1data_info_external_connection_export[1] => data_info_external_connection_export[1].IN1data_info_external_connection_export[2] => data_info_external_connection_export[2].IN1data_info_external_connection_export[3] => data_info_external_connection_export[3].IN1data_info_external_connection_export[4] => data_info_external_connection_export[4].IN1data_info_external_connection_export[5] => data_info_external_connection_export[5].IN1data_info_external_connection_export[6] => data_info_external_connection_export[6].IN1data_info_external_connection_export[7] => data_info_external_connection_export[7].IN1data_info_external_connection_export[8] => data_info_external_connection_export[8].IN1data_info_external_connection_export[9] => data_info_external_connection_export[9].IN1data_info_external_connection_export[10] => data_info_external_connection_export[10].IN1data_info_external_connection_export[11] => data_info_external_connection_export[11].IN1data_info_external_connection_export[12] => data_info_external_connection_export[12].IN1data_info_external_connection_export[13] => data_info_external_connection_export[13].IN1data_read_en_rx_external_connection_export <= ulight_fifo_auto_start:data_read_en_rx.out_portfifo_empty_rx_status_external_connection_export => fifo_empty_rx_status_external_connection_export.IN1fifo_empty_tx_status_external_connection_export => fifo_empty_tx_status_external_connection_export.IN1fifo_full_rx_status_external_connection_export => fifo_full_rx_status_external_connection_export.IN1fifo_full_tx_status_external_connection_export => fifo_full_tx_status_external_connection_export.IN1fsm_info_external_connection_export[0] => fsm_info_external_connection_export[0].IN1fsm_info_external_connection_export[1] => fsm_info_external_connection_export[1].IN1fsm_info_external_connection_export[2] => fsm_info_external_connection_export[2].IN1fsm_info_external_connection_export[3] => fsm_info_external_connection_export[3].IN1fsm_info_external_connection_export[4] => fsm_info_external_connection_export[4].IN1fsm_info_external_connection_export[5] => fsm_info_external_connection_export[5].IN1led_pio_test_external_connection_export[0] <= ulight_fifo_led_pio_test:led_pio_test.out_portled_pio_test_external_connection_export[1] <= ulight_fifo_led_pio_test:led_pio_test.out_portled_pio_test_external_connection_export[2] <= ulight_fifo_led_pio_test:led_pio_test.out_portled_pio_test_external_connection_export[3] <= ulight_fifo_led_pio_test:led_pio_test.out_portled_pio_test_external_connection_export[4] <= ulight_fifo_led_pio_test:led_pio_test.out_portlink_disable_external_connection_export <= ulight_fifo_auto_start:link_disable.out_portlink_start_external_connection_export <= ulight_fifo_auto_start:link_start.out_portmemory_mem_a[0] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[1] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[2] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[3] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[4] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[5] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[6] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[7] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[8] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[9] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[10] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[11] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_a[12] <= ulight_fifo_hps_0:hps_0.mem_amemory_mem_ba[0] <= ulight_fifo_hps_0:hps_0.mem_bamemory_mem_ba[1] <= ulight_fifo_hps_0:hps_0.mem_bamemory_mem_ba[2] <= ulight_fifo_hps_0:hps_0.mem_bamemory_mem_ck <= ulight_fifo_hps_0:hps_0.mem_ckmemory_mem_ck_n <= ulight_fifo_hps_0:hps_0.mem_ck_nmemory_mem_cke <= ulight_fifo_hps_0:hps_0.mem_ckememory_mem_cs_n <= ulight_fifo_hps_0:hps_0.mem_cs_nmemory_mem_ras_n <= ulight_fifo_hps_0:hps_0.mem_ras_nmemory_mem_cas_n <= ulight_fifo_hps_0:hps_0.mem_cas_nmemory_mem_we_n <= ulight_fifo_hps_0:hps_0.mem_we_nmemory_mem_reset_n <= ulight_fifo_hps_0:hps_0.mem_reset_nmemory_mem_dq[0] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[1] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[2] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[3] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[4] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[5] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[6] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dq[7] <> ulight_fifo_hps_0:hps_0.mem_dqmemory_mem_dqs <> ulight_fifo_hps_0:hps_0.mem_dqsmemory_mem_dqs_n <> ulight_fifo_hps_0:hps_0.mem_dqs_nmemory_mem_odt <= ulight_fifo_hps_0:hps_0.mem_odtmemory_mem_dm <= ulight_fifo_hps_0:hps_0.mem_dmmemory_oct_rzqin => memory_oct_rzqin.IN1pll_0_locked_export <= ulight_fifo_pll_0:pll_0.lockedpll_0_outclk0_clk <= ulight_fifo_pll_0:pll_0.outclk_0reset_reset_n => _.IN1reset_reset_n => _.IN1timecode_ready_rx_external_connection_export => timecode_ready_rx_external_connection_export.IN1timecode_rx_external_connection_export[0] => timecode_rx_external_connection_export[0].IN1timecode_rx_external_connection_export[1] => timecode_rx_external_connection_export[1].IN1timecode_rx_external_connection_export[2] => timecode_rx_external_connection_export[2].IN1timecode_rx_external_connection_export[3] => timecode_rx_external_connection_export[3].IN1timecode_rx_external_connection_export[4] => timecode_rx_external_connection_export[4].IN1timecode_rx_external_connection_export[5] => timecode_rx_external_connection_export[5].IN1timecode_rx_external_connection_export[6] => timecode_rx_external_connection_export[6].IN1timecode_rx_external_connection_export[7] => timecode_rx_external_connection_export[7].IN1timecode_tx_data_external_connection_export[0] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[1] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[2] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[3] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[4] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[5] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[6] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_data_external_connection_export[7] <= ulight_fifo_timecode_tx_data:timecode_tx_data.out_porttimecode_tx_enable_external_connection_export <= ulight_fifo_auto_start:timecode_tx_enable.out_porttimecode_tx_ready_external_connection_export => timecode_tx_ready_external_connection_export.IN1write_data_fifo_tx_external_connection_export[0] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[1] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[2] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[3] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[4] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[5] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[6] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[7] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_data_fifo_tx_external_connection_export[8] <= ulight_fifo_write_data_fifo_tx:write_data_fifo_tx.out_portwrite_en_tx_external_connection_export <= ulight_fifo_auto_start:write_en_tx.out_port|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:auto_startaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_clock_sel:clock_seladdress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out[0].CLKclk => data_out[1].CLKclk => data_out[2].CLKreset_n => data_out[0].ACLRreset_n => data_out[1].ACLRreset_n => data_out[2].ACLRwrite_n => always0.IN1writedata[0] => data_out[0].DATAINwritedata[1] => data_out[1].DATAINwritedata[2] => data_out[2].DATAINwritedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port[0] <= data_out[0].DB_MAX_OUTPUT_PORT_TYPEout_port[1] <= data_out[1].DB_MAX_OUTPUT_PORT_TYPEout_port[2] <= data_out[2].DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_counter_rx_fifo:counter_rx_fifoaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_counter_rx_fifo:counter_tx_fifoaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_data_flag_rx:data_flag_rxaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1in_port[6] => read_mux_out[6].IN1in_port[7] => read_mux_out[7].IN1in_port[8] => read_mux_out[8].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_data_info:data_infoaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1in_port[6] => read_mux_out[6].IN1in_port[7] => read_mux_out[7].IN1in_port[8] => read_mux_out[8].IN1in_port[9] => read_mux_out[9].IN1in_port[10] => read_mux_out[10].IN1in_port[11] => read_mux_out[11].IN1in_port[12] => read_mux_out[12].IN1in_port[13] => read_mux_out[13].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:data_read_en_rxaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:fifo_empty_rx_statusaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:fifo_empty_tx_statusaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:fifo_full_rx_statusaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:fifo_full_tx_statusaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_counter_rx_fifo:fsm_infoaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0h2f_rst_n <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_rst_nh2f_axi_clk => h2f_axi_clk.IN1h2f_AWID[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWID[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWIDh2f_AWADDR[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[12] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[13] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[14] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[15] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[16] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[17] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[18] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[19] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[20] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[21] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[22] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[23] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[24] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[25] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[26] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[27] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[28] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWADDR[29] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWADDRh2f_AWLEN[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLENh2f_AWLEN[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLENh2f_AWLEN[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLENh2f_AWLEN[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLENh2f_AWSIZE[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWSIZEh2f_AWSIZE[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWSIZEh2f_AWSIZE[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWSIZEh2f_AWBURST[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWBURSTh2f_AWBURST[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWBURSTh2f_AWLOCK[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLOCKh2f_AWLOCK[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWLOCKh2f_AWCACHE[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWCACHEh2f_AWCACHE[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWCACHEh2f_AWCACHE[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWCACHEh2f_AWCACHE[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWCACHEh2f_AWPROT[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWPROTh2f_AWPROT[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWPROTh2f_AWPROT[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWPROTh2f_AWVALID <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_AWVALIDh2f_AWREADY => h2f_AWREADY.IN1h2f_WID[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WID[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WIDh2f_WDATA[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[12] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[13] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[14] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[15] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[16] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[17] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[18] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[19] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[20] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[21] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[22] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[23] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[24] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[25] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[26] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[27] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[28] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[29] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[30] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WDATA[31] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WDATAh2f_WSTRB[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WSTRBh2f_WSTRB[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WSTRBh2f_WSTRB[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WSTRBh2f_WSTRB[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WSTRBh2f_WLAST <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WLASTh2f_WVALID <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_WVALIDh2f_WREADY => h2f_WREADY.IN1h2f_BID[0] => h2f_BID[0].IN1h2f_BID[1] => h2f_BID[1].IN1h2f_BID[2] => h2f_BID[2].IN1h2f_BID[3] => h2f_BID[3].IN1h2f_BID[4] => h2f_BID[4].IN1h2f_BID[5] => h2f_BID[5].IN1h2f_BID[6] => h2f_BID[6].IN1h2f_BID[7] => h2f_BID[7].IN1h2f_BID[8] => h2f_BID[8].IN1h2f_BID[9] => h2f_BID[9].IN1h2f_BID[10] => h2f_BID[10].IN1h2f_BID[11] => h2f_BID[11].IN1h2f_BRESP[0] => h2f_BRESP[0].IN1h2f_BRESP[1] => h2f_BRESP[1].IN1h2f_BVALID => h2f_BVALID.IN1h2f_BREADY <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_BREADYh2f_ARID[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARID[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARIDh2f_ARADDR[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[4] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[5] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[6] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[7] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[8] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[9] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[10] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[11] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[12] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[13] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[14] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[15] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[16] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[17] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[18] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[19] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[20] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[21] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[22] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[23] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[24] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[25] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[26] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[27] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[28] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARADDR[29] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARADDRh2f_ARLEN[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLENh2f_ARLEN[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLENh2f_ARLEN[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLENh2f_ARLEN[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLENh2f_ARSIZE[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARSIZEh2f_ARSIZE[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARSIZEh2f_ARSIZE[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARSIZEh2f_ARBURST[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARBURSTh2f_ARBURST[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARBURSTh2f_ARLOCK[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLOCKh2f_ARLOCK[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARLOCKh2f_ARCACHE[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARCACHEh2f_ARCACHE[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARCACHEh2f_ARCACHE[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARCACHEh2f_ARCACHE[3] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARCACHEh2f_ARPROT[0] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARPROTh2f_ARPROT[1] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARPROTh2f_ARPROT[2] <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARPROTh2f_ARVALID <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_ARVALIDh2f_ARREADY => h2f_ARREADY.IN1h2f_RID[0] => h2f_RID[0].IN1h2f_RID[1] => h2f_RID[1].IN1h2f_RID[2] => h2f_RID[2].IN1h2f_RID[3] => h2f_RID[3].IN1h2f_RID[4] => h2f_RID[4].IN1h2f_RID[5] => h2f_RID[5].IN1h2f_RID[6] => h2f_RID[6].IN1h2f_RID[7] => h2f_RID[7].IN1h2f_RID[8] => h2f_RID[8].IN1h2f_RID[9] => h2f_RID[9].IN1h2f_RID[10] => h2f_RID[10].IN1h2f_RID[11] => h2f_RID[11].IN1h2f_RDATA[0] => h2f_RDATA[0].IN1h2f_RDATA[1] => h2f_RDATA[1].IN1h2f_RDATA[2] => h2f_RDATA[2].IN1h2f_RDATA[3] => h2f_RDATA[3].IN1h2f_RDATA[4] => h2f_RDATA[4].IN1h2f_RDATA[5] => h2f_RDATA[5].IN1h2f_RDATA[6] => h2f_RDATA[6].IN1h2f_RDATA[7] => h2f_RDATA[7].IN1h2f_RDATA[8] => h2f_RDATA[8].IN1h2f_RDATA[9] => h2f_RDATA[9].IN1h2f_RDATA[10] => h2f_RDATA[10].IN1h2f_RDATA[11] => h2f_RDATA[11].IN1h2f_RDATA[12] => h2f_RDATA[12].IN1h2f_RDATA[13] => h2f_RDATA[13].IN1h2f_RDATA[14] => h2f_RDATA[14].IN1h2f_RDATA[15] => h2f_RDATA[15].IN1h2f_RDATA[16] => h2f_RDATA[16].IN1h2f_RDATA[17] => h2f_RDATA[17].IN1h2f_RDATA[18] => h2f_RDATA[18].IN1h2f_RDATA[19] => h2f_RDATA[19].IN1h2f_RDATA[20] => h2f_RDATA[20].IN1h2f_RDATA[21] => h2f_RDATA[21].IN1h2f_RDATA[22] => h2f_RDATA[22].IN1h2f_RDATA[23] => h2f_RDATA[23].IN1h2f_RDATA[24] => h2f_RDATA[24].IN1h2f_RDATA[25] => h2f_RDATA[25].IN1h2f_RDATA[26] => h2f_RDATA[26].IN1h2f_RDATA[27] => h2f_RDATA[27].IN1h2f_RDATA[28] => h2f_RDATA[28].IN1h2f_RDATA[29] => h2f_RDATA[29].IN1h2f_RDATA[30] => h2f_RDATA[30].IN1h2f_RDATA[31] => h2f_RDATA[31].IN1h2f_RRESP[0] => h2f_RRESP[0].IN1h2f_RRESP[1] => h2f_RRESP[1].IN1h2f_RLAST => h2f_RLAST.IN1h2f_RVALID => h2f_RVALID.IN1h2f_RREADY <= ulight_fifo_hps_0_fpga_interfaces:fpga_interfaces.h2f_RREADYmem_a[0] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[1] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[2] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[3] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[4] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[5] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[6] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[7] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[8] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[9] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[10] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[11] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_a[12] <= ulight_fifo_hps_0_hps_io:hps_io.mem_amem_ba[0] <= ulight_fifo_hps_0_hps_io:hps_io.mem_bamem_ba[1] <= ulight_fifo_hps_0_hps_io:hps_io.mem_bamem_ba[2] <= ulight_fifo_hps_0_hps_io:hps_io.mem_bamem_ck <= ulight_fifo_hps_0_hps_io:hps_io.mem_ckmem_ck_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_ck_nmem_cke <= ulight_fifo_hps_0_hps_io:hps_io.mem_ckemem_cs_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_cs_nmem_ras_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_ras_nmem_cas_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_cas_nmem_we_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_we_nmem_reset_n <= ulight_fifo_hps_0_hps_io:hps_io.mem_reset_nmem_dq[0] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[1] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[2] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[3] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[4] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[5] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[6] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dq[7] <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqmem_dqs <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqsmem_dqs_n <> ulight_fifo_hps_0_hps_io:hps_io.mem_dqs_nmem_odt <= ulight_fifo_hps_0_hps_io:hps_io.mem_odtmem_dm <= ulight_fifo_hps_0_hps_io:hps_io.mem_dmoct_rzqin => oct_rzqin.IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_fpga_interfaces:fpga_interfacesh2f_rst_n[0] <= clocks_resets.O_H2F_RST_Nh2f_axi_clk[0] => hps2fpga.I_CLKh2f_AWID[0] <= hps2fpga.O_AWIDh2f_AWID[1] <= hps2fpga.O_AWID1h2f_AWID[2] <= hps2fpga.O_AWID2h2f_AWID[3] <= hps2fpga.O_AWID3h2f_AWID[4] <= hps2fpga.O_AWID4h2f_AWID[5] <= hps2fpga.O_AWID5h2f_AWID[6] <= hps2fpga.O_AWID6h2f_AWID[7] <= hps2fpga.O_AWID7h2f_AWID[8] <= hps2fpga.O_AWID8h2f_AWID[9] <= hps2fpga.O_AWID9h2f_AWID[10] <= hps2fpga.O_AWID10h2f_AWID[11] <= hps2fpga.O_AWID11h2f_AWADDR[0] <= hps2fpga.O_AWADDRh2f_AWADDR[1] <= hps2fpga.O_AWADDR1h2f_AWADDR[2] <= hps2fpga.O_AWADDR2h2f_AWADDR[3] <= hps2fpga.O_AWADDR3h2f_AWADDR[4] <= hps2fpga.O_AWADDR4h2f_AWADDR[5] <= hps2fpga.O_AWADDR5h2f_AWADDR[6] <= hps2fpga.O_AWADDR6h2f_AWADDR[7] <= hps2fpga.O_AWADDR7h2f_AWADDR[8] <= hps2fpga.O_AWADDR8h2f_AWADDR[9] <= hps2fpga.O_AWADDR9h2f_AWADDR[10] <= hps2fpga.O_AWADDR10h2f_AWADDR[11] <= hps2fpga.O_AWADDR11h2f_AWADDR[12] <= hps2fpga.O_AWADDR12h2f_AWADDR[13] <= hps2fpga.O_AWADDR13h2f_AWADDR[14] <= hps2fpga.O_AWADDR14h2f_AWADDR[15] <= hps2fpga.O_AWADDR15h2f_AWADDR[16] <= hps2fpga.O_AWADDR16h2f_AWADDR[17] <= hps2fpga.O_AWADDR17h2f_AWADDR[18] <= hps2fpga.O_AWADDR18h2f_AWADDR[19] <= hps2fpga.O_AWADDR19h2f_AWADDR[20] <= hps2fpga.O_AWADDR20h2f_AWADDR[21] <= hps2fpga.O_AWADDR21h2f_AWADDR[22] <= hps2fpga.O_AWADDR22h2f_AWADDR[23] <= hps2fpga.O_AWADDR23h2f_AWADDR[24] <= hps2fpga.O_AWADDR24h2f_AWADDR[25] <= hps2fpga.O_AWADDR25h2f_AWADDR[26] <= hps2fpga.O_AWADDR26h2f_AWADDR[27] <= hps2fpga.O_AWADDR27h2f_AWADDR[28] <= hps2fpga.O_AWADDR28h2f_AWADDR[29] <= hps2fpga.O_AWADDR29h2f_AWLEN[0] <= hps2fpga.O_AWLENh2f_AWLEN[1] <= hps2fpga.O_AWLEN1h2f_AWLEN[2] <= hps2fpga.O_AWLEN2h2f_AWLEN[3] <= hps2fpga.O_AWLEN3h2f_AWSIZE[0] <= hps2fpga.O_AWSIZEh2f_AWSIZE[1] <= hps2fpga.O_AWSIZE1h2f_AWSIZE[2] <= hps2fpga.O_AWSIZE2h2f_AWBURST[0] <= hps2fpga.O_AWBURSTh2f_AWBURST[1] <= hps2fpga.O_AWBURST1h2f_AWLOCK[0] <= hps2fpga.O_AWLOCKh2f_AWLOCK[1] <= hps2fpga.O_AWLOCK1h2f_AWCACHE[0] <= hps2fpga.O_AWCACHEh2f_AWCACHE[1] <= hps2fpga.O_AWCACHE1h2f_AWCACHE[2] <= hps2fpga.O_AWCACHE2h2f_AWCACHE[3] <= hps2fpga.O_AWCACHE3h2f_AWPROT[0] <= hps2fpga.O_AWPROTh2f_AWPROT[1] <= hps2fpga.O_AWPROT1h2f_AWPROT[2] <= hps2fpga.O_AWPROT2h2f_AWVALID[0] <= hps2fpga.O_AWVALIDh2f_AWREADY[0] => hps2fpga.I_AWREADYh2f_WID[0] <= hps2fpga.O_WIDh2f_WID[1] <= hps2fpga.O_WID1h2f_WID[2] <= hps2fpga.O_WID2h2f_WID[3] <= hps2fpga.O_WID3h2f_WID[4] <= hps2fpga.O_WID4h2f_WID[5] <= hps2fpga.O_WID5h2f_WID[6] <= hps2fpga.O_WID6h2f_WID[7] <= hps2fpga.O_WID7h2f_WID[8] <= hps2fpga.O_WID8h2f_WID[9] <= hps2fpga.O_WID9h2f_WID[10] <= hps2fpga.O_WID10h2f_WID[11] <= hps2fpga.O_WID11h2f_WDATA[0] <= hps2fpga.O_WDATAh2f_WDATA[1] <= hps2fpga.O_WDATA1h2f_WDATA[2] <= hps2fpga.O_WDATA2h2f_WDATA[3] <= hps2fpga.O_WDATA3h2f_WDATA[4] <= hps2fpga.O_WDATA4h2f_WDATA[5] <= hps2fpga.O_WDATA5h2f_WDATA[6] <= hps2fpga.O_WDATA6h2f_WDATA[7] <= hps2fpga.O_WDATA7h2f_WDATA[8] <= hps2fpga.O_WDATA8h2f_WDATA[9] <= hps2fpga.O_WDATA9h2f_WDATA[10] <= hps2fpga.O_WDATA10h2f_WDATA[11] <= hps2fpga.O_WDATA11h2f_WDATA[12] <= hps2fpga.O_WDATA12h2f_WDATA[13] <= hps2fpga.O_WDATA13h2f_WDATA[14] <= hps2fpga.O_WDATA14h2f_WDATA[15] <= hps2fpga.O_WDATA15h2f_WDATA[16] <= hps2fpga.O_WDATA16h2f_WDATA[17] <= hps2fpga.O_WDATA17h2f_WDATA[18] <= hps2fpga.O_WDATA18h2f_WDATA[19] <= hps2fpga.O_WDATA19h2f_WDATA[20] <= hps2fpga.O_WDATA20h2f_WDATA[21] <= hps2fpga.O_WDATA21h2f_WDATA[22] <= hps2fpga.O_WDATA22h2f_WDATA[23] <= hps2fpga.O_WDATA23h2f_WDATA[24] <= hps2fpga.O_WDATA24h2f_WDATA[25] <= hps2fpga.O_WDATA25h2f_WDATA[26] <= hps2fpga.O_WDATA26h2f_WDATA[27] <= hps2fpga.O_WDATA27h2f_WDATA[28] <= hps2fpga.O_WDATA28h2f_WDATA[29] <= hps2fpga.O_WDATA29h2f_WDATA[30] <= hps2fpga.O_WDATA30h2f_WDATA[31] <= hps2fpga.O_WDATA31h2f_WSTRB[0] <= hps2fpga.O_WSTRBh2f_WSTRB[1] <= hps2fpga.O_WSTRB1h2f_WSTRB[2] <= hps2fpga.O_WSTRB2h2f_WSTRB[3] <= hps2fpga.O_WSTRB3h2f_WLAST[0] <= hps2fpga.O_WLASTh2f_WVALID[0] <= hps2fpga.O_WVALIDh2f_WREADY[0] => hps2fpga.I_WREADYh2f_BID[0] => hps2fpga.I_BIDh2f_BID[1] => hps2fpga.I_BID1h2f_BID[2] => hps2fpga.I_BID2h2f_BID[3] => hps2fpga.I_BID3h2f_BID[4] => hps2fpga.I_BID4h2f_BID[5] => hps2fpga.I_BID5h2f_BID[6] => hps2fpga.I_BID6h2f_BID[7] => hps2fpga.I_BID7h2f_BID[8] => hps2fpga.I_BID8h2f_BID[9] => hps2fpga.I_BID9h2f_BID[10] => hps2fpga.I_BID10h2f_BID[11] => hps2fpga.I_BID11h2f_BRESP[0] => hps2fpga.I_BRESPh2f_BRESP[1] => hps2fpga.I_BRESP1h2f_BVALID[0] => hps2fpga.I_BVALIDh2f_BREADY[0] <= hps2fpga.O_BREADYh2f_ARID[0] <= hps2fpga.O_ARIDh2f_ARID[1] <= hps2fpga.O_ARID1h2f_ARID[2] <= hps2fpga.O_ARID2h2f_ARID[3] <= hps2fpga.O_ARID3h2f_ARID[4] <= hps2fpga.O_ARID4h2f_ARID[5] <= hps2fpga.O_ARID5h2f_ARID[6] <= hps2fpga.O_ARID6h2f_ARID[7] <= hps2fpga.O_ARID7h2f_ARID[8] <= hps2fpga.O_ARID8h2f_ARID[9] <= hps2fpga.O_ARID9h2f_ARID[10] <= hps2fpga.O_ARID10h2f_ARID[11] <= hps2fpga.O_ARID11h2f_ARADDR[0] <= hps2fpga.O_ARADDRh2f_ARADDR[1] <= hps2fpga.O_ARADDR1h2f_ARADDR[2] <= hps2fpga.O_ARADDR2h2f_ARADDR[3] <= hps2fpga.O_ARADDR3h2f_ARADDR[4] <= hps2fpga.O_ARADDR4h2f_ARADDR[5] <= hps2fpga.O_ARADDR5h2f_ARADDR[6] <= hps2fpga.O_ARADDR6h2f_ARADDR[7] <= hps2fpga.O_ARADDR7h2f_ARADDR[8] <= hps2fpga.O_ARADDR8h2f_ARADDR[9] <= hps2fpga.O_ARADDR9h2f_ARADDR[10] <= hps2fpga.O_ARADDR10h2f_ARADDR[11] <= hps2fpga.O_ARADDR11h2f_ARADDR[12] <= hps2fpga.O_ARADDR12h2f_ARADDR[13] <= hps2fpga.O_ARADDR13h2f_ARADDR[14] <= hps2fpga.O_ARADDR14h2f_ARADDR[15] <= hps2fpga.O_ARADDR15h2f_ARADDR[16] <= hps2fpga.O_ARADDR16h2f_ARADDR[17] <= hps2fpga.O_ARADDR17h2f_ARADDR[18] <= hps2fpga.O_ARADDR18h2f_ARADDR[19] <= hps2fpga.O_ARADDR19h2f_ARADDR[20] <= hps2fpga.O_ARADDR20h2f_ARADDR[21] <= hps2fpga.O_ARADDR21h2f_ARADDR[22] <= hps2fpga.O_ARADDR22h2f_ARADDR[23] <= hps2fpga.O_ARADDR23h2f_ARADDR[24] <= hps2fpga.O_ARADDR24h2f_ARADDR[25] <= hps2fpga.O_ARADDR25h2f_ARADDR[26] <= hps2fpga.O_ARADDR26h2f_ARADDR[27] <= hps2fpga.O_ARADDR27h2f_ARADDR[28] <= hps2fpga.O_ARADDR28h2f_ARADDR[29] <= hps2fpga.O_ARADDR29h2f_ARLEN[0] <= hps2fpga.O_ARLENh2f_ARLEN[1] <= hps2fpga.O_ARLEN1h2f_ARLEN[2] <= hps2fpga.O_ARLEN2h2f_ARLEN[3] <= hps2fpga.O_ARLEN3h2f_ARSIZE[0] <= hps2fpga.O_ARSIZEh2f_ARSIZE[1] <= hps2fpga.O_ARSIZE1h2f_ARSIZE[2] <= hps2fpga.O_ARSIZE2h2f_ARBURST[0] <= hps2fpga.O_ARBURSTh2f_ARBURST[1] <= hps2fpga.O_ARBURST1h2f_ARLOCK[0] <= hps2fpga.O_ARLOCKh2f_ARLOCK[1] <= hps2fpga.O_ARLOCK1h2f_ARCACHE[0] <= hps2fpga.O_ARCACHEh2f_ARCACHE[1] <= hps2fpga.O_ARCACHE1h2f_ARCACHE[2] <= hps2fpga.O_ARCACHE2h2f_ARCACHE[3] <= hps2fpga.O_ARCACHE3h2f_ARPROT[0] <= hps2fpga.O_ARPROTh2f_ARPROT[1] <= hps2fpga.O_ARPROT1h2f_ARPROT[2] <= hps2fpga.O_ARPROT2h2f_ARVALID[0] <= hps2fpga.O_ARVALIDh2f_ARREADY[0] => hps2fpga.I_ARREADYh2f_RID[0] => hps2fpga.I_RIDh2f_RID[1] => hps2fpga.I_RID1h2f_RID[2] => hps2fpga.I_RID2h2f_RID[3] => hps2fpga.I_RID3h2f_RID[4] => hps2fpga.I_RID4h2f_RID[5] => hps2fpga.I_RID5h2f_RID[6] => hps2fpga.I_RID6h2f_RID[7] => hps2fpga.I_RID7h2f_RID[8] => hps2fpga.I_RID8h2f_RID[9] => hps2fpga.I_RID9h2f_RID[10] => hps2fpga.I_RID10h2f_RID[11] => hps2fpga.I_RID11h2f_RDATA[0] => hps2fpga.I_RDATAh2f_RDATA[1] => hps2fpga.I_RDATA1h2f_RDATA[2] => hps2fpga.I_RDATA2h2f_RDATA[3] => hps2fpga.I_RDATA3h2f_RDATA[4] => hps2fpga.I_RDATA4h2f_RDATA[5] => hps2fpga.I_RDATA5h2f_RDATA[6] => hps2fpga.I_RDATA6h2f_RDATA[7] => hps2fpga.I_RDATA7h2f_RDATA[8] => hps2fpga.I_RDATA8h2f_RDATA[9] => hps2fpga.I_RDATA9h2f_RDATA[10] => hps2fpga.I_RDATA10h2f_RDATA[11] => hps2fpga.I_RDATA11h2f_RDATA[12] => hps2fpga.I_RDATA12h2f_RDATA[13] => hps2fpga.I_RDATA13h2f_RDATA[14] => hps2fpga.I_RDATA14h2f_RDATA[15] => hps2fpga.I_RDATA15h2f_RDATA[16] => hps2fpga.I_RDATA16h2f_RDATA[17] => hps2fpga.I_RDATA17h2f_RDATA[18] => hps2fpga.I_RDATA18h2f_RDATA[19] => hps2fpga.I_RDATA19h2f_RDATA[20] => hps2fpga.I_RDATA20h2f_RDATA[21] => hps2fpga.I_RDATA21h2f_RDATA[22] => hps2fpga.I_RDATA22h2f_RDATA[23] => hps2fpga.I_RDATA23h2f_RDATA[24] => hps2fpga.I_RDATA24h2f_RDATA[25] => hps2fpga.I_RDATA25h2f_RDATA[26] => hps2fpga.I_RDATA26h2f_RDATA[27] => hps2fpga.I_RDATA27h2f_RDATA[28] => hps2fpga.I_RDATA28h2f_RDATA[29] => hps2fpga.I_RDATA29h2f_RDATA[30] => hps2fpga.I_RDATA30h2f_RDATA[31] => hps2fpga.I_RDATA31h2f_RRESP[0] => hps2fpga.I_RRESPh2f_RRESP[1] => hps2fpga.I_RRESP1h2f_RLAST[0] => hps2fpga.I_RLASTh2f_RVALID[0] => hps2fpga.I_RVALIDh2f_RREADY[0] <= hps2fpga.O_RREADY|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_iomem_a[0] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[1] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[2] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[3] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[4] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[5] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[6] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[7] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[8] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[9] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[10] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[11] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_a[12] <= ulight_fifo_hps_0_hps_io_border:border.mem_amem_ba[0] <= ulight_fifo_hps_0_hps_io_border:border.mem_bamem_ba[1] <= ulight_fifo_hps_0_hps_io_border:border.mem_bamem_ba[2] <= ulight_fifo_hps_0_hps_io_border:border.mem_bamem_ck <= ulight_fifo_hps_0_hps_io_border:border.mem_ckmem_ck_n <= ulight_fifo_hps_0_hps_io_border:border.mem_ck_nmem_cke <= ulight_fifo_hps_0_hps_io_border:border.mem_ckemem_cs_n <= ulight_fifo_hps_0_hps_io_border:border.mem_cs_nmem_ras_n <= ulight_fifo_hps_0_hps_io_border:border.mem_ras_nmem_cas_n <= ulight_fifo_hps_0_hps_io_border:border.mem_cas_nmem_we_n <= ulight_fifo_hps_0_hps_io_border:border.mem_we_nmem_reset_n <= ulight_fifo_hps_0_hps_io_border:border.mem_reset_nmem_dq[0] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[1] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[2] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[3] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[4] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[5] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[6] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dq[7] <> ulight_fifo_hps_0_hps_io_border:border.mem_dqmem_dqs <> ulight_fifo_hps_0_hps_io_border:border.mem_dqsmem_dqs_n <> ulight_fifo_hps_0_hps_io_border:border.mem_dqs_nmem_odt <= ulight_fifo_hps_0_hps_io_border:border.mem_odtmem_dm <= ulight_fifo_hps_0_hps_io_border:border.mem_dmoct_rzqin => oct_rzqin.IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:bordermem_a[0] <= hps_sdram:hps_sdram_inst.mem_amem_a[1] <= hps_sdram:hps_sdram_inst.mem_amem_a[2] <= hps_sdram:hps_sdram_inst.mem_amem_a[3] <= hps_sdram:hps_sdram_inst.mem_amem_a[4] <= hps_sdram:hps_sdram_inst.mem_amem_a[5] <= hps_sdram:hps_sdram_inst.mem_amem_a[6] <= hps_sdram:hps_sdram_inst.mem_amem_a[7] <= hps_sdram:hps_sdram_inst.mem_amem_a[8] <= hps_sdram:hps_sdram_inst.mem_amem_a[9] <= hps_sdram:hps_sdram_inst.mem_amem_a[10] <= hps_sdram:hps_sdram_inst.mem_amem_a[11] <= hps_sdram:hps_sdram_inst.mem_amem_a[12] <= hps_sdram:hps_sdram_inst.mem_amem_ba[0] <= hps_sdram:hps_sdram_inst.mem_bamem_ba[1] <= hps_sdram:hps_sdram_inst.mem_bamem_ba[2] <= hps_sdram:hps_sdram_inst.mem_bamem_ck[0] <= hps_sdram:hps_sdram_inst.mem_ckmem_ck_n[0] <= hps_sdram:hps_sdram_inst.mem_ck_nmem_cke[0] <= hps_sdram:hps_sdram_inst.mem_ckemem_cs_n[0] <= hps_sdram:hps_sdram_inst.mem_cs_nmem_ras_n[0] <= hps_sdram:hps_sdram_inst.mem_ras_nmem_cas_n[0] <= hps_sdram:hps_sdram_inst.mem_cas_nmem_we_n[0] <= hps_sdram:hps_sdram_inst.mem_we_nmem_reset_n[0] <= hps_sdram:hps_sdram_inst.mem_reset_nmem_dq[0] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[1] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[2] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[3] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[4] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[5] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[6] <> hps_sdram:hps_sdram_inst.mem_dqmem_dq[7] <> hps_sdram:hps_sdram_inst.mem_dqmem_dqs[0] <> hps_sdram:hps_sdram_inst.mem_dqsmem_dqs_n[0] <> hps_sdram:hps_sdram_inst.mem_dqs_nmem_odt[0] <= hps_sdram:hps_sdram_inst.mem_odtmem_dm[0] <= hps_sdram:hps_sdram_inst.mem_dmoct_rzqin[0] => oct_rzqin[0].IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_instpll_ref_clk => pll_ref_clk.IN1global_reset_n => global_reset_n.IN2soft_reset_n => soft_reset_n.IN1mem_a[0] <= hps_sdram_p0:p0.mem_amem_a[1] <= hps_sdram_p0:p0.mem_amem_a[2] <= hps_sdram_p0:p0.mem_amem_a[3] <= hps_sdram_p0:p0.mem_amem_a[4] <= hps_sdram_p0:p0.mem_amem_a[5] <= hps_sdram_p0:p0.mem_amem_a[6] <= hps_sdram_p0:p0.mem_amem_a[7] <= hps_sdram_p0:p0.mem_amem_a[8] <= hps_sdram_p0:p0.mem_amem_a[9] <= hps_sdram_p0:p0.mem_amem_a[10] <= hps_sdram_p0:p0.mem_amem_a[11] <= hps_sdram_p0:p0.mem_amem_a[12] <= hps_sdram_p0:p0.mem_amem_ba[0] <= hps_sdram_p0:p0.mem_bamem_ba[1] <= hps_sdram_p0:p0.mem_bamem_ba[2] <= hps_sdram_p0:p0.mem_bamem_ck[0] <= hps_sdram_p0:p0.mem_ckmem_ck_n[0] <= hps_sdram_p0:p0.mem_ck_nmem_cke[0] <= hps_sdram_p0:p0.mem_ckemem_cs_n[0] <= hps_sdram_p0:p0.mem_cs_nmem_dm[0] <= hps_sdram_p0:p0.mem_dmmem_ras_n[0] <= hps_sdram_p0:p0.mem_ras_nmem_cas_n[0] <= hps_sdram_p0:p0.mem_cas_nmem_we_n[0] <= hps_sdram_p0:p0.mem_we_nmem_reset_n <= hps_sdram_p0:p0.mem_reset_nmem_dq[0] <> hps_sdram_p0:p0.mem_dqmem_dq[1] <> hps_sdram_p0:p0.mem_dqmem_dq[2] <> hps_sdram_p0:p0.mem_dqmem_dq[3] <> hps_sdram_p0:p0.mem_dqmem_dq[4] <> hps_sdram_p0:p0.mem_dqmem_dq[5] <> hps_sdram_p0:p0.mem_dqmem_dq[6] <> hps_sdram_p0:p0.mem_dqmem_dq[7] <> hps_sdram_p0:p0.mem_dqmem_dqs[0] <> hps_sdram_p0:p0.mem_dqsmem_dqs_n[0] <> hps_sdram_p0:p0.mem_dqs_nmem_odt[0] <= hps_sdram_p0:p0.mem_odtoct_rzqin => oct_rzqin.IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_pll:pllglobal_reset_n => ~NO_FANOUT~pll_ref_clk => ~NO_FANOUT~pll_mem_clk <= pll.CLKpll_write_clk <= pll.CLK1pll_write_clk_pre_phy_clk <= pll.CLK1pll_addr_cmd_clk <= pll.CLKpll_avl_clk <= pll.CLKpll_config_clk <= pll.CLKpll_locked <= <GND>afi_clk <= pll.CLKpll_mem_phy_clk <= pll.CLKafi_phy_clk <= pll.CLKpll_avl_phy_clk <= pll.CLKafi_half_clk <= pll.CLK|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0global_reset_n => global_reset_n.IN1soft_reset_n => comb.IN0csr_soft_reset_req => comb.IN1parallelterminationcontrol[0] => parallelterminationcontrol[0].IN1parallelterminationcontrol[1] => parallelterminationcontrol[1].IN1parallelterminationcontrol[2] => parallelterminationcontrol[2].IN1parallelterminationcontrol[3] => parallelterminationcontrol[3].IN1parallelterminationcontrol[4] => parallelterminationcontrol[4].IN1parallelterminationcontrol[5] => parallelterminationcontrol[5].IN1parallelterminationcontrol[6] => parallelterminationcontrol[6].IN1parallelterminationcontrol[7] => parallelterminationcontrol[7].IN1parallelterminationcontrol[8] => parallelterminationcontrol[8].IN1parallelterminationcontrol[9] => parallelterminationcontrol[9].IN1parallelterminationcontrol[10] => parallelterminationcontrol[10].IN1parallelterminationcontrol[11] => parallelterminationcontrol[11].IN1parallelterminationcontrol[12] => parallelterminationcontrol[12].IN1parallelterminationcontrol[13] => parallelterminationcontrol[13].IN1parallelterminationcontrol[14] => parallelterminationcontrol[14].IN1parallelterminationcontrol[15] => parallelterminationcontrol[15].IN1seriesterminationcontrol[0] => seriesterminationcontrol[0].IN1seriesterminationcontrol[1] => seriesterminationcontrol[1].IN1seriesterminationcontrol[2] => seriesterminationcontrol[2].IN1seriesterminationcontrol[3] => seriesterminationcontrol[3].IN1seriesterminationcontrol[4] => seriesterminationcontrol[4].IN1seriesterminationcontrol[5] => seriesterminationcontrol[5].IN1seriesterminationcontrol[6] => seriesterminationcontrol[6].IN1seriesterminationcontrol[7] => seriesterminationcontrol[7].IN1seriesterminationcontrol[8] => seriesterminationcontrol[8].IN1seriesterminationcontrol[9] => seriesterminationcontrol[9].IN1seriesterminationcontrol[10] => seriesterminationcontrol[10].IN1seriesterminationcontrol[11] => seriesterminationcontrol[11].IN1seriesterminationcontrol[12] => seriesterminationcontrol[12].IN1seriesterminationcontrol[13] => seriesterminationcontrol[13].IN1seriesterminationcontrol[14] => seriesterminationcontrol[14].IN1seriesterminationcontrol[15] => seriesterminationcontrol[15].IN1pll_mem_clk => pll_mem_clk.IN1pll_write_clk => pll_dqs_ena_clk.IN2pll_write_clk_pre_phy_clk => pll_write_clk_pre_phy_clk.IN1pll_addr_cmd_clk => pll_addr_cmd_clk.IN1pll_avl_clk => pll_avl_clk.IN1pll_config_clk => pll_config_clk.IN1pll_mem_phy_clk => pll_mem_phy_clk.IN1afi_phy_clk => afi_phy_clk.IN1pll_avl_phy_clk => pll_avl_phy_clk.IN1pll_locked => pll_locked.IN1dll_pll_locked <= hps_sdram_p0_acv_hard_memphy:umemphy.dll_pll_lockeddll_delayctrl[0] => dll_delayctrl[0].IN1dll_delayctrl[1] => dll_delayctrl[1].IN1dll_delayctrl[2] => dll_delayctrl[2].IN1dll_delayctrl[3] => dll_delayctrl[3].IN1dll_delayctrl[4] => dll_delayctrl[4].IN1dll_delayctrl[5] => dll_delayctrl[5].IN1dll_delayctrl[6] => dll_delayctrl[6].IN1dll_clk <= hps_sdram_p0_acv_hard_memphy:umemphy.dll_clkctl_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.ctl_reset_nafi_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_reset_nafi_reset_export_n <= hps_sdram_p0_acv_hard_memphy:umemphy.ctl_reset_export_nafi_clk => afi_clk.IN2afi_half_clk => afi_half_clk.IN1afi_addr[0] => afi_addr[0].IN1afi_addr[1] => afi_addr[1].IN1afi_addr[2] => afi_addr[2].IN1afi_addr[3] => afi_addr[3].IN1afi_addr[4] => afi_addr[4].IN1afi_addr[5] => afi_addr[5].IN1afi_addr[6] => afi_addr[6].IN1afi_addr[7] => afi_addr[7].IN1afi_addr[8] => afi_addr[8].IN1afi_addr[9] => afi_addr[9].IN1afi_addr[10] => afi_addr[10].IN1afi_addr[11] => afi_addr[11].IN1afi_addr[12] => afi_addr[12].IN1afi_addr[13] => afi_addr[13].IN1afi_addr[14] => afi_addr[14].IN1afi_addr[15] => afi_addr[15].IN1afi_addr[16] => afi_addr[16].IN1afi_addr[17] => afi_addr[17].IN1afi_addr[18] => afi_addr[18].IN1afi_addr[19] => afi_addr[19].IN1afi_ba[0] => afi_ba[0].IN1afi_ba[1] => afi_ba[1].IN1afi_ba[2] => afi_ba[2].IN1afi_cke[0] => afi_cke[0].IN1afi_cke[1] => afi_cke[1].IN1afi_cs_n[0] => afi_cs_n[0].IN1afi_cs_n[1] => afi_cs_n[1].IN1afi_ras_n[0] => afi_ras_n[0].IN1afi_we_n[0] => afi_we_n[0].IN1afi_cas_n[0] => afi_cas_n[0].IN1afi_rst_n[0] => afi_rst_n[0].IN1afi_odt[0] => afi_odt[0].IN1afi_odt[1] => afi_odt[1].IN1afi_mem_clk_disable[0] => afi_mem_clk_disable[0].IN1afi_dqs_burst[0] => afi_dqs_burst[0].IN1afi_dqs_burst[1] => afi_dqs_burst[1].IN1afi_dqs_burst[2] => afi_dqs_burst[2].IN1afi_dqs_burst[3] => afi_dqs_burst[3].IN1afi_dqs_burst[4] => afi_dqs_burst[4].IN1afi_wdata[0] => afi_wdata[0].IN1afi_wdata[1] => afi_wdata[1].IN1afi_wdata[2] => afi_wdata[2].IN1afi_wdata[3] => afi_wdata[3].IN1afi_wdata[4] => afi_wdata[4].IN1afi_wdata[5] => afi_wdata[5].IN1afi_wdata[6] => afi_wdata[6].IN1afi_wdata[7] => afi_wdata[7].IN1afi_wdata[8] => afi_wdata[8].IN1afi_wdata[9] => afi_wdata[9].IN1afi_wdata[10] => afi_wdata[10].IN1afi_wdata[11] => afi_wdata[11].IN1afi_wdata[12] => afi_wdata[12].IN1afi_wdata[13] => afi_wdata[13].IN1afi_wdata[14] => afi_wdata[14].IN1afi_wdata[15] => afi_wdata[15].IN1afi_wdata[16] => afi_wdata[16].IN1afi_wdata[17] => afi_wdata[17].IN1afi_wdata[18] => afi_wdata[18].IN1afi_wdata[19] => afi_wdata[19].IN1afi_wdata[20] => afi_wdata[20].IN1afi_wdata[21] => afi_wdata[21].IN1afi_wdata[22] => afi_wdata[22].IN1afi_wdata[23] => afi_wdata[23].IN1afi_wdata[24] => afi_wdata[24].IN1afi_wdata[25] => afi_wdata[25].IN1afi_wdata[26] => afi_wdata[26].IN1afi_wdata[27] => afi_wdata[27].IN1afi_wdata[28] => afi_wdata[28].IN1afi_wdata[29] => afi_wdata[29].IN1afi_wdata[30] => afi_wdata[30].IN1afi_wdata[31] => afi_wdata[31].IN1afi_wdata[32] => afi_wdata[32].IN1afi_wdata[33] => afi_wdata[33].IN1afi_wdata[34] => afi_wdata[34].IN1afi_wdata[35] => afi_wdata[35].IN1afi_wdata[36] => afi_wdata[36].IN1afi_wdata[37] => afi_wdata[37].IN1afi_wdata[38] => afi_wdata[38].IN1afi_wdata[39] => afi_wdata[39].IN1afi_wdata[40] => afi_wdata[40].IN1afi_wdata[41] => afi_wdata[41].IN1afi_wdata[42] => afi_wdata[42].IN1afi_wdata[43] => afi_wdata[43].IN1afi_wdata[44] => afi_wdata[44].IN1afi_wdata[45] => afi_wdata[45].IN1afi_wdata[46] => afi_wdata[46].IN1afi_wdata[47] => afi_wdata[47].IN1afi_wdata[48] => afi_wdata[48].IN1afi_wdata[49] => afi_wdata[49].IN1afi_wdata[50] => afi_wdata[50].IN1afi_wdata[51] => afi_wdata[51].IN1afi_wdata[52] => afi_wdata[52].IN1afi_wdata[53] => afi_wdata[53].IN1afi_wdata[54] => afi_wdata[54].IN1afi_wdata[55] => afi_wdata[55].IN1afi_wdata[56] => afi_wdata[56].IN1afi_wdata[57] => afi_wdata[57].IN1afi_wdata[58] => afi_wdata[58].IN1afi_wdata[59] => afi_wdata[59].IN1afi_wdata[60] => afi_wdata[60].IN1afi_wdata[61] => afi_wdata[61].IN1afi_wdata[62] => afi_wdata[62].IN1afi_wdata[63] => afi_wdata[63].IN1afi_wdata[64] => afi_wdata[64].IN1afi_wdata[65] => afi_wdata[65].IN1afi_wdata[66] => afi_wdata[66].IN1afi_wdata[67] => afi_wdata[67].IN1afi_wdata[68] => afi_wdata[68].IN1afi_wdata[69] => afi_wdata[69].IN1afi_wdata[70] => afi_wdata[70].IN1afi_wdata[71] => afi_wdata[71].IN1afi_wdata[72] => afi_wdata[72].IN1afi_wdata[73] => afi_wdata[73].IN1afi_wdata[74] => afi_wdata[74].IN1afi_wdata[75] => afi_wdata[75].IN1afi_wdata[76] => afi_wdata[76].IN1afi_wdata[77] => afi_wdata[77].IN1afi_wdata[78] => afi_wdata[78].IN1afi_wdata[79] => afi_wdata[79].IN1afi_wdata_valid[0] => afi_wdata_valid[0].IN1afi_wdata_valid[1] => afi_wdata_valid[1].IN1afi_wdata_valid[2] => afi_wdata_valid[2].IN1afi_wdata_valid[3] => afi_wdata_valid[3].IN1afi_wdata_valid[4] => afi_wdata_valid[4].IN1afi_dm[0] => afi_dm[0].IN1afi_dm[1] => afi_dm[1].IN1afi_dm[2] => afi_dm[2].IN1afi_dm[3] => afi_dm[3].IN1afi_dm[4] => afi_dm[4].IN1afi_dm[5] => afi_dm[5].IN1afi_dm[6] => afi_dm[6].IN1afi_dm[7] => afi_dm[7].IN1afi_dm[8] => afi_dm[8].IN1afi_dm[9] => afi_dm[9].IN1afi_rdata[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[5] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[6] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[7] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[8] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[9] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[10] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[11] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[12] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[13] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[14] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[15] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[16] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[17] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[18] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[19] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[20] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[21] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[22] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[23] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[24] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[25] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[26] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[27] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[28] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[29] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[30] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[31] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[32] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[33] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[34] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[35] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[36] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[37] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[38] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[39] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[40] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[41] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[42] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[43] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[44] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[45] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[46] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[47] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[48] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[49] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[50] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[51] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[52] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[53] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[54] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[55] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[56] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[57] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[58] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[59] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[60] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[61] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[62] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[63] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[64] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[65] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[66] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[67] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[68] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[69] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[70] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[71] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[72] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[73] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[74] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[75] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[76] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[77] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[78] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata[79] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdataafi_rdata_en[0] => afi_rdata_en[0].IN1afi_rdata_en[1] => afi_rdata_en[1].IN1afi_rdata_en[2] => afi_rdata_en[2].IN1afi_rdata_en[3] => afi_rdata_en[3].IN1afi_rdata_en[4] => afi_rdata_en[4].IN1afi_rdata_en_full[0] => afi_rdata_en_full[0].IN1afi_rdata_en_full[1] => afi_rdata_en_full[1].IN1afi_rdata_en_full[2] => afi_rdata_en_full[2].IN1afi_rdata_en_full[3] => afi_rdata_en_full[3].IN1afi_rdata_en_full[4] => afi_rdata_en_full[4].IN1afi_rdata_valid[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rdata_validafi_cal_success <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_cal_successafi_cal_fail <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_cal_failafi_wlat[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_wlatafi_wlat[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_wlatafi_wlat[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_wlatafi_wlat[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_wlatafi_rlat[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rlatafi_rlat[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rlatafi_rlat[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rlatafi_rlat[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rlatafi_rlat[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.afi_rlatavl_read => avl_read.IN1avl_write => avl_write.IN1avl_address[0] => avl_address[0].IN1avl_address[1] => avl_address[1].IN1avl_address[2] => avl_address[2].IN1avl_address[3] => avl_address[3].IN1avl_address[4] => avl_address[4].IN1avl_address[5] => avl_address[5].IN1avl_address[6] => avl_address[6].IN1avl_address[7] => avl_address[7].IN1avl_address[8] => avl_address[8].IN1avl_address[9] => avl_address[9].IN1avl_address[10] => avl_address[10].IN1avl_address[11] => avl_address[11].IN1avl_address[12] => avl_address[12].IN1avl_address[13] => avl_address[13].IN1avl_address[14] => avl_address[14].IN1avl_address[15] => avl_address[15].IN1avl_writedata[0] => avl_writedata[0].IN1avl_writedata[1] => avl_writedata[1].IN1avl_writedata[2] => avl_writedata[2].IN1avl_writedata[3] => avl_writedata[3].IN1avl_writedata[4] => avl_writedata[4].IN1avl_writedata[5] => avl_writedata[5].IN1avl_writedata[6] => avl_writedata[6].IN1avl_writedata[7] => avl_writedata[7].IN1avl_writedata[8] => avl_writedata[8].IN1avl_writedata[9] => avl_writedata[9].IN1avl_writedata[10] => avl_writedata[10].IN1avl_writedata[11] => avl_writedata[11].IN1avl_writedata[12] => avl_writedata[12].IN1avl_writedata[13] => avl_writedata[13].IN1avl_writedata[14] => avl_writedata[14].IN1avl_writedata[15] => avl_writedata[15].IN1avl_writedata[16] => avl_writedata[16].IN1avl_writedata[17] => avl_writedata[17].IN1avl_writedata[18] => avl_writedata[18].IN1avl_writedata[19] => avl_writedata[19].IN1avl_writedata[20] => avl_writedata[20].IN1avl_writedata[21] => avl_writedata[21].IN1avl_writedata[22] => avl_writedata[22].IN1avl_writedata[23] => avl_writedata[23].IN1avl_writedata[24] => avl_writedata[24].IN1avl_writedata[25] => avl_writedata[25].IN1avl_writedata[26] => avl_writedata[26].IN1avl_writedata[27] => avl_writedata[27].IN1avl_writedata[28] => avl_writedata[28].IN1avl_writedata[29] => avl_writedata[29].IN1avl_writedata[30] => avl_writedata[30].IN1avl_writedata[31] => avl_writedata[31].IN1avl_waitrequest <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_waitrequestavl_readdata[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[5] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[6] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[7] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[8] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[9] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[10] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[11] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[12] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[13] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[14] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[15] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[16] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[17] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[18] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[19] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[20] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[21] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[22] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[23] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[24] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[25] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[26] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[27] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[28] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[29] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[30] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdataavl_readdata[31] <= hps_sdram_p0_acv_hard_memphy:umemphy.avl_readdatacfg_addlat[0] => cfg_addlat[0].IN1cfg_addlat[1] => cfg_addlat[1].IN1cfg_addlat[2] => cfg_addlat[2].IN1cfg_addlat[3] => cfg_addlat[3].IN1cfg_addlat[4] => cfg_addlat[4].IN1cfg_addlat[5] => cfg_addlat[5].IN1cfg_addlat[6] => cfg_addlat[6].IN1cfg_addlat[7] => cfg_addlat[7].IN1cfg_bankaddrwidth[0] => cfg_bankaddrwidth[0].IN1cfg_bankaddrwidth[1] => cfg_bankaddrwidth[1].IN1cfg_bankaddrwidth[2] => cfg_bankaddrwidth[2].IN1cfg_bankaddrwidth[3] => cfg_bankaddrwidth[3].IN1cfg_bankaddrwidth[4] => cfg_bankaddrwidth[4].IN1cfg_bankaddrwidth[5] => cfg_bankaddrwidth[5].IN1cfg_bankaddrwidth[6] => cfg_bankaddrwidth[6].IN1cfg_bankaddrwidth[7] => cfg_bankaddrwidth[7].IN1cfg_caswrlat[0] => cfg_caswrlat[0].IN1cfg_caswrlat[1] => cfg_caswrlat[1].IN1cfg_caswrlat[2] => cfg_caswrlat[2].IN1cfg_caswrlat[3] => cfg_caswrlat[3].IN1cfg_caswrlat[4] => cfg_caswrlat[4].IN1cfg_caswrlat[5] => cfg_caswrlat[5].IN1cfg_caswrlat[6] => cfg_caswrlat[6].IN1cfg_caswrlat[7] => cfg_caswrlat[7].IN1cfg_coladdrwidth[0] => cfg_coladdrwidth[0].IN1cfg_coladdrwidth[1] => cfg_coladdrwidth[1].IN1cfg_coladdrwidth[2] => cfg_coladdrwidth[2].IN1cfg_coladdrwidth[3] => cfg_coladdrwidth[3].IN1cfg_coladdrwidth[4] => cfg_coladdrwidth[4].IN1cfg_coladdrwidth[5] => cfg_coladdrwidth[5].IN1cfg_coladdrwidth[6] => cfg_coladdrwidth[6].IN1cfg_coladdrwidth[7] => cfg_coladdrwidth[7].IN1cfg_csaddrwidth[0] => cfg_csaddrwidth[0].IN1cfg_csaddrwidth[1] => cfg_csaddrwidth[1].IN1cfg_csaddrwidth[2] => cfg_csaddrwidth[2].IN1cfg_csaddrwidth[3] => cfg_csaddrwidth[3].IN1cfg_csaddrwidth[4] => cfg_csaddrwidth[4].IN1cfg_csaddrwidth[5] => cfg_csaddrwidth[5].IN1cfg_csaddrwidth[6] => cfg_csaddrwidth[6].IN1cfg_csaddrwidth[7] => cfg_csaddrwidth[7].IN1cfg_devicewidth[0] => cfg_devicewidth[0].IN1cfg_devicewidth[1] => cfg_devicewidth[1].IN1cfg_devicewidth[2] => cfg_devicewidth[2].IN1cfg_devicewidth[3] => cfg_devicewidth[3].IN1cfg_devicewidth[4] => cfg_devicewidth[4].IN1cfg_devicewidth[5] => cfg_devicewidth[5].IN1cfg_devicewidth[6] => cfg_devicewidth[6].IN1cfg_devicewidth[7] => cfg_devicewidth[7].IN1cfg_dramconfig[0] => cfg_dramconfig[0].IN1cfg_dramconfig[1] => cfg_dramconfig[1].IN1cfg_dramconfig[2] => cfg_dramconfig[2].IN1cfg_dramconfig[3] => cfg_dramconfig[3].IN1cfg_dramconfig[4] => cfg_dramconfig[4].IN1cfg_dramconfig[5] => cfg_dramconfig[5].IN1cfg_dramconfig[6] => cfg_dramconfig[6].IN1cfg_dramconfig[7] => cfg_dramconfig[7].IN1cfg_dramconfig[8] => cfg_dramconfig[8].IN1cfg_dramconfig[9] => cfg_dramconfig[9].IN1cfg_dramconfig[10] => cfg_dramconfig[10].IN1cfg_dramconfig[11] => cfg_dramconfig[11].IN1cfg_dramconfig[12] => cfg_dramconfig[12].IN1cfg_dramconfig[13] => cfg_dramconfig[13].IN1cfg_dramconfig[14] => cfg_dramconfig[14].IN1cfg_dramconfig[15] => cfg_dramconfig[15].IN1cfg_dramconfig[16] => cfg_dramconfig[16].IN1cfg_dramconfig[17] => cfg_dramconfig[17].IN1cfg_dramconfig[18] => cfg_dramconfig[18].IN1cfg_dramconfig[19] => cfg_dramconfig[19].IN1cfg_dramconfig[20] => cfg_dramconfig[20].IN1cfg_dramconfig[21] => cfg_dramconfig[21].IN1cfg_dramconfig[22] => cfg_dramconfig[22].IN1cfg_dramconfig[23] => cfg_dramconfig[23].IN1cfg_interfacewidth[0] => cfg_interfacewidth[0].IN1cfg_interfacewidth[1] => cfg_interfacewidth[1].IN1cfg_interfacewidth[2] => cfg_interfacewidth[2].IN1cfg_interfacewidth[3] => cfg_interfacewidth[3].IN1cfg_interfacewidth[4] => cfg_interfacewidth[4].IN1cfg_interfacewidth[5] => cfg_interfacewidth[5].IN1cfg_interfacewidth[6] => cfg_interfacewidth[6].IN1cfg_interfacewidth[7] => cfg_interfacewidth[7].IN1cfg_rowaddrwidth[0] => cfg_rowaddrwidth[0].IN1cfg_rowaddrwidth[1] => cfg_rowaddrwidth[1].IN1cfg_rowaddrwidth[2] => cfg_rowaddrwidth[2].IN1cfg_rowaddrwidth[3] => cfg_rowaddrwidth[3].IN1cfg_rowaddrwidth[4] => cfg_rowaddrwidth[4].IN1cfg_rowaddrwidth[5] => cfg_rowaddrwidth[5].IN1cfg_rowaddrwidth[6] => cfg_rowaddrwidth[6].IN1cfg_rowaddrwidth[7] => cfg_rowaddrwidth[7].IN1cfg_tcl[0] => cfg_tcl[0].IN1cfg_tcl[1] => cfg_tcl[1].IN1cfg_tcl[2] => cfg_tcl[2].IN1cfg_tcl[3] => cfg_tcl[3].IN1cfg_tcl[4] => cfg_tcl[4].IN1cfg_tcl[5] => cfg_tcl[5].IN1cfg_tcl[6] => cfg_tcl[6].IN1cfg_tcl[7] => cfg_tcl[7].IN1cfg_tmrd[0] => cfg_tmrd[0].IN1cfg_tmrd[1] => cfg_tmrd[1].IN1cfg_tmrd[2] => cfg_tmrd[2].IN1cfg_tmrd[3] => cfg_tmrd[3].IN1cfg_tmrd[4] => cfg_tmrd[4].IN1cfg_tmrd[5] => cfg_tmrd[5].IN1cfg_tmrd[6] => cfg_tmrd[6].IN1cfg_tmrd[7] => cfg_tmrd[7].IN1cfg_trefi[0] => cfg_trefi[0].IN1cfg_trefi[1] => cfg_trefi[1].IN1cfg_trefi[2] => cfg_trefi[2].IN1cfg_trefi[3] => cfg_trefi[3].IN1cfg_trefi[4] => cfg_trefi[4].IN1cfg_trefi[5] => cfg_trefi[5].IN1cfg_trefi[6] => cfg_trefi[6].IN1cfg_trefi[7] => cfg_trefi[7].IN1cfg_trefi[8] => cfg_trefi[8].IN1cfg_trefi[9] => cfg_trefi[9].IN1cfg_trefi[10] => cfg_trefi[10].IN1cfg_trefi[11] => cfg_trefi[11].IN1cfg_trefi[12] => cfg_trefi[12].IN1cfg_trefi[13] => cfg_trefi[13].IN1cfg_trefi[14] => cfg_trefi[14].IN1cfg_trefi[15] => cfg_trefi[15].IN1cfg_trfc[0] => cfg_trfc[0].IN1cfg_trfc[1] => cfg_trfc[1].IN1cfg_trfc[2] => cfg_trfc[2].IN1cfg_trfc[3] => cfg_trfc[3].IN1cfg_trfc[4] => cfg_trfc[4].IN1cfg_trfc[5] => cfg_trfc[5].IN1cfg_trfc[6] => cfg_trfc[6].IN1cfg_trfc[7] => cfg_trfc[7].IN1cfg_twr[0] => cfg_twr[0].IN1cfg_twr[1] => cfg_twr[1].IN1cfg_twr[2] => cfg_twr[2].IN1cfg_twr[3] => cfg_twr[3].IN1cfg_twr[4] => cfg_twr[4].IN1cfg_twr[5] => cfg_twr[5].IN1cfg_twr[6] => cfg_twr[6].IN1cfg_twr[7] => cfg_twr[7].IN1io_intaddrdout[0] => io_intaddrdout[0].IN1io_intaddrdout[1] => io_intaddrdout[1].IN1io_intaddrdout[2] => io_intaddrdout[2].IN1io_intaddrdout[3] => io_intaddrdout[3].IN1io_intaddrdout[4] => io_intaddrdout[4].IN1io_intaddrdout[5] => io_intaddrdout[5].IN1io_intaddrdout[6] => io_intaddrdout[6].IN1io_intaddrdout[7] => io_intaddrdout[7].IN1io_intaddrdout[8] => io_intaddrdout[8].IN1io_intaddrdout[9] => io_intaddrdout[9].IN1io_intaddrdout[10] => io_intaddrdout[10].IN1io_intaddrdout[11] => io_intaddrdout[11].IN1io_intaddrdout[12] => io_intaddrdout[12].IN1io_intaddrdout[13] => io_intaddrdout[13].IN1io_intaddrdout[14] => io_intaddrdout[14].IN1io_intaddrdout[15] => io_intaddrdout[15].IN1io_intaddrdout[16] => io_intaddrdout[16].IN1io_intaddrdout[17] => io_intaddrdout[17].IN1io_intaddrdout[18] => io_intaddrdout[18].IN1io_intaddrdout[19] => io_intaddrdout[19].IN1io_intaddrdout[20] => io_intaddrdout[20].IN1io_intaddrdout[21] => io_intaddrdout[21].IN1io_intaddrdout[22] => io_intaddrdout[22].IN1io_intaddrdout[23] => io_intaddrdout[23].IN1io_intaddrdout[24] => io_intaddrdout[24].IN1io_intaddrdout[25] => io_intaddrdout[25].IN1io_intaddrdout[26] => io_intaddrdout[26].IN1io_intaddrdout[27] => io_intaddrdout[27].IN1io_intaddrdout[28] => io_intaddrdout[28].IN1io_intaddrdout[29] => io_intaddrdout[29].IN1io_intaddrdout[30] => io_intaddrdout[30].IN1io_intaddrdout[31] => io_intaddrdout[31].IN1io_intaddrdout[32] => io_intaddrdout[32].IN1io_intaddrdout[33] => io_intaddrdout[33].IN1io_intaddrdout[34] => io_intaddrdout[34].IN1io_intaddrdout[35] => io_intaddrdout[35].IN1io_intaddrdout[36] => io_intaddrdout[36].IN1io_intaddrdout[37] => io_intaddrdout[37].IN1io_intaddrdout[38] => io_intaddrdout[38].IN1io_intaddrdout[39] => io_intaddrdout[39].IN1io_intaddrdout[40] => io_intaddrdout[40].IN1io_intaddrdout[41] => io_intaddrdout[41].IN1io_intaddrdout[42] => io_intaddrdout[42].IN1io_intaddrdout[43] => io_intaddrdout[43].IN1io_intaddrdout[44] => io_intaddrdout[44].IN1io_intaddrdout[45] => io_intaddrdout[45].IN1io_intaddrdout[46] => io_intaddrdout[46].IN1io_intaddrdout[47] => io_intaddrdout[47].IN1io_intaddrdout[48] => io_intaddrdout[48].IN1io_intaddrdout[49] => io_intaddrdout[49].IN1io_intaddrdout[50] => io_intaddrdout[50].IN1io_intaddrdout[51] => io_intaddrdout[51].IN1io_intaddrdout[52] => io_intaddrdout[52].IN1io_intaddrdout[53] => io_intaddrdout[53].IN1io_intaddrdout[54] => io_intaddrdout[54].IN1io_intaddrdout[55] => io_intaddrdout[55].IN1io_intaddrdout[56] => io_intaddrdout[56].IN1io_intaddrdout[57] => io_intaddrdout[57].IN1io_intaddrdout[58] => io_intaddrdout[58].IN1io_intaddrdout[59] => io_intaddrdout[59].IN1io_intaddrdout[60] => io_intaddrdout[60].IN1io_intaddrdout[61] => io_intaddrdout[61].IN1io_intaddrdout[62] => io_intaddrdout[62].IN1io_intaddrdout[63] => io_intaddrdout[63].IN1io_intbadout[0] => io_intbadout[0].IN1io_intbadout[1] => io_intbadout[1].IN1io_intbadout[2] => io_intbadout[2].IN1io_intbadout[3] => io_intbadout[3].IN1io_intbadout[4] => io_intbadout[4].IN1io_intbadout[5] => io_intbadout[5].IN1io_intbadout[6] => io_intbadout[6].IN1io_intbadout[7] => io_intbadout[7].IN1io_intbadout[8] => io_intbadout[8].IN1io_intbadout[9] => io_intbadout[9].IN1io_intbadout[10] => io_intbadout[10].IN1io_intbadout[11] => io_intbadout[11].IN1io_intcasndout[0] => io_intcasndout[0].IN1io_intcasndout[1] => io_intcasndout[1].IN1io_intcasndout[2] => io_intcasndout[2].IN1io_intcasndout[3] => io_intcasndout[3].IN1io_intckdout[0] => io_intckdout[0].IN1io_intckdout[1] => io_intckdout[1].IN1io_intckdout[2] => io_intckdout[2].IN1io_intckdout[3] => io_intckdout[3].IN1io_intckedout[0] => io_intckedout[0].IN1io_intckedout[1] => io_intckedout[1].IN1io_intckedout[2] => io_intckedout[2].IN1io_intckedout[3] => io_intckedout[3].IN1io_intckedout[4] => io_intckedout[4].IN1io_intckedout[5] => io_intckedout[5].IN1io_intckedout[6] => io_intckedout[6].IN1io_intckedout[7] => io_intckedout[7].IN1io_intckndout[0] => io_intckndout[0].IN1io_intckndout[1] => io_intckndout[1].IN1io_intckndout[2] => io_intckndout[2].IN1io_intckndout[3] => io_intckndout[3].IN1io_intcsndout[0] => io_intcsndout[0].IN1io_intcsndout[1] => io_intcsndout[1].IN1io_intcsndout[2] => io_intcsndout[2].IN1io_intcsndout[3] => io_intcsndout[3].IN1io_intcsndout[4] => io_intcsndout[4].IN1io_intcsndout[5] => io_intcsndout[5].IN1io_intcsndout[6] => io_intcsndout[6].IN1io_intcsndout[7] => io_intcsndout[7].IN1io_intdmdout[0] => io_intdmdout[0].IN1io_intdmdout[1] => io_intdmdout[1].IN1io_intdmdout[2] => io_intdmdout[2].IN1io_intdmdout[3] => io_intdmdout[3].IN1io_intdmdout[4] => io_intdmdout[4].IN1io_intdmdout[5] => io_intdmdout[5].IN1io_intdmdout[6] => io_intdmdout[6].IN1io_intdmdout[7] => io_intdmdout[7].IN1io_intdmdout[8] => io_intdmdout[8].IN1io_intdmdout[9] => io_intdmdout[9].IN1io_intdmdout[10] => io_intdmdout[10].IN1io_intdmdout[11] => io_intdmdout[11].IN1io_intdmdout[12] => io_intdmdout[12].IN1io_intdmdout[13] => io_intdmdout[13].IN1io_intdmdout[14] => io_intdmdout[14].IN1io_intdmdout[15] => io_intdmdout[15].IN1io_intdmdout[16] => io_intdmdout[16].IN1io_intdmdout[17] => io_intdmdout[17].IN1io_intdmdout[18] => io_intdmdout[18].IN1io_intdmdout[19] => io_intdmdout[19].IN1io_intdqdin[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[5] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[6] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[7] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[8] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[9] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[10] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[11] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[12] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[13] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[14] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[15] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[16] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[17] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[18] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[19] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[20] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[21] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[22] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[23] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[24] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[25] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[26] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[27] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[28] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[29] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[30] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[31] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[32] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[33] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[34] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[35] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[36] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[37] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[38] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[39] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[40] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[41] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[42] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[43] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[44] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[45] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[46] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[47] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[48] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[49] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[50] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[51] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[52] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[53] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[54] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[55] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[56] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[57] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[58] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[59] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[60] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[61] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[62] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[63] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[64] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[65] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[66] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[67] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[68] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[69] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[70] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[71] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[72] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[73] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[74] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[75] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[76] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[77] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[78] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[79] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[80] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[81] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[82] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[83] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[84] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[85] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[86] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[87] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[88] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[89] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[90] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[91] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[92] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[93] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[94] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[95] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[96] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[97] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[98] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[99] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[100] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[101] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[102] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[103] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[104] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[105] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[106] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[107] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[108] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[109] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[110] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[111] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[112] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[113] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[114] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[115] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[116] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[117] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[118] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[119] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[120] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[121] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[122] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[123] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[124] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[125] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[126] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[127] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[128] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[129] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[130] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[131] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[132] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[133] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[134] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[135] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[136] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[137] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[138] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[139] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[140] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[141] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[142] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[143] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[144] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[145] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[146] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[147] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[148] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[149] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[150] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[151] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[152] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[153] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[154] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[155] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[156] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[157] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[158] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[159] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[160] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[161] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[162] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[163] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[164] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[165] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[166] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[167] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[168] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[169] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[170] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[171] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[172] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[173] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[174] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[175] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[176] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[177] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[178] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdin[179] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqdinio_intdqdout[0] => io_intdqdout[0].IN1io_intdqdout[1] => io_intdqdout[1].IN1io_intdqdout[2] => io_intdqdout[2].IN1io_intdqdout[3] => io_intdqdout[3].IN1io_intdqdout[4] => io_intdqdout[4].IN1io_intdqdout[5] => io_intdqdout[5].IN1io_intdqdout[6] => io_intdqdout[6].IN1io_intdqdout[7] => io_intdqdout[7].IN1io_intdqdout[8] => io_intdqdout[8].IN1io_intdqdout[9] => io_intdqdout[9].IN1io_intdqdout[10] => io_intdqdout[10].IN1io_intdqdout[11] => io_intdqdout[11].IN1io_intdqdout[12] => io_intdqdout[12].IN1io_intdqdout[13] => io_intdqdout[13].IN1io_intdqdout[14] => io_intdqdout[14].IN1io_intdqdout[15] => io_intdqdout[15].IN1io_intdqdout[16] => io_intdqdout[16].IN1io_intdqdout[17] => io_intdqdout[17].IN1io_intdqdout[18] => io_intdqdout[18].IN1io_intdqdout[19] => io_intdqdout[19].IN1io_intdqdout[20] => io_intdqdout[20].IN1io_intdqdout[21] => io_intdqdout[21].IN1io_intdqdout[22] => io_intdqdout[22].IN1io_intdqdout[23] => io_intdqdout[23].IN1io_intdqdout[24] => io_intdqdout[24].IN1io_intdqdout[25] => io_intdqdout[25].IN1io_intdqdout[26] => io_intdqdout[26].IN1io_intdqdout[27] => io_intdqdout[27].IN1io_intdqdout[28] => io_intdqdout[28].IN1io_intdqdout[29] => io_intdqdout[29].IN1io_intdqdout[30] => io_intdqdout[30].IN1io_intdqdout[31] => io_intdqdout[31].IN1io_intdqdout[32] => io_intdqdout[32].IN1io_intdqdout[33] => io_intdqdout[33].IN1io_intdqdout[34] => io_intdqdout[34].IN1io_intdqdout[35] => io_intdqdout[35].IN1io_intdqdout[36] => io_intdqdout[36].IN1io_intdqdout[37] => io_intdqdout[37].IN1io_intdqdout[38] => io_intdqdout[38].IN1io_intdqdout[39] => io_intdqdout[39].IN1io_intdqdout[40] => io_intdqdout[40].IN1io_intdqdout[41] => io_intdqdout[41].IN1io_intdqdout[42] => io_intdqdout[42].IN1io_intdqdout[43] => io_intdqdout[43].IN1io_intdqdout[44] => io_intdqdout[44].IN1io_intdqdout[45] => io_intdqdout[45].IN1io_intdqdout[46] => io_intdqdout[46].IN1io_intdqdout[47] => io_intdqdout[47].IN1io_intdqdout[48] => io_intdqdout[48].IN1io_intdqdout[49] => io_intdqdout[49].IN1io_intdqdout[50] => io_intdqdout[50].IN1io_intdqdout[51] => io_intdqdout[51].IN1io_intdqdout[52] => io_intdqdout[52].IN1io_intdqdout[53] => io_intdqdout[53].IN1io_intdqdout[54] => io_intdqdout[54].IN1io_intdqdout[55] => io_intdqdout[55].IN1io_intdqdout[56] => io_intdqdout[56].IN1io_intdqdout[57] => io_intdqdout[57].IN1io_intdqdout[58] => io_intdqdout[58].IN1io_intdqdout[59] => io_intdqdout[59].IN1io_intdqdout[60] => io_intdqdout[60].IN1io_intdqdout[61] => io_intdqdout[61].IN1io_intdqdout[62] => io_intdqdout[62].IN1io_intdqdout[63] => io_intdqdout[63].IN1io_intdqdout[64] => io_intdqdout[64].IN1io_intdqdout[65] => io_intdqdout[65].IN1io_intdqdout[66] => io_intdqdout[66].IN1io_intdqdout[67] => io_intdqdout[67].IN1io_intdqdout[68] => io_intdqdout[68].IN1io_intdqdout[69] => io_intdqdout[69].IN1io_intdqdout[70] => io_intdqdout[70].IN1io_intdqdout[71] => io_intdqdout[71].IN1io_intdqdout[72] => io_intdqdout[72].IN1io_intdqdout[73] => io_intdqdout[73].IN1io_intdqdout[74] => io_intdqdout[74].IN1io_intdqdout[75] => io_intdqdout[75].IN1io_intdqdout[76] => io_intdqdout[76].IN1io_intdqdout[77] => io_intdqdout[77].IN1io_intdqdout[78] => io_intdqdout[78].IN1io_intdqdout[79] => io_intdqdout[79].IN1io_intdqdout[80] => io_intdqdout[80].IN1io_intdqdout[81] => io_intdqdout[81].IN1io_intdqdout[82] => io_intdqdout[82].IN1io_intdqdout[83] => io_intdqdout[83].IN1io_intdqdout[84] => io_intdqdout[84].IN1io_intdqdout[85] => io_intdqdout[85].IN1io_intdqdout[86] => io_intdqdout[86].IN1io_intdqdout[87] => io_intdqdout[87].IN1io_intdqdout[88] => io_intdqdout[88].IN1io_intdqdout[89] => io_intdqdout[89].IN1io_intdqdout[90] => io_intdqdout[90].IN1io_intdqdout[91] => io_intdqdout[91].IN1io_intdqdout[92] => io_intdqdout[92].IN1io_intdqdout[93] => io_intdqdout[93].IN1io_intdqdout[94] => io_intdqdout[94].IN1io_intdqdout[95] => io_intdqdout[95].IN1io_intdqdout[96] => io_intdqdout[96].IN1io_intdqdout[97] => io_intdqdout[97].IN1io_intdqdout[98] => io_intdqdout[98].IN1io_intdqdout[99] => io_intdqdout[99].IN1io_intdqdout[100] => io_intdqdout[100].IN1io_intdqdout[101] => io_intdqdout[101].IN1io_intdqdout[102] => io_intdqdout[102].IN1io_intdqdout[103] => io_intdqdout[103].IN1io_intdqdout[104] => io_intdqdout[104].IN1io_intdqdout[105] => io_intdqdout[105].IN1io_intdqdout[106] => io_intdqdout[106].IN1io_intdqdout[107] => io_intdqdout[107].IN1io_intdqdout[108] => io_intdqdout[108].IN1io_intdqdout[109] => io_intdqdout[109].IN1io_intdqdout[110] => io_intdqdout[110].IN1io_intdqdout[111] => io_intdqdout[111].IN1io_intdqdout[112] => io_intdqdout[112].IN1io_intdqdout[113] => io_intdqdout[113].IN1io_intdqdout[114] => io_intdqdout[114].IN1io_intdqdout[115] => io_intdqdout[115].IN1io_intdqdout[116] => io_intdqdout[116].IN1io_intdqdout[117] => io_intdqdout[117].IN1io_intdqdout[118] => io_intdqdout[118].IN1io_intdqdout[119] => io_intdqdout[119].IN1io_intdqdout[120] => io_intdqdout[120].IN1io_intdqdout[121] => io_intdqdout[121].IN1io_intdqdout[122] => io_intdqdout[122].IN1io_intdqdout[123] => io_intdqdout[123].IN1io_intdqdout[124] => io_intdqdout[124].IN1io_intdqdout[125] => io_intdqdout[125].IN1io_intdqdout[126] => io_intdqdout[126].IN1io_intdqdout[127] => io_intdqdout[127].IN1io_intdqdout[128] => io_intdqdout[128].IN1io_intdqdout[129] => io_intdqdout[129].IN1io_intdqdout[130] => io_intdqdout[130].IN1io_intdqdout[131] => io_intdqdout[131].IN1io_intdqdout[132] => io_intdqdout[132].IN1io_intdqdout[133] => io_intdqdout[133].IN1io_intdqdout[134] => io_intdqdout[134].IN1io_intdqdout[135] => io_intdqdout[135].IN1io_intdqdout[136] => io_intdqdout[136].IN1io_intdqdout[137] => io_intdqdout[137].IN1io_intdqdout[138] => io_intdqdout[138].IN1io_intdqdout[139] => io_intdqdout[139].IN1io_intdqdout[140] => io_intdqdout[140].IN1io_intdqdout[141] => io_intdqdout[141].IN1io_intdqdout[142] => io_intdqdout[142].IN1io_intdqdout[143] => io_intdqdout[143].IN1io_intdqdout[144] => io_intdqdout[144].IN1io_intdqdout[145] => io_intdqdout[145].IN1io_intdqdout[146] => io_intdqdout[146].IN1io_intdqdout[147] => io_intdqdout[147].IN1io_intdqdout[148] => io_intdqdout[148].IN1io_intdqdout[149] => io_intdqdout[149].IN1io_intdqdout[150] => io_intdqdout[150].IN1io_intdqdout[151] => io_intdqdout[151].IN1io_intdqdout[152] => io_intdqdout[152].IN1io_intdqdout[153] => io_intdqdout[153].IN1io_intdqdout[154] => io_intdqdout[154].IN1io_intdqdout[155] => io_intdqdout[155].IN1io_intdqdout[156] => io_intdqdout[156].IN1io_intdqdout[157] => io_intdqdout[157].IN1io_intdqdout[158] => io_intdqdout[158].IN1io_intdqdout[159] => io_intdqdout[159].IN1io_intdqdout[160] => io_intdqdout[160].IN1io_intdqdout[161] => io_intdqdout[161].IN1io_intdqdout[162] => io_intdqdout[162].IN1io_intdqdout[163] => io_intdqdout[163].IN1io_intdqdout[164] => io_intdqdout[164].IN1io_intdqdout[165] => io_intdqdout[165].IN1io_intdqdout[166] => io_intdqdout[166].IN1io_intdqdout[167] => io_intdqdout[167].IN1io_intdqdout[168] => io_intdqdout[168].IN1io_intdqdout[169] => io_intdqdout[169].IN1io_intdqdout[170] => io_intdqdout[170].IN1io_intdqdout[171] => io_intdqdout[171].IN1io_intdqdout[172] => io_intdqdout[172].IN1io_intdqdout[173] => io_intdqdout[173].IN1io_intdqdout[174] => io_intdqdout[174].IN1io_intdqdout[175] => io_intdqdout[175].IN1io_intdqdout[176] => io_intdqdout[176].IN1io_intdqdout[177] => io_intdqdout[177].IN1io_intdqdout[178] => io_intdqdout[178].IN1io_intdqdout[179] => io_intdqdout[179].IN1io_intdqoe[0] => io_intdqoe[0].IN1io_intdqoe[1] => io_intdqoe[1].IN1io_intdqoe[2] => io_intdqoe[2].IN1io_intdqoe[3] => io_intdqoe[3].IN1io_intdqoe[4] => io_intdqoe[4].IN1io_intdqoe[5] => io_intdqoe[5].IN1io_intdqoe[6] => io_intdqoe[6].IN1io_intdqoe[7] => io_intdqoe[7].IN1io_intdqoe[8] => io_intdqoe[8].IN1io_intdqoe[9] => io_intdqoe[9].IN1io_intdqoe[10] => io_intdqoe[10].IN1io_intdqoe[11] => io_intdqoe[11].IN1io_intdqoe[12] => io_intdqoe[12].IN1io_intdqoe[13] => io_intdqoe[13].IN1io_intdqoe[14] => io_intdqoe[14].IN1io_intdqoe[15] => io_intdqoe[15].IN1io_intdqoe[16] => io_intdqoe[16].IN1io_intdqoe[17] => io_intdqoe[17].IN1io_intdqoe[18] => io_intdqoe[18].IN1io_intdqoe[19] => io_intdqoe[19].IN1io_intdqoe[20] => io_intdqoe[20].IN1io_intdqoe[21] => io_intdqoe[21].IN1io_intdqoe[22] => io_intdqoe[22].IN1io_intdqoe[23] => io_intdqoe[23].IN1io_intdqoe[24] => io_intdqoe[24].IN1io_intdqoe[25] => io_intdqoe[25].IN1io_intdqoe[26] => io_intdqoe[26].IN1io_intdqoe[27] => io_intdqoe[27].IN1io_intdqoe[28] => io_intdqoe[28].IN1io_intdqoe[29] => io_intdqoe[29].IN1io_intdqoe[30] => io_intdqoe[30].IN1io_intdqoe[31] => io_intdqoe[31].IN1io_intdqoe[32] => io_intdqoe[32].IN1io_intdqoe[33] => io_intdqoe[33].IN1io_intdqoe[34] => io_intdqoe[34].IN1io_intdqoe[35] => io_intdqoe[35].IN1io_intdqoe[36] => io_intdqoe[36].IN1io_intdqoe[37] => io_intdqoe[37].IN1io_intdqoe[38] => io_intdqoe[38].IN1io_intdqoe[39] => io_intdqoe[39].IN1io_intdqoe[40] => io_intdqoe[40].IN1io_intdqoe[41] => io_intdqoe[41].IN1io_intdqoe[42] => io_intdqoe[42].IN1io_intdqoe[43] => io_intdqoe[43].IN1io_intdqoe[44] => io_intdqoe[44].IN1io_intdqoe[45] => io_intdqoe[45].IN1io_intdqoe[46] => io_intdqoe[46].IN1io_intdqoe[47] => io_intdqoe[47].IN1io_intdqoe[48] => io_intdqoe[48].IN1io_intdqoe[49] => io_intdqoe[49].IN1io_intdqoe[50] => io_intdqoe[50].IN1io_intdqoe[51] => io_intdqoe[51].IN1io_intdqoe[52] => io_intdqoe[52].IN1io_intdqoe[53] => io_intdqoe[53].IN1io_intdqoe[54] => io_intdqoe[54].IN1io_intdqoe[55] => io_intdqoe[55].IN1io_intdqoe[56] => io_intdqoe[56].IN1io_intdqoe[57] => io_intdqoe[57].IN1io_intdqoe[58] => io_intdqoe[58].IN1io_intdqoe[59] => io_intdqoe[59].IN1io_intdqoe[60] => io_intdqoe[60].IN1io_intdqoe[61] => io_intdqoe[61].IN1io_intdqoe[62] => io_intdqoe[62].IN1io_intdqoe[63] => io_intdqoe[63].IN1io_intdqoe[64] => io_intdqoe[64].IN1io_intdqoe[65] => io_intdqoe[65].IN1io_intdqoe[66] => io_intdqoe[66].IN1io_intdqoe[67] => io_intdqoe[67].IN1io_intdqoe[68] => io_intdqoe[68].IN1io_intdqoe[69] => io_intdqoe[69].IN1io_intdqoe[70] => io_intdqoe[70].IN1io_intdqoe[71] => io_intdqoe[71].IN1io_intdqoe[72] => io_intdqoe[72].IN1io_intdqoe[73] => io_intdqoe[73].IN1io_intdqoe[74] => io_intdqoe[74].IN1io_intdqoe[75] => io_intdqoe[75].IN1io_intdqoe[76] => io_intdqoe[76].IN1io_intdqoe[77] => io_intdqoe[77].IN1io_intdqoe[78] => io_intdqoe[78].IN1io_intdqoe[79] => io_intdqoe[79].IN1io_intdqoe[80] => io_intdqoe[80].IN1io_intdqoe[81] => io_intdqoe[81].IN1io_intdqoe[82] => io_intdqoe[82].IN1io_intdqoe[83] => io_intdqoe[83].IN1io_intdqoe[84] => io_intdqoe[84].IN1io_intdqoe[85] => io_intdqoe[85].IN1io_intdqoe[86] => io_intdqoe[86].IN1io_intdqoe[87] => io_intdqoe[87].IN1io_intdqoe[88] => io_intdqoe[88].IN1io_intdqoe[89] => io_intdqoe[89].IN1io_intdqsbdout[0] => io_intdqsbdout[0].IN1io_intdqsbdout[1] => io_intdqsbdout[1].IN1io_intdqsbdout[2] => io_intdqsbdout[2].IN1io_intdqsbdout[3] => io_intdqsbdout[3].IN1io_intdqsbdout[4] => io_intdqsbdout[4].IN1io_intdqsbdout[5] => io_intdqsbdout[5].IN1io_intdqsbdout[6] => io_intdqsbdout[6].IN1io_intdqsbdout[7] => io_intdqsbdout[7].IN1io_intdqsbdout[8] => io_intdqsbdout[8].IN1io_intdqsbdout[9] => io_intdqsbdout[9].IN1io_intdqsbdout[10] => io_intdqsbdout[10].IN1io_intdqsbdout[11] => io_intdqsbdout[11].IN1io_intdqsbdout[12] => io_intdqsbdout[12].IN1io_intdqsbdout[13] => io_intdqsbdout[13].IN1io_intdqsbdout[14] => io_intdqsbdout[14].IN1io_intdqsbdout[15] => io_intdqsbdout[15].IN1io_intdqsbdout[16] => io_intdqsbdout[16].IN1io_intdqsbdout[17] => io_intdqsbdout[17].IN1io_intdqsbdout[18] => io_intdqsbdout[18].IN1io_intdqsbdout[19] => io_intdqsbdout[19].IN1io_intdqsboe[0] => io_intdqsboe[0].IN1io_intdqsboe[1] => io_intdqsboe[1].IN1io_intdqsboe[2] => io_intdqsboe[2].IN1io_intdqsboe[3] => io_intdqsboe[3].IN1io_intdqsboe[4] => io_intdqsboe[4].IN1io_intdqsboe[5] => io_intdqsboe[5].IN1io_intdqsboe[6] => io_intdqsboe[6].IN1io_intdqsboe[7] => io_intdqsboe[7].IN1io_intdqsboe[8] => io_intdqsboe[8].IN1io_intdqsboe[9] => io_intdqsboe[9].IN1io_intdqsdout[0] => io_intdqsdout[0].IN1io_intdqsdout[1] => io_intdqsdout[1].IN1io_intdqsdout[2] => io_intdqsdout[2].IN1io_intdqsdout[3] => io_intdqsdout[3].IN1io_intdqsdout[4] => io_intdqsdout[4].IN1io_intdqsdout[5] => io_intdqsdout[5].IN1io_intdqsdout[6] => io_intdqsdout[6].IN1io_intdqsdout[7] => io_intdqsdout[7].IN1io_intdqsdout[8] => io_intdqsdout[8].IN1io_intdqsdout[9] => io_intdqsdout[9].IN1io_intdqsdout[10] => io_intdqsdout[10].IN1io_intdqsdout[11] => io_intdqsdout[11].IN1io_intdqsdout[12] => io_intdqsdout[12].IN1io_intdqsdout[13] => io_intdqsdout[13].IN1io_intdqsdout[14] => io_intdqsdout[14].IN1io_intdqsdout[15] => io_intdqsdout[15].IN1io_intdqsdout[16] => io_intdqsdout[16].IN1io_intdqsdout[17] => io_intdqsdout[17].IN1io_intdqsdout[18] => io_intdqsdout[18].IN1io_intdqsdout[19] => io_intdqsdout[19].IN1io_intdqslogicdqsena[0] => io_intdqslogicdqsena[0].IN1io_intdqslogicdqsena[1] => io_intdqslogicdqsena[1].IN1io_intdqslogicdqsena[2] => io_intdqslogicdqsena[2].IN1io_intdqslogicdqsena[3] => io_intdqslogicdqsena[3].IN1io_intdqslogicdqsena[4] => io_intdqslogicdqsena[4].IN1io_intdqslogicdqsena[5] => io_intdqslogicdqsena[5].IN1io_intdqslogicdqsena[6] => io_intdqslogicdqsena[6].IN1io_intdqslogicdqsena[7] => io_intdqslogicdqsena[7].IN1io_intdqslogicdqsena[8] => io_intdqslogicdqsena[8].IN1io_intdqslogicdqsena[9] => io_intdqslogicdqsena[9].IN1io_intdqslogicfiforeset[0] => io_intdqslogicfiforeset[0].IN1io_intdqslogicfiforeset[1] => io_intdqslogicfiforeset[1].IN1io_intdqslogicfiforeset[2] => io_intdqslogicfiforeset[2].IN1io_intdqslogicfiforeset[3] => io_intdqslogicfiforeset[3].IN1io_intdqslogicfiforeset[4] => io_intdqslogicfiforeset[4].IN1io_intdqslogicincrdataen[0] => io_intdqslogicincrdataen[0].IN1io_intdqslogicincrdataen[1] => io_intdqslogicincrdataen[1].IN1io_intdqslogicincrdataen[2] => io_intdqslogicincrdataen[2].IN1io_intdqslogicincrdataen[3] => io_intdqslogicincrdataen[3].IN1io_intdqslogicincrdataen[4] => io_intdqslogicincrdataen[4].IN1io_intdqslogicincrdataen[5] => io_intdqslogicincrdataen[5].IN1io_intdqslogicincrdataen[6] => io_intdqslogicincrdataen[6].IN1io_intdqslogicincrdataen[7] => io_intdqslogicincrdataen[7].IN1io_intdqslogicincrdataen[8] => io_intdqslogicincrdataen[8].IN1io_intdqslogicincrdataen[9] => io_intdqslogicincrdataen[9].IN1io_intdqslogicincwrptr[0] => io_intdqslogicincwrptr[0].IN1io_intdqslogicincwrptr[1] => io_intdqslogicincwrptr[1].IN1io_intdqslogicincwrptr[2] => io_intdqslogicincwrptr[2].IN1io_intdqslogicincwrptr[3] => io_intdqslogicincwrptr[3].IN1io_intdqslogicincwrptr[4] => io_intdqslogicincwrptr[4].IN1io_intdqslogicincwrptr[5] => io_intdqslogicincwrptr[5].IN1io_intdqslogicincwrptr[6] => io_intdqslogicincwrptr[6].IN1io_intdqslogicincwrptr[7] => io_intdqslogicincwrptr[7].IN1io_intdqslogicincwrptr[8] => io_intdqslogicincwrptr[8].IN1io_intdqslogicincwrptr[9] => io_intdqslogicincwrptr[9].IN1io_intdqslogicoct[0] => io_intdqslogicoct[0].IN1io_intdqslogicoct[1] => io_intdqslogicoct[1].IN1io_intdqslogicoct[2] => io_intdqslogicoct[2].IN1io_intdqslogicoct[3] => io_intdqslogicoct[3].IN1io_intdqslogicoct[4] => io_intdqslogicoct[4].IN1io_intdqslogicoct[5] => io_intdqslogicoct[5].IN1io_intdqslogicoct[6] => io_intdqslogicoct[6].IN1io_intdqslogicoct[7] => io_intdqslogicoct[7].IN1io_intdqslogicoct[8] => io_intdqslogicoct[8].IN1io_intdqslogicoct[9] => io_intdqslogicoct[9].IN1io_intdqslogicrdatavalid[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqslogicrdatavalidio_intdqslogicrdatavalid[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqslogicrdatavalidio_intdqslogicrdatavalid[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqslogicrdatavalidio_intdqslogicrdatavalid[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqslogicrdatavalidio_intdqslogicrdatavalid[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intdqslogicrdatavalidio_intdqslogicreadlatency[0] => io_intdqslogicreadlatency[0].IN1io_intdqslogicreadlatency[1] => io_intdqslogicreadlatency[1].IN1io_intdqslogicreadlatency[2] => io_intdqslogicreadlatency[2].IN1io_intdqslogicreadlatency[3] => io_intdqslogicreadlatency[3].IN1io_intdqslogicreadlatency[4] => io_intdqslogicreadlatency[4].IN1io_intdqslogicreadlatency[5] => io_intdqslogicreadlatency[5].IN1io_intdqslogicreadlatency[6] => io_intdqslogicreadlatency[6].IN1io_intdqslogicreadlatency[7] => io_intdqslogicreadlatency[7].IN1io_intdqslogicreadlatency[8] => io_intdqslogicreadlatency[8].IN1io_intdqslogicreadlatency[9] => io_intdqslogicreadlatency[9].IN1io_intdqslogicreadlatency[10] => io_intdqslogicreadlatency[10].IN1io_intdqslogicreadlatency[11] => io_intdqslogicreadlatency[11].IN1io_intdqslogicreadlatency[12] => io_intdqslogicreadlatency[12].IN1io_intdqslogicreadlatency[13] => io_intdqslogicreadlatency[13].IN1io_intdqslogicreadlatency[14] => io_intdqslogicreadlatency[14].IN1io_intdqslogicreadlatency[15] => io_intdqslogicreadlatency[15].IN1io_intdqslogicreadlatency[16] => io_intdqslogicreadlatency[16].IN1io_intdqslogicreadlatency[17] => io_intdqslogicreadlatency[17].IN1io_intdqslogicreadlatency[18] => io_intdqslogicreadlatency[18].IN1io_intdqslogicreadlatency[19] => io_intdqslogicreadlatency[19].IN1io_intdqslogicreadlatency[20] => io_intdqslogicreadlatency[20].IN1io_intdqslogicreadlatency[21] => io_intdqslogicreadlatency[21].IN1io_intdqslogicreadlatency[22] => io_intdqslogicreadlatency[22].IN1io_intdqslogicreadlatency[23] => io_intdqslogicreadlatency[23].IN1io_intdqslogicreadlatency[24] => io_intdqslogicreadlatency[24].IN1io_intdqsoe[0] => io_intdqsoe[0].IN1io_intdqsoe[1] => io_intdqsoe[1].IN1io_intdqsoe[2] => io_intdqsoe[2].IN1io_intdqsoe[3] => io_intdqsoe[3].IN1io_intdqsoe[4] => io_intdqsoe[4].IN1io_intdqsoe[5] => io_intdqsoe[5].IN1io_intdqsoe[6] => io_intdqsoe[6].IN1io_intdqsoe[7] => io_intdqsoe[7].IN1io_intdqsoe[8] => io_intdqsoe[8].IN1io_intdqsoe[9] => io_intdqsoe[9].IN1io_intodtdout[0] => io_intodtdout[0].IN1io_intodtdout[1] => io_intodtdout[1].IN1io_intodtdout[2] => io_intodtdout[2].IN1io_intodtdout[3] => io_intodtdout[3].IN1io_intodtdout[4] => io_intodtdout[4].IN1io_intodtdout[5] => io_intodtdout[5].IN1io_intodtdout[6] => io_intodtdout[6].IN1io_intodtdout[7] => io_intodtdout[7].IN1io_intrasndout[0] => io_intrasndout[0].IN1io_intrasndout[1] => io_intrasndout[1].IN1io_intrasndout[2] => io_intrasndout[2].IN1io_intrasndout[3] => io_intrasndout[3].IN1io_intresetndout[0] => io_intresetndout[0].IN1io_intresetndout[1] => io_intresetndout[1].IN1io_intresetndout[2] => io_intresetndout[2].IN1io_intresetndout[3] => io_intresetndout[3].IN1io_intwendout[0] => io_intwendout[0].IN1io_intwendout[1] => io_intwendout[1].IN1io_intwendout[2] => io_intwendout[2].IN1io_intwendout[3] => io_intwendout[3].IN1io_intafirlat[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafirlatio_intafirlat[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafirlatio_intafirlat[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafirlatio_intafirlat[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafirlatio_intafirlat[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafirlatio_intafiwlat[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafiwlatio_intafiwlat[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafiwlatio_intafiwlat[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafiwlatio_intafiwlat[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intafiwlatio_intaficalfail <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intaficalfailio_intaficalsuccess <= hps_sdram_p0_acv_hard_memphy:umemphy.io_intaficalsuccessmem_a[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[3] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[4] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[5] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[6] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[7] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[8] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[9] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[10] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[11] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_a[12] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_amem_ba[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_bamem_ba[1] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_bamem_ba[2] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_bamem_ck[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_ckmem_ck_n[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_ck_nmem_cke[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_ckemem_cs_n[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_cs_nmem_dm[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_dmmem_ras_n[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_ras_nmem_cas_n[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_cas_nmem_we_n[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_we_nmem_dq[0] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[1] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[2] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[3] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[4] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[5] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[6] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dq[7] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqmem_dqs[0] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqsmem_dqs_n[0] <> hps_sdram_p0_acv_hard_memphy:umemphy.mem_dqs_nmem_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_reset_nmem_odt[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.mem_odtavl_clk <= pll_avl_clk.DB_MAX_OUTPUT_PORT_TYPEscc_clk <= pll_config_clk.DB_MAX_OUTPUT_PORT_TYPEavl_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.reset_n_avl_clkscc_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.reset_n_scc_clkscc_data[0] => scc_data[0].IN1scc_dqs_ena[0] => scc_dqs_ena[0].IN1scc_dqs_io_ena[0] => scc_dqs_io_ena[0].IN1scc_dq_ena[0] => scc_dq_ena[0].IN1scc_dq_ena[1] => scc_dq_ena[1].IN1scc_dq_ena[2] => scc_dq_ena[2].IN1scc_dq_ena[3] => scc_dq_ena[3].IN1scc_dq_ena[4] => scc_dq_ena[4].IN1scc_dq_ena[5] => scc_dq_ena[5].IN1scc_dq_ena[6] => scc_dq_ena[6].IN1scc_dq_ena[7] => scc_dq_ena[7].IN1scc_dm_ena[0] => scc_dm_ena[0].IN1scc_upd[0] => scc_upd[0].IN1capture_strobe_tracking[0] <= hps_sdram_p0_acv_hard_memphy:umemphy.capture_strobe_trackingphy_clk <= hps_sdram_p0_acv_hard_memphy:umemphy.phy_clkctl_clk <= hps_sdram_p0_acv_hard_memphy:umemphy.ctl_clkphy_reset_n <= hps_sdram_p0_acv_hard_memphy:umemphy.phy_reset_n|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphyglobal_reset_n => global_reset_n.IN2soft_reset_n => hphy_inst.I_SOFTRESETNctl_reset_n <= hphy_inst.O_CTLRESETNctl_reset_export_n <= <GND>afi_reset_n <= global_reset_n.DB_MAX_OUTPUT_PORT_TYPEpll_locked => dll_pll_locked.DATAINpll_locked => hphy_inst.I_PLLLOCKEDoct_ctl_rs_value[0] => oct_ctl_rs_value[0].IN1oct_ctl_rs_value[1] => oct_ctl_rs_value[1].IN1oct_ctl_rs_value[2] => oct_ctl_rs_value[2].IN1oct_ctl_rs_value[3] => oct_ctl_rs_value[3].IN1oct_ctl_rs_value[4] => oct_ctl_rs_value[4].IN1oct_ctl_rs_value[5] => oct_ctl_rs_value[5].IN1oct_ctl_rs_value[6] => oct_ctl_rs_value[6].IN1oct_ctl_rs_value[7] => oct_ctl_rs_value[7].IN1oct_ctl_rs_value[8] => oct_ctl_rs_value[8].IN1oct_ctl_rs_value[9] => oct_ctl_rs_value[9].IN1oct_ctl_rs_value[10] => oct_ctl_rs_value[10].IN1oct_ctl_rs_value[11] => oct_ctl_rs_value[11].IN1oct_ctl_rs_value[12] => oct_ctl_rs_value[12].IN1oct_ctl_rs_value[13] => oct_ctl_rs_value[13].IN1oct_ctl_rs_value[14] => oct_ctl_rs_value[14].IN1oct_ctl_rs_value[15] => oct_ctl_rs_value[15].IN1oct_ctl_rt_value[0] => oct_ctl_rt_value[0].IN1oct_ctl_rt_value[1] => oct_ctl_rt_value[1].IN1oct_ctl_rt_value[2] => oct_ctl_rt_value[2].IN1oct_ctl_rt_value[3] => oct_ctl_rt_value[3].IN1oct_ctl_rt_value[4] => oct_ctl_rt_value[4].IN1oct_ctl_rt_value[5] => oct_ctl_rt_value[5].IN1oct_ctl_rt_value[6] => oct_ctl_rt_value[6].IN1oct_ctl_rt_value[7] => oct_ctl_rt_value[7].IN1oct_ctl_rt_value[8] => oct_ctl_rt_value[8].IN1oct_ctl_rt_value[9] => oct_ctl_rt_value[9].IN1oct_ctl_rt_value[10] => oct_ctl_rt_value[10].IN1oct_ctl_rt_value[11] => oct_ctl_rt_value[11].IN1oct_ctl_rt_value[12] => oct_ctl_rt_value[12].IN1oct_ctl_rt_value[13] => oct_ctl_rt_value[13].IN1oct_ctl_rt_value[14] => oct_ctl_rt_value[14].IN1oct_ctl_rt_value[15] => oct_ctl_rt_value[15].IN1afi_addr[0] => hphy_inst.I_AFIADDRafi_addr[1] => hphy_inst.I_AFIADDR1afi_addr[2] => hphy_inst.I_AFIADDR2afi_addr[3] => hphy_inst.I_AFIADDR3afi_addr[4] => hphy_inst.I_AFIADDR4afi_addr[5] => hphy_inst.I_AFIADDR5afi_addr[6] => hphy_inst.I_AFIADDR6afi_addr[7] => hphy_inst.I_AFIADDR7afi_addr[8] => hphy_inst.I_AFIADDR8afi_addr[9] => hphy_inst.I_AFIADDR9afi_addr[10] => hphy_inst.I_AFIADDR10afi_addr[11] => hphy_inst.I_AFIADDR11afi_addr[12] => hphy_inst.I_AFIADDR12afi_addr[13] => hphy_inst.I_AFIADDR13afi_addr[14] => hphy_inst.I_AFIADDR14afi_addr[15] => hphy_inst.I_AFIADDR15afi_addr[16] => hphy_inst.I_AFIADDR16afi_addr[17] => hphy_inst.I_AFIADDR17afi_addr[18] => hphy_inst.I_AFIADDR18afi_addr[19] => hphy_inst.I_AFIADDR19afi_ba[0] => hphy_inst.I_AFIBAafi_ba[1] => hphy_inst.I_AFIBA1afi_ba[2] => hphy_inst.I_AFIBA2afi_cke[0] => hphy_inst.I_AFICKEafi_cke[1] => hphy_inst.I_AFICKE1afi_cs_n[0] => hphy_inst.I_AFICSNafi_cs_n[1] => hphy_inst.I_AFICSN1afi_ras_n[0] => hphy_inst.I_AFIRASNafi_we_n[0] => hphy_inst.I_AFIWENafi_cas_n[0] => hphy_inst.I_AFICASNafi_rst_n[0] => hphy_inst.I_AFIRSTNafi_odt[0] => hphy_inst.I_AFIODTafi_odt[1] => hphy_inst.I_AFIODT1afi_mem_clk_disable[0] => hphy_inst.I_AFIMEMCLKDISABLEafi_dqs_burst[0] => hphy_inst.I_AFIDQSBURSTafi_dqs_burst[1] => hphy_inst.I_AFIDQSBURST1afi_dqs_burst[2] => hphy_inst.I_AFIDQSBURST2afi_dqs_burst[3] => hphy_inst.I_AFIDQSBURST3afi_dqs_burst[4] => hphy_inst.I_AFIDQSBURST4afi_wdata_valid[0] => hphy_inst.I_AFIWDATAVALIDafi_wdata_valid[1] => hphy_inst.I_AFIWDATAVALID1afi_wdata_valid[2] => hphy_inst.I_AFIWDATAVALID2afi_wdata_valid[3] => hphy_inst.I_AFIWDATAVALID3afi_wdata_valid[4] => hphy_inst.I_AFIWDATAVALID4afi_wdata[0] => hphy_inst.I_AFIWDATAafi_wdata[1] => hphy_inst.I_AFIWDATA1afi_wdata[2] => hphy_inst.I_AFIWDATA2afi_wdata[3] => hphy_inst.I_AFIWDATA3afi_wdata[4] => hphy_inst.I_AFIWDATA4afi_wdata[5] => hphy_inst.I_AFIWDATA5afi_wdata[6] => hphy_inst.I_AFIWDATA6afi_wdata[7] => hphy_inst.I_AFIWDATA7afi_wdata[8] => hphy_inst.I_AFIWDATA8afi_wdata[9] => hphy_inst.I_AFIWDATA9afi_wdata[10] => hphy_inst.I_AFIWDATA10afi_wdata[11] => hphy_inst.I_AFIWDATA11afi_wdata[12] => hphy_inst.I_AFIWDATA12afi_wdata[13] => hphy_inst.I_AFIWDATA13afi_wdata[14] => hphy_inst.I_AFIWDATA14afi_wdata[15] => hphy_inst.I_AFIWDATA15afi_wdata[16] => hphy_inst.I_AFIWDATA16afi_wdata[17] => hphy_inst.I_AFIWDATA17afi_wdata[18] => hphy_inst.I_AFIWDATA18afi_wdata[19] => hphy_inst.I_AFIWDATA19afi_wdata[20] => hphy_inst.I_AFIWDATA20afi_wdata[21] => hphy_inst.I_AFIWDATA21afi_wdata[22] => hphy_inst.I_AFIWDATA22afi_wdata[23] => hphy_inst.I_AFIWDATA23afi_wdata[24] => hphy_inst.I_AFIWDATA24afi_wdata[25] => hphy_inst.I_AFIWDATA25afi_wdata[26] => hphy_inst.I_AFIWDATA26afi_wdata[27] => hphy_inst.I_AFIWDATA27afi_wdata[28] => hphy_inst.I_AFIWDATA28afi_wdata[29] => hphy_inst.I_AFIWDATA29afi_wdata[30] => hphy_inst.I_AFIWDATA30afi_wdata[31] => hphy_inst.I_AFIWDATA31afi_wdata[32] => hphy_inst.I_AFIWDATA32afi_wdata[33] => hphy_inst.I_AFIWDATA33afi_wdata[34] => hphy_inst.I_AFIWDATA34afi_wdata[35] => hphy_inst.I_AFIWDATA35afi_wdata[36] => hphy_inst.I_AFIWDATA36afi_wdata[37] => hphy_inst.I_AFIWDATA37afi_wdata[38] => hphy_inst.I_AFIWDATA38afi_wdata[39] => hphy_inst.I_AFIWDATA39afi_wdata[40] => hphy_inst.I_AFIWDATA40afi_wdata[41] => hphy_inst.I_AFIWDATA41afi_wdata[42] => hphy_inst.I_AFIWDATA42afi_wdata[43] => hphy_inst.I_AFIWDATA43afi_wdata[44] => hphy_inst.I_AFIWDATA44afi_wdata[45] => hphy_inst.I_AFIWDATA45afi_wdata[46] => hphy_inst.I_AFIWDATA46afi_wdata[47] => hphy_inst.I_AFIWDATA47afi_wdata[48] => hphy_inst.I_AFIWDATA48afi_wdata[49] => hphy_inst.I_AFIWDATA49afi_wdata[50] => hphy_inst.I_AFIWDATA50afi_wdata[51] => hphy_inst.I_AFIWDATA51afi_wdata[52] => hphy_inst.I_AFIWDATA52afi_wdata[53] => hphy_inst.I_AFIWDATA53afi_wdata[54] => hphy_inst.I_AFIWDATA54afi_wdata[55] => hphy_inst.I_AFIWDATA55afi_wdata[56] => hphy_inst.I_AFIWDATA56afi_wdata[57] => hphy_inst.I_AFIWDATA57afi_wdata[58] => hphy_inst.I_AFIWDATA58afi_wdata[59] => hphy_inst.I_AFIWDATA59afi_wdata[60] => hphy_inst.I_AFIWDATA60afi_wdata[61] => hphy_inst.I_AFIWDATA61afi_wdata[62] => hphy_inst.I_AFIWDATA62afi_wdata[63] => hphy_inst.I_AFIWDATA63afi_wdata[64] => hphy_inst.I_AFIWDATA64afi_wdata[65] => hphy_inst.I_AFIWDATA65afi_wdata[66] => hphy_inst.I_AFIWDATA66afi_wdata[67] => hphy_inst.I_AFIWDATA67afi_wdata[68] => hphy_inst.I_AFIWDATA68afi_wdata[69] => hphy_inst.I_AFIWDATA69afi_wdata[70] => hphy_inst.I_AFIWDATA70afi_wdata[71] => hphy_inst.I_AFIWDATA71afi_wdata[72] => hphy_inst.I_AFIWDATA72afi_wdata[73] => hphy_inst.I_AFIWDATA73afi_wdata[74] => hphy_inst.I_AFIWDATA74afi_wdata[75] => hphy_inst.I_AFIWDATA75afi_wdata[76] => hphy_inst.I_AFIWDATA76afi_wdata[77] => hphy_inst.I_AFIWDATA77afi_wdata[78] => hphy_inst.I_AFIWDATA78afi_wdata[79] => hphy_inst.I_AFIWDATA79afi_dm[0] => hphy_inst.I_AFIDMafi_dm[1] => hphy_inst.I_AFIDM1afi_dm[2] => hphy_inst.I_AFIDM2afi_dm[3] => hphy_inst.I_AFIDM3afi_dm[4] => hphy_inst.I_AFIDM4afi_dm[5] => hphy_inst.I_AFIDM5afi_dm[6] => hphy_inst.I_AFIDM6afi_dm[7] => hphy_inst.I_AFIDM7afi_dm[8] => hphy_inst.I_AFIDM8afi_dm[9] => hphy_inst.I_AFIDM9afi_rdata[0] <= hphy_inst.O_AFIRDATAafi_rdata[1] <= hphy_inst.O_AFIRDATA1afi_rdata[2] <= hphy_inst.O_AFIRDATA2afi_rdata[3] <= hphy_inst.O_AFIRDATA3afi_rdata[4] <= hphy_inst.O_AFIRDATA4afi_rdata[5] <= hphy_inst.O_AFIRDATA5afi_rdata[6] <= hphy_inst.O_AFIRDATA6afi_rdata[7] <= hphy_inst.O_AFIRDATA7afi_rdata[8] <= hphy_inst.O_AFIRDATA8afi_rdata[9] <= hphy_inst.O_AFIRDATA9afi_rdata[10] <= hphy_inst.O_AFIRDATA10afi_rdata[11] <= hphy_inst.O_AFIRDATA11afi_rdata[12] <= hphy_inst.O_AFIRDATA12afi_rdata[13] <= hphy_inst.O_AFIRDATA13afi_rdata[14] <= hphy_inst.O_AFIRDATA14afi_rdata[15] <= hphy_inst.O_AFIRDATA15afi_rdata[16] <= hphy_inst.O_AFIRDATA16afi_rdata[17] <= hphy_inst.O_AFIRDATA17afi_rdata[18] <= hphy_inst.O_AFIRDATA18afi_rdata[19] <= hphy_inst.O_AFIRDATA19afi_rdata[20] <= hphy_inst.O_AFIRDATA20afi_rdata[21] <= hphy_inst.O_AFIRDATA21afi_rdata[22] <= hphy_inst.O_AFIRDATA22afi_rdata[23] <= hphy_inst.O_AFIRDATA23afi_rdata[24] <= hphy_inst.O_AFIRDATA24afi_rdata[25] <= hphy_inst.O_AFIRDATA25afi_rdata[26] <= hphy_inst.O_AFIRDATA26afi_rdata[27] <= hphy_inst.O_AFIRDATA27afi_rdata[28] <= hphy_inst.O_AFIRDATA28afi_rdata[29] <= hphy_inst.O_AFIRDATA29afi_rdata[30] <= hphy_inst.O_AFIRDATA30afi_rdata[31] <= hphy_inst.O_AFIRDATA31afi_rdata[32] <= hphy_inst.O_AFIRDATA32afi_rdata[33] <= hphy_inst.O_AFIRDATA33afi_rdata[34] <= hphy_inst.O_AFIRDATA34afi_rdata[35] <= hphy_inst.O_AFIRDATA35afi_rdata[36] <= hphy_inst.O_AFIRDATA36afi_rdata[37] <= hphy_inst.O_AFIRDATA37afi_rdata[38] <= hphy_inst.O_AFIRDATA38afi_rdata[39] <= hphy_inst.O_AFIRDATA39afi_rdata[40] <= hphy_inst.O_AFIRDATA40afi_rdata[41] <= hphy_inst.O_AFIRDATA41afi_rdata[42] <= hphy_inst.O_AFIRDATA42afi_rdata[43] <= hphy_inst.O_AFIRDATA43afi_rdata[44] <= hphy_inst.O_AFIRDATA44afi_rdata[45] <= hphy_inst.O_AFIRDATA45afi_rdata[46] <= hphy_inst.O_AFIRDATA46afi_rdata[47] <= hphy_inst.O_AFIRDATA47afi_rdata[48] <= hphy_inst.O_AFIRDATA48afi_rdata[49] <= hphy_inst.O_AFIRDATA49afi_rdata[50] <= hphy_inst.O_AFIRDATA50afi_rdata[51] <= hphy_inst.O_AFIRDATA51afi_rdata[52] <= hphy_inst.O_AFIRDATA52afi_rdata[53] <= hphy_inst.O_AFIRDATA53afi_rdata[54] <= hphy_inst.O_AFIRDATA54afi_rdata[55] <= hphy_inst.O_AFIRDATA55afi_rdata[56] <= hphy_inst.O_AFIRDATA56afi_rdata[57] <= hphy_inst.O_AFIRDATA57afi_rdata[58] <= hphy_inst.O_AFIRDATA58afi_rdata[59] <= hphy_inst.O_AFIRDATA59afi_rdata[60] <= hphy_inst.O_AFIRDATA60afi_rdata[61] <= hphy_inst.O_AFIRDATA61afi_rdata[62] <= hphy_inst.O_AFIRDATA62afi_rdata[63] <= hphy_inst.O_AFIRDATA63afi_rdata[64] <= hphy_inst.O_AFIRDATA64afi_rdata[65] <= hphy_inst.O_AFIRDATA65afi_rdata[66] <= hphy_inst.O_AFIRDATA66afi_rdata[67] <= hphy_inst.O_AFIRDATA67afi_rdata[68] <= hphy_inst.O_AFIRDATA68afi_rdata[69] <= hphy_inst.O_AFIRDATA69afi_rdata[70] <= hphy_inst.O_AFIRDATA70afi_rdata[71] <= hphy_inst.O_AFIRDATA71afi_rdata[72] <= hphy_inst.O_AFIRDATA72afi_rdata[73] <= hphy_inst.O_AFIRDATA73afi_rdata[74] <= hphy_inst.O_AFIRDATA74afi_rdata[75] <= hphy_inst.O_AFIRDATA75afi_rdata[76] <= hphy_inst.O_AFIRDATA76afi_rdata[77] <= hphy_inst.O_AFIRDATA77afi_rdata[78] <= hphy_inst.O_AFIRDATA78afi_rdata[79] <= hphy_inst.O_AFIRDATA79afi_rdata_en[0] => hphy_inst.I_AFIRDATAENafi_rdata_en[1] => hphy_inst.I_AFIRDATAEN1afi_rdata_en[2] => hphy_inst.I_AFIRDATAEN2afi_rdata_en[3] => hphy_inst.I_AFIRDATAEN3afi_rdata_en[4] => hphy_inst.I_AFIRDATAEN4afi_rdata_en_full[0] => hphy_inst.I_AFIRDATAENFULLafi_rdata_en_full[1] => hphy_inst.I_AFIRDATAENFULL1afi_rdata_en_full[2] => hphy_inst.I_AFIRDATAENFULL2afi_rdata_en_full[3] => hphy_inst.I_AFIRDATAENFULL3afi_rdata_en_full[4] => hphy_inst.I_AFIRDATAENFULL4afi_rdata_valid[0] <= hphy_inst.O_AFIRDATAVALIDafi_wlat[0] <= hphy_inst.O_AFIWLATafi_wlat[1] <= hphy_inst.O_AFIWLAT1afi_wlat[2] <= hphy_inst.O_AFIWLAT2afi_wlat[3] <= hphy_inst.O_AFIWLAT3afi_rlat[0] <= hphy_inst.O_AFIRLATafi_rlat[1] <= hphy_inst.O_AFIRLAT1afi_rlat[2] <= hphy_inst.O_AFIRLAT2afi_rlat[3] <= hphy_inst.O_AFIRLAT3afi_rlat[4] <= hphy_inst.O_AFIRLAT4afi_cal_success <= hphy_inst.O_AFICALSUCCESSafi_cal_fail <= hphy_inst.O_AFICALFAILavl_read => hphy_inst.I_AVLREADavl_write => hphy_inst.I_AVLWRITEavl_address[0] => hphy_inst.I_AVLADDRESSavl_address[1] => hphy_inst.I_AVLADDRESS1avl_address[2] => hphy_inst.I_AVLADDRESS2avl_address[3] => hphy_inst.I_AVLADDRESS3avl_address[4] => hphy_inst.I_AVLADDRESS4avl_address[5] => hphy_inst.I_AVLADDRESS5avl_address[6] => hphy_inst.I_AVLADDRESS6avl_address[7] => hphy_inst.I_AVLADDRESS7avl_address[8] => hphy_inst.I_AVLADDRESS8avl_address[9] => hphy_inst.I_AVLADDRESS9avl_address[10] => hphy_inst.I_AVLADDRESS10avl_address[11] => hphy_inst.I_AVLADDRESS11avl_address[12] => hphy_inst.I_AVLADDRESS12avl_address[13] => hphy_inst.I_AVLADDRESS13avl_address[14] => hphy_inst.I_AVLADDRESS14avl_address[15] => hphy_inst.I_AVLADDRESS15avl_writedata[0] => hphy_inst.I_AVLWRITEDATAavl_writedata[1] => hphy_inst.I_AVLWRITEDATA1avl_writedata[2] => hphy_inst.I_AVLWRITEDATA2avl_writedata[3] => hphy_inst.I_AVLWRITEDATA3avl_writedata[4] => hphy_inst.I_AVLWRITEDATA4avl_writedata[5] => hphy_inst.I_AVLWRITEDATA5avl_writedata[6] => hphy_inst.I_AVLWRITEDATA6avl_writedata[7] => hphy_inst.I_AVLWRITEDATA7avl_writedata[8] => hphy_inst.I_AVLWRITEDATA8avl_writedata[9] => hphy_inst.I_AVLWRITEDATA9avl_writedata[10] => hphy_inst.I_AVLWRITEDATA10avl_writedata[11] => hphy_inst.I_AVLWRITEDATA11avl_writedata[12] => hphy_inst.I_AVLWRITEDATA12avl_writedata[13] => hphy_inst.I_AVLWRITEDATA13avl_writedata[14] => hphy_inst.I_AVLWRITEDATA14avl_writedata[15] => hphy_inst.I_AVLWRITEDATA15avl_writedata[16] => hphy_inst.I_AVLWRITEDATA16avl_writedata[17] => hphy_inst.I_AVLWRITEDATA17avl_writedata[18] => hphy_inst.I_AVLWRITEDATA18avl_writedata[19] => hphy_inst.I_AVLWRITEDATA19avl_writedata[20] => hphy_inst.I_AVLWRITEDATA20avl_writedata[21] => hphy_inst.I_AVLWRITEDATA21avl_writedata[22] => hphy_inst.I_AVLWRITEDATA22avl_writedata[23] => hphy_inst.I_AVLWRITEDATA23avl_writedata[24] => hphy_inst.I_AVLWRITEDATA24avl_writedata[25] => hphy_inst.I_AVLWRITEDATA25avl_writedata[26] => hphy_inst.I_AVLWRITEDATA26avl_writedata[27] => hphy_inst.I_AVLWRITEDATA27avl_writedata[28] => hphy_inst.I_AVLWRITEDATA28avl_writedata[29] => hphy_inst.I_AVLWRITEDATA29avl_writedata[30] => hphy_inst.I_AVLWRITEDATA30avl_writedata[31] => hphy_inst.I_AVLWRITEDATA31avl_waitrequest <= hphy_inst.O_AVLWAITREQUESTavl_readdata[0] <= hphy_inst.O_AVLREADDATAavl_readdata[1] <= hphy_inst.O_AVLREADDATA1avl_readdata[2] <= hphy_inst.O_AVLREADDATA2avl_readdata[3] <= hphy_inst.O_AVLREADDATA3avl_readdata[4] <= hphy_inst.O_AVLREADDATA4avl_readdata[5] <= hphy_inst.O_AVLREADDATA5avl_readdata[6] <= hphy_inst.O_AVLREADDATA6avl_readdata[7] <= hphy_inst.O_AVLREADDATA7avl_readdata[8] <= hphy_inst.O_AVLREADDATA8avl_readdata[9] <= hphy_inst.O_AVLREADDATA9avl_readdata[10] <= hphy_inst.O_AVLREADDATA10avl_readdata[11] <= hphy_inst.O_AVLREADDATA11avl_readdata[12] <= hphy_inst.O_AVLREADDATA12avl_readdata[13] <= hphy_inst.O_AVLREADDATA13avl_readdata[14] <= hphy_inst.O_AVLREADDATA14avl_readdata[15] <= hphy_inst.O_AVLREADDATA15avl_readdata[16] <= hphy_inst.O_AVLREADDATA16avl_readdata[17] <= hphy_inst.O_AVLREADDATA17avl_readdata[18] <= hphy_inst.O_AVLREADDATA18avl_readdata[19] <= hphy_inst.O_AVLREADDATA19avl_readdata[20] <= hphy_inst.O_AVLREADDATA20avl_readdata[21] <= hphy_inst.O_AVLREADDATA21avl_readdata[22] <= hphy_inst.O_AVLREADDATA22avl_readdata[23] <= hphy_inst.O_AVLREADDATA23avl_readdata[24] <= hphy_inst.O_AVLREADDATA24avl_readdata[25] <= hphy_inst.O_AVLREADDATA25avl_readdata[26] <= hphy_inst.O_AVLREADDATA26avl_readdata[27] <= hphy_inst.O_AVLREADDATA27avl_readdata[28] <= hphy_inst.O_AVLREADDATA28avl_readdata[29] <= hphy_inst.O_AVLREADDATA29avl_readdata[30] <= hphy_inst.O_AVLREADDATA30avl_readdata[31] <= hphy_inst.O_AVLREADDATA31cfg_addlat[0] => hphy_inst.I_CFGADDLATcfg_addlat[1] => hphy_inst.I_CFGADDLAT1cfg_addlat[2] => hphy_inst.I_CFGADDLAT2cfg_addlat[3] => hphy_inst.I_CFGADDLAT3cfg_addlat[4] => hphy_inst.I_CFGADDLAT4cfg_addlat[5] => hphy_inst.I_CFGADDLAT5cfg_addlat[6] => hphy_inst.I_CFGADDLAT6cfg_addlat[7] => hphy_inst.I_CFGADDLAT7cfg_bankaddrwidth[0] => hphy_inst.I_CFGBANKADDRWIDTHcfg_bankaddrwidth[1] => hphy_inst.I_CFGBANKADDRWIDTH1cfg_bankaddrwidth[2] => hphy_inst.I_CFGBANKADDRWIDTH2cfg_bankaddrwidth[3] => hphy_inst.I_CFGBANKADDRWIDTH3cfg_bankaddrwidth[4] => hphy_inst.I_CFGBANKADDRWIDTH4cfg_bankaddrwidth[5] => hphy_inst.I_CFGBANKADDRWIDTH5cfg_bankaddrwidth[6] => hphy_inst.I_CFGBANKADDRWIDTH6cfg_bankaddrwidth[7] => hphy_inst.I_CFGBANKADDRWIDTH7cfg_caswrlat[0] => hphy_inst.I_CFGCASWRLATcfg_caswrlat[1] => hphy_inst.I_CFGCASWRLAT1cfg_caswrlat[2] => hphy_inst.I_CFGCASWRLAT2cfg_caswrlat[3] => hphy_inst.I_CFGCASWRLAT3cfg_caswrlat[4] => hphy_inst.I_CFGCASWRLAT4cfg_caswrlat[5] => hphy_inst.I_CFGCASWRLAT5cfg_caswrlat[6] => hphy_inst.I_CFGCASWRLAT6cfg_caswrlat[7] => hphy_inst.I_CFGCASWRLAT7cfg_coladdrwidth[0] => hphy_inst.I_CFGCOLADDRWIDTHcfg_coladdrwidth[1] => hphy_inst.I_CFGCOLADDRWIDTH1cfg_coladdrwidth[2] => hphy_inst.I_CFGCOLADDRWIDTH2cfg_coladdrwidth[3] => hphy_inst.I_CFGCOLADDRWIDTH3cfg_coladdrwidth[4] => hphy_inst.I_CFGCOLADDRWIDTH4cfg_coladdrwidth[5] => hphy_inst.I_CFGCOLADDRWIDTH5cfg_coladdrwidth[6] => hphy_inst.I_CFGCOLADDRWIDTH6cfg_coladdrwidth[7] => hphy_inst.I_CFGCOLADDRWIDTH7cfg_csaddrwidth[0] => hphy_inst.I_CFGCSADDRWIDTHcfg_csaddrwidth[1] => hphy_inst.I_CFGCSADDRWIDTH1cfg_csaddrwidth[2] => hphy_inst.I_CFGCSADDRWIDTH2cfg_csaddrwidth[3] => hphy_inst.I_CFGCSADDRWIDTH3cfg_csaddrwidth[4] => hphy_inst.I_CFGCSADDRWIDTH4cfg_csaddrwidth[5] => hphy_inst.I_CFGCSADDRWIDTH5cfg_csaddrwidth[6] => hphy_inst.I_CFGCSADDRWIDTH6cfg_csaddrwidth[7] => hphy_inst.I_CFGCSADDRWIDTH7cfg_devicewidth[0] => hphy_inst.I_CFGDEVICEWIDTHcfg_devicewidth[1] => hphy_inst.I_CFGDEVICEWIDTH1cfg_devicewidth[2] => hphy_inst.I_CFGDEVICEWIDTH2cfg_devicewidth[3] => hphy_inst.I_CFGDEVICEWIDTH3cfg_devicewidth[4] => hphy_inst.I_CFGDEVICEWIDTH4cfg_devicewidth[5] => hphy_inst.I_CFGDEVICEWIDTH5cfg_devicewidth[6] => hphy_inst.I_CFGDEVICEWIDTH6cfg_devicewidth[7] => hphy_inst.I_CFGDEVICEWIDTH7cfg_dramconfig[0] => hphy_inst.I_CFGDRAMCONFIGcfg_dramconfig[1] => hphy_inst.I_CFGDRAMCONFIG1cfg_dramconfig[2] => hphy_inst.I_CFGDRAMCONFIG2cfg_dramconfig[3] => hphy_inst.I_CFGDRAMCONFIG3cfg_dramconfig[4] => hphy_inst.I_CFGDRAMCONFIG4cfg_dramconfig[5] => hphy_inst.I_CFGDRAMCONFIG5cfg_dramconfig[6] => hphy_inst.I_CFGDRAMCONFIG6cfg_dramconfig[7] => hphy_inst.I_CFGDRAMCONFIG7cfg_dramconfig[8] => hphy_inst.I_CFGDRAMCONFIG8cfg_dramconfig[9] => hphy_inst.I_CFGDRAMCONFIG9cfg_dramconfig[10] => hphy_inst.I_CFGDRAMCONFIG10cfg_dramconfig[11] => hphy_inst.I_CFGDRAMCONFIG11cfg_dramconfig[12] => hphy_inst.I_CFGDRAMCONFIG12cfg_dramconfig[13] => hphy_inst.I_CFGDRAMCONFIG13cfg_dramconfig[14] => hphy_inst.I_CFGDRAMCONFIG14cfg_dramconfig[15] => hphy_inst.I_CFGDRAMCONFIG15cfg_dramconfig[16] => hphy_inst.I_CFGDRAMCONFIG16cfg_dramconfig[17] => hphy_inst.I_CFGDRAMCONFIG17cfg_dramconfig[18] => hphy_inst.I_CFGDRAMCONFIG18cfg_dramconfig[19] => hphy_inst.I_CFGDRAMCONFIG19cfg_dramconfig[20] => hphy_inst.I_CFGDRAMCONFIG20cfg_dramconfig[21] => hphy_inst.I_CFGDRAMCONFIG21cfg_dramconfig[22] => hphy_inst.I_CFGDRAMCONFIG22cfg_dramconfig[23] => hphy_inst.I_CFGDRAMCONFIG23cfg_interfacewidth[0] => hphy_inst.I_CFGINTERFACEWIDTHcfg_interfacewidth[1] => hphy_inst.I_CFGINTERFACEWIDTH1cfg_interfacewidth[2] => hphy_inst.I_CFGINTERFACEWIDTH2cfg_interfacewidth[3] => hphy_inst.I_CFGINTERFACEWIDTH3cfg_interfacewidth[4] => hphy_inst.I_CFGINTERFACEWIDTH4cfg_interfacewidth[5] => hphy_inst.I_CFGINTERFACEWIDTH5cfg_interfacewidth[6] => hphy_inst.I_CFGINTERFACEWIDTH6cfg_interfacewidth[7] => hphy_inst.I_CFGINTERFACEWIDTH7cfg_rowaddrwidth[0] => hphy_inst.I_CFGROWADDRWIDTHcfg_rowaddrwidth[1] => hphy_inst.I_CFGROWADDRWIDTH1cfg_rowaddrwidth[2] => hphy_inst.I_CFGROWADDRWIDTH2cfg_rowaddrwidth[3] => hphy_inst.I_CFGROWADDRWIDTH3cfg_rowaddrwidth[4] => hphy_inst.I_CFGROWADDRWIDTH4cfg_rowaddrwidth[5] => hphy_inst.I_CFGROWADDRWIDTH5cfg_rowaddrwidth[6] => hphy_inst.I_CFGROWADDRWIDTH6cfg_rowaddrwidth[7] => hphy_inst.I_CFGROWADDRWIDTH7cfg_tcl[0] => hphy_inst.I_CFGTCLcfg_tcl[1] => hphy_inst.I_CFGTCL1cfg_tcl[2] => hphy_inst.I_CFGTCL2cfg_tcl[3] => hphy_inst.I_CFGTCL3cfg_tcl[4] => hphy_inst.I_CFGTCL4cfg_tcl[5] => hphy_inst.I_CFGTCL5cfg_tcl[6] => hphy_inst.I_CFGTCL6cfg_tcl[7] => hphy_inst.I_CFGTCL7cfg_tmrd[0] => hphy_inst.I_CFGTMRDcfg_tmrd[1] => hphy_inst.I_CFGTMRD1cfg_tmrd[2] => hphy_inst.I_CFGTMRD2cfg_tmrd[3] => hphy_inst.I_CFGTMRD3cfg_tmrd[4] => hphy_inst.I_CFGTMRD4cfg_tmrd[5] => hphy_inst.I_CFGTMRD5cfg_tmrd[6] => hphy_inst.I_CFGTMRD6cfg_tmrd[7] => hphy_inst.I_CFGTMRD7cfg_trefi[0] => hphy_inst.I_CFGTREFIcfg_trefi[1] => hphy_inst.I_CFGTREFI1cfg_trefi[2] => hphy_inst.I_CFGTREFI2cfg_trefi[3] => hphy_inst.I_CFGTREFI3cfg_trefi[4] => hphy_inst.I_CFGTREFI4cfg_trefi[5] => hphy_inst.I_CFGTREFI5cfg_trefi[6] => hphy_inst.I_CFGTREFI6cfg_trefi[7] => hphy_inst.I_CFGTREFI7cfg_trefi[8] => hphy_inst.I_CFGTREFI8cfg_trefi[9] => hphy_inst.I_CFGTREFI9cfg_trefi[10] => hphy_inst.I_CFGTREFI10cfg_trefi[11] => hphy_inst.I_CFGTREFI11cfg_trefi[12] => hphy_inst.I_CFGTREFI12cfg_trefi[13] => hphy_inst.I_CFGTREFI13cfg_trefi[14] => hphy_inst.I_CFGTREFI14cfg_trefi[15] => hphy_inst.I_CFGTREFI15cfg_trfc[0] => hphy_inst.I_CFGTRFCcfg_trfc[1] => hphy_inst.I_CFGTRFC1cfg_trfc[2] => hphy_inst.I_CFGTRFC2cfg_trfc[3] => hphy_inst.I_CFGTRFC3cfg_trfc[4] => hphy_inst.I_CFGTRFC4cfg_trfc[5] => hphy_inst.I_CFGTRFC5cfg_trfc[6] => hphy_inst.I_CFGTRFC6cfg_trfc[7] => hphy_inst.I_CFGTRFC7cfg_twr[0] => hphy_inst.I_CFGTWRcfg_twr[1] => hphy_inst.I_CFGTWR1cfg_twr[2] => hphy_inst.I_CFGTWR2cfg_twr[3] => hphy_inst.I_CFGTWR3cfg_twr[4] => hphy_inst.I_CFGTWR4cfg_twr[5] => hphy_inst.I_CFGTWR5cfg_twr[6] => hphy_inst.I_CFGTWR6cfg_twr[7] => hphy_inst.I_CFGTWR7io_intaddrdout[0] => hphy_inst.I_IOINTADDRDOUTio_intaddrdout[1] => hphy_inst.I_IOINTADDRDOUT1io_intaddrdout[2] => hphy_inst.I_IOINTADDRDOUT2io_intaddrdout[3] => hphy_inst.I_IOINTADDRDOUT3io_intaddrdout[4] => hphy_inst.I_IOINTADDRDOUT4io_intaddrdout[5] => hphy_inst.I_IOINTADDRDOUT5io_intaddrdout[6] => hphy_inst.I_IOINTADDRDOUT6io_intaddrdout[7] => hphy_inst.I_IOINTADDRDOUT7io_intaddrdout[8] => hphy_inst.I_IOINTADDRDOUT8io_intaddrdout[9] => hphy_inst.I_IOINTADDRDOUT9io_intaddrdout[10] => hphy_inst.I_IOINTADDRDOUT10io_intaddrdout[11] => hphy_inst.I_IOINTADDRDOUT11io_intaddrdout[12] => hphy_inst.I_IOINTADDRDOUT12io_intaddrdout[13] => hphy_inst.I_IOINTADDRDOUT13io_intaddrdout[14] => hphy_inst.I_IOINTADDRDOUT14io_intaddrdout[15] => hphy_inst.I_IOINTADDRDOUT15io_intaddrdout[16] => hphy_inst.I_IOINTADDRDOUT16io_intaddrdout[17] => hphy_inst.I_IOINTADDRDOUT17io_intaddrdout[18] => hphy_inst.I_IOINTADDRDOUT18io_intaddrdout[19] => hphy_inst.I_IOINTADDRDOUT19io_intaddrdout[20] => hphy_inst.I_IOINTADDRDOUT20io_intaddrdout[21] => hphy_inst.I_IOINTADDRDOUT21io_intaddrdout[22] => hphy_inst.I_IOINTADDRDOUT22io_intaddrdout[23] => hphy_inst.I_IOINTADDRDOUT23io_intaddrdout[24] => hphy_inst.I_IOINTADDRDOUT24io_intaddrdout[25] => hphy_inst.I_IOINTADDRDOUT25io_intaddrdout[26] => hphy_inst.I_IOINTADDRDOUT26io_intaddrdout[27] => hphy_inst.I_IOINTADDRDOUT27io_intaddrdout[28] => hphy_inst.I_IOINTADDRDOUT28io_intaddrdout[29] => hphy_inst.I_IOINTADDRDOUT29io_intaddrdout[30] => hphy_inst.I_IOINTADDRDOUT30io_intaddrdout[31] => hphy_inst.I_IOINTADDRDOUT31io_intaddrdout[32] => hphy_inst.I_IOINTADDRDOUT32io_intaddrdout[33] => hphy_inst.I_IOINTADDRDOUT33io_intaddrdout[34] => hphy_inst.I_IOINTADDRDOUT34io_intaddrdout[35] => hphy_inst.I_IOINTADDRDOUT35io_intaddrdout[36] => hphy_inst.I_IOINTADDRDOUT36io_intaddrdout[37] => hphy_inst.I_IOINTADDRDOUT37io_intaddrdout[38] => hphy_inst.I_IOINTADDRDOUT38io_intaddrdout[39] => hphy_inst.I_IOINTADDRDOUT39io_intaddrdout[40] => hphy_inst.I_IOINTADDRDOUT40io_intaddrdout[41] => hphy_inst.I_IOINTADDRDOUT41io_intaddrdout[42] => hphy_inst.I_IOINTADDRDOUT42io_intaddrdout[43] => hphy_inst.I_IOINTADDRDOUT43io_intaddrdout[44] => hphy_inst.I_IOINTADDRDOUT44io_intaddrdout[45] => hphy_inst.I_IOINTADDRDOUT45io_intaddrdout[46] => hphy_inst.I_IOINTADDRDOUT46io_intaddrdout[47] => hphy_inst.I_IOINTADDRDOUT47io_intaddrdout[48] => hphy_inst.I_IOINTADDRDOUT48io_intaddrdout[49] => hphy_inst.I_IOINTADDRDOUT49io_intaddrdout[50] => hphy_inst.I_IOINTADDRDOUT50io_intaddrdout[51] => hphy_inst.I_IOINTADDRDOUT51io_intaddrdout[52] => hphy_inst.I_IOINTADDRDOUT52io_intaddrdout[53] => hphy_inst.I_IOINTADDRDOUT53io_intaddrdout[54] => hphy_inst.I_IOINTADDRDOUT54io_intaddrdout[55] => hphy_inst.I_IOINTADDRDOUT55io_intaddrdout[56] => hphy_inst.I_IOINTADDRDOUT56io_intaddrdout[57] => hphy_inst.I_IOINTADDRDOUT57io_intaddrdout[58] => hphy_inst.I_IOINTADDRDOUT58io_intaddrdout[59] => hphy_inst.I_IOINTADDRDOUT59io_intaddrdout[60] => hphy_inst.I_IOINTADDRDOUT60io_intaddrdout[61] => hphy_inst.I_IOINTADDRDOUT61io_intaddrdout[62] => hphy_inst.I_IOINTADDRDOUT62io_intaddrdout[63] => hphy_inst.I_IOINTADDRDOUT63io_intbadout[0] => hphy_inst.I_IOINTBADOUTio_intbadout[1] => hphy_inst.I_IOINTBADOUT1io_intbadout[2] => hphy_inst.I_IOINTBADOUT2io_intbadout[3] => hphy_inst.I_IOINTBADOUT3io_intbadout[4] => hphy_inst.I_IOINTBADOUT4io_intbadout[5] => hphy_inst.I_IOINTBADOUT5io_intbadout[6] => hphy_inst.I_IOINTBADOUT6io_intbadout[7] => hphy_inst.I_IOINTBADOUT7io_intbadout[8] => hphy_inst.I_IOINTBADOUT8io_intbadout[9] => hphy_inst.I_IOINTBADOUT9io_intbadout[10] => hphy_inst.I_IOINTBADOUT10io_intbadout[11] => hphy_inst.I_IOINTBADOUT11io_intcasndout[0] => hphy_inst.I_IOINTCASNDOUTio_intcasndout[1] => hphy_inst.I_IOINTCASNDOUT1io_intcasndout[2] => hphy_inst.I_IOINTCASNDOUT2io_intcasndout[3] => hphy_inst.I_IOINTCASNDOUT3io_intckdout[0] => hphy_inst.I_IOINTCKDOUTio_intckdout[1] => hphy_inst.I_IOINTCKDOUT1io_intckdout[2] => hphy_inst.I_IOINTCKDOUT2io_intckdout[3] => hphy_inst.I_IOINTCKDOUT3io_intckedout[0] => hphy_inst.I_IOINTCKEDOUTio_intckedout[1] => hphy_inst.I_IOINTCKEDOUT1io_intckedout[2] => hphy_inst.I_IOINTCKEDOUT2io_intckedout[3] => hphy_inst.I_IOINTCKEDOUT3io_intckedout[4] => hphy_inst.I_IOINTCKEDOUT4io_intckedout[5] => hphy_inst.I_IOINTCKEDOUT5io_intckedout[6] => hphy_inst.I_IOINTCKEDOUT6io_intckedout[7] => hphy_inst.I_IOINTCKEDOUT7io_intckndout[0] => hphy_inst.I_IOINTCKNDOUTio_intckndout[1] => hphy_inst.I_IOINTCKNDOUT1io_intckndout[2] => hphy_inst.I_IOINTCKNDOUT2io_intckndout[3] => hphy_inst.I_IOINTCKNDOUT3io_intcsndout[0] => hphy_inst.I_IOINTCSNDOUTio_intcsndout[1] => hphy_inst.I_IOINTCSNDOUT1io_intcsndout[2] => hphy_inst.I_IOINTCSNDOUT2io_intcsndout[3] => hphy_inst.I_IOINTCSNDOUT3io_intcsndout[4] => hphy_inst.I_IOINTCSNDOUT4io_intcsndout[5] => hphy_inst.I_IOINTCSNDOUT5io_intcsndout[6] => hphy_inst.I_IOINTCSNDOUT6io_intcsndout[7] => hphy_inst.I_IOINTCSNDOUT7io_intdmdout[0] => hphy_inst.I_IOINTDMDOUTio_intdmdout[1] => hphy_inst.I_IOINTDMDOUT1io_intdmdout[2] => hphy_inst.I_IOINTDMDOUT2io_intdmdout[3] => hphy_inst.I_IOINTDMDOUT3io_intdmdout[4] => hphy_inst.I_IOINTDMDOUT4io_intdmdout[5] => hphy_inst.I_IOINTDMDOUT5io_intdmdout[6] => hphy_inst.I_IOINTDMDOUT6io_intdmdout[7] => hphy_inst.I_IOINTDMDOUT7io_intdmdout[8] => hphy_inst.I_IOINTDMDOUT8io_intdmdout[9] => hphy_inst.I_IOINTDMDOUT9io_intdmdout[10] => hphy_inst.I_IOINTDMDOUT10io_intdmdout[11] => hphy_inst.I_IOINTDMDOUT11io_intdmdout[12] => hphy_inst.I_IOINTDMDOUT12io_intdmdout[13] => hphy_inst.I_IOINTDMDOUT13io_intdmdout[14] => hphy_inst.I_IOINTDMDOUT14io_intdmdout[15] => hphy_inst.I_IOINTDMDOUT15io_intdmdout[16] => hphy_inst.I_IOINTDMDOUT16io_intdmdout[17] => hphy_inst.I_IOINTDMDOUT17io_intdmdout[18] => hphy_inst.I_IOINTDMDOUT18io_intdmdout[19] => hphy_inst.I_IOINTDMDOUT19io_intdqdin[0] <= hphy_inst.O_IOINTDQDINio_intdqdin[1] <= hphy_inst.O_IOINTDQDIN1io_intdqdin[2] <= hphy_inst.O_IOINTDQDIN2io_intdqdin[3] <= hphy_inst.O_IOINTDQDIN3io_intdqdin[4] <= hphy_inst.O_IOINTDQDIN4io_intdqdin[5] <= hphy_inst.O_IOINTDQDIN5io_intdqdin[6] <= hphy_inst.O_IOINTDQDIN6io_intdqdin[7] <= hphy_inst.O_IOINTDQDIN7io_intdqdin[8] <= hphy_inst.O_IOINTDQDIN8io_intdqdin[9] <= hphy_inst.O_IOINTDQDIN9io_intdqdin[10] <= hphy_inst.O_IOINTDQDIN10io_intdqdin[11] <= hphy_inst.O_IOINTDQDIN11io_intdqdin[12] <= hphy_inst.O_IOINTDQDIN12io_intdqdin[13] <= hphy_inst.O_IOINTDQDIN13io_intdqdin[14] <= hphy_inst.O_IOINTDQDIN14io_intdqdin[15] <= hphy_inst.O_IOINTDQDIN15io_intdqdin[16] <= hphy_inst.O_IOINTDQDIN16io_intdqdin[17] <= hphy_inst.O_IOINTDQDIN17io_intdqdin[18] <= hphy_inst.O_IOINTDQDIN18io_intdqdin[19] <= hphy_inst.O_IOINTDQDIN19io_intdqdin[20] <= hphy_inst.O_IOINTDQDIN20io_intdqdin[21] <= hphy_inst.O_IOINTDQDIN21io_intdqdin[22] <= hphy_inst.O_IOINTDQDIN22io_intdqdin[23] <= hphy_inst.O_IOINTDQDIN23io_intdqdin[24] <= hphy_inst.O_IOINTDQDIN24io_intdqdin[25] <= hphy_inst.O_IOINTDQDIN25io_intdqdin[26] <= hphy_inst.O_IOINTDQDIN26io_intdqdin[27] <= hphy_inst.O_IOINTDQDIN27io_intdqdin[28] <= hphy_inst.O_IOINTDQDIN28io_intdqdin[29] <= hphy_inst.O_IOINTDQDIN29io_intdqdin[30] <= hphy_inst.O_IOINTDQDIN30io_intdqdin[31] <= hphy_inst.O_IOINTDQDIN31io_intdqdin[32] <= hphy_inst.O_IOINTDQDIN32io_intdqdin[33] <= hphy_inst.O_IOINTDQDIN33io_intdqdin[34] <= hphy_inst.O_IOINTDQDIN34io_intdqdin[35] <= hphy_inst.O_IOINTDQDIN35io_intdqdin[36] <= hphy_inst.O_IOINTDQDIN36io_intdqdin[37] <= hphy_inst.O_IOINTDQDIN37io_intdqdin[38] <= hphy_inst.O_IOINTDQDIN38io_intdqdin[39] <= hphy_inst.O_IOINTDQDIN39io_intdqdin[40] <= hphy_inst.O_IOINTDQDIN40io_intdqdin[41] <= hphy_inst.O_IOINTDQDIN41io_intdqdin[42] <= hphy_inst.O_IOINTDQDIN42io_intdqdin[43] <= hphy_inst.O_IOINTDQDIN43io_intdqdin[44] <= hphy_inst.O_IOINTDQDIN44io_intdqdin[45] <= hphy_inst.O_IOINTDQDIN45io_intdqdin[46] <= hphy_inst.O_IOINTDQDIN46io_intdqdin[47] <= hphy_inst.O_IOINTDQDIN47io_intdqdin[48] <= hphy_inst.O_IOINTDQDIN48io_intdqdin[49] <= hphy_inst.O_IOINTDQDIN49io_intdqdin[50] <= hphy_inst.O_IOINTDQDIN50io_intdqdin[51] <= hphy_inst.O_IOINTDQDIN51io_intdqdin[52] <= hphy_inst.O_IOINTDQDIN52io_intdqdin[53] <= hphy_inst.O_IOINTDQDIN53io_intdqdin[54] <= hphy_inst.O_IOINTDQDIN54io_intdqdin[55] <= hphy_inst.O_IOINTDQDIN55io_intdqdin[56] <= hphy_inst.O_IOINTDQDIN56io_intdqdin[57] <= hphy_inst.O_IOINTDQDIN57io_intdqdin[58] <= hphy_inst.O_IOINTDQDIN58io_intdqdin[59] <= hphy_inst.O_IOINTDQDIN59io_intdqdin[60] <= hphy_inst.O_IOINTDQDIN60io_intdqdin[61] <= hphy_inst.O_IOINTDQDIN61io_intdqdin[62] <= hphy_inst.O_IOINTDQDIN62io_intdqdin[63] <= hphy_inst.O_IOINTDQDIN63io_intdqdin[64] <= hphy_inst.O_IOINTDQDIN64io_intdqdin[65] <= hphy_inst.O_IOINTDQDIN65io_intdqdin[66] <= hphy_inst.O_IOINTDQDIN66io_intdqdin[67] <= hphy_inst.O_IOINTDQDIN67io_intdqdin[68] <= hphy_inst.O_IOINTDQDIN68io_intdqdin[69] <= hphy_inst.O_IOINTDQDIN69io_intdqdin[70] <= hphy_inst.O_IOINTDQDIN70io_intdqdin[71] <= hphy_inst.O_IOINTDQDIN71io_intdqdin[72] <= hphy_inst.O_IOINTDQDIN72io_intdqdin[73] <= hphy_inst.O_IOINTDQDIN73io_intdqdin[74] <= hphy_inst.O_IOINTDQDIN74io_intdqdin[75] <= hphy_inst.O_IOINTDQDIN75io_intdqdin[76] <= hphy_inst.O_IOINTDQDIN76io_intdqdin[77] <= hphy_inst.O_IOINTDQDIN77io_intdqdin[78] <= hphy_inst.O_IOINTDQDIN78io_intdqdin[79] <= hphy_inst.O_IOINTDQDIN79io_intdqdin[80] <= hphy_inst.O_IOINTDQDIN80io_intdqdin[81] <= hphy_inst.O_IOINTDQDIN81io_intdqdin[82] <= hphy_inst.O_IOINTDQDIN82io_intdqdin[83] <= hphy_inst.O_IOINTDQDIN83io_intdqdin[84] <= hphy_inst.O_IOINTDQDIN84io_intdqdin[85] <= hphy_inst.O_IOINTDQDIN85io_intdqdin[86] <= hphy_inst.O_IOINTDQDIN86io_intdqdin[87] <= hphy_inst.O_IOINTDQDIN87io_intdqdin[88] <= hphy_inst.O_IOINTDQDIN88io_intdqdin[89] <= hphy_inst.O_IOINTDQDIN89io_intdqdin[90] <= hphy_inst.O_IOINTDQDIN90io_intdqdin[91] <= hphy_inst.O_IOINTDQDIN91io_intdqdin[92] <= hphy_inst.O_IOINTDQDIN92io_intdqdin[93] <= hphy_inst.O_IOINTDQDIN93io_intdqdin[94] <= hphy_inst.O_IOINTDQDIN94io_intdqdin[95] <= hphy_inst.O_IOINTDQDIN95io_intdqdin[96] <= hphy_inst.O_IOINTDQDIN96io_intdqdin[97] <= hphy_inst.O_IOINTDQDIN97io_intdqdin[98] <= hphy_inst.O_IOINTDQDIN98io_intdqdin[99] <= hphy_inst.O_IOINTDQDIN99io_intdqdin[100] <= hphy_inst.O_IOINTDQDIN100io_intdqdin[101] <= hphy_inst.O_IOINTDQDIN101io_intdqdin[102] <= hphy_inst.O_IOINTDQDIN102io_intdqdin[103] <= hphy_inst.O_IOINTDQDIN103io_intdqdin[104] <= hphy_inst.O_IOINTDQDIN104io_intdqdin[105] <= hphy_inst.O_IOINTDQDIN105io_intdqdin[106] <= hphy_inst.O_IOINTDQDIN106io_intdqdin[107] <= hphy_inst.O_IOINTDQDIN107io_intdqdin[108] <= hphy_inst.O_IOINTDQDIN108io_intdqdin[109] <= hphy_inst.O_IOINTDQDIN109io_intdqdin[110] <= hphy_inst.O_IOINTDQDIN110io_intdqdin[111] <= hphy_inst.O_IOINTDQDIN111io_intdqdin[112] <= hphy_inst.O_IOINTDQDIN112io_intdqdin[113] <= hphy_inst.O_IOINTDQDIN113io_intdqdin[114] <= hphy_inst.O_IOINTDQDIN114io_intdqdin[115] <= hphy_inst.O_IOINTDQDIN115io_intdqdin[116] <= hphy_inst.O_IOINTDQDIN116io_intdqdin[117] <= hphy_inst.O_IOINTDQDIN117io_intdqdin[118] <= hphy_inst.O_IOINTDQDIN118io_intdqdin[119] <= hphy_inst.O_IOINTDQDIN119io_intdqdin[120] <= hphy_inst.O_IOINTDQDIN120io_intdqdin[121] <= hphy_inst.O_IOINTDQDIN121io_intdqdin[122] <= hphy_inst.O_IOINTDQDIN122io_intdqdin[123] <= hphy_inst.O_IOINTDQDIN123io_intdqdin[124] <= hphy_inst.O_IOINTDQDIN124io_intdqdin[125] <= hphy_inst.O_IOINTDQDIN125io_intdqdin[126] <= hphy_inst.O_IOINTDQDIN126io_intdqdin[127] <= hphy_inst.O_IOINTDQDIN127io_intdqdin[128] <= hphy_inst.O_IOINTDQDIN128io_intdqdin[129] <= hphy_inst.O_IOINTDQDIN129io_intdqdin[130] <= hphy_inst.O_IOINTDQDIN130io_intdqdin[131] <= hphy_inst.O_IOINTDQDIN131io_intdqdin[132] <= hphy_inst.O_IOINTDQDIN132io_intdqdin[133] <= hphy_inst.O_IOINTDQDIN133io_intdqdin[134] <= hphy_inst.O_IOINTDQDIN134io_intdqdin[135] <= hphy_inst.O_IOINTDQDIN135io_intdqdin[136] <= hphy_inst.O_IOINTDQDIN136io_intdqdin[137] <= hphy_inst.O_IOINTDQDIN137io_intdqdin[138] <= hphy_inst.O_IOINTDQDIN138io_intdqdin[139] <= hphy_inst.O_IOINTDQDIN139io_intdqdin[140] <= hphy_inst.O_IOINTDQDIN140io_intdqdin[141] <= hphy_inst.O_IOINTDQDIN141io_intdqdin[142] <= hphy_inst.O_IOINTDQDIN142io_intdqdin[143] <= hphy_inst.O_IOINTDQDIN143io_intdqdin[144] <= hphy_inst.O_IOINTDQDIN144io_intdqdin[145] <= hphy_inst.O_IOINTDQDIN145io_intdqdin[146] <= hphy_inst.O_IOINTDQDIN146io_intdqdin[147] <= hphy_inst.O_IOINTDQDIN147io_intdqdin[148] <= hphy_inst.O_IOINTDQDIN148io_intdqdin[149] <= hphy_inst.O_IOINTDQDIN149io_intdqdin[150] <= hphy_inst.O_IOINTDQDIN150io_intdqdin[151] <= hphy_inst.O_IOINTDQDIN151io_intdqdin[152] <= hphy_inst.O_IOINTDQDIN152io_intdqdin[153] <= hphy_inst.O_IOINTDQDIN153io_intdqdin[154] <= hphy_inst.O_IOINTDQDIN154io_intdqdin[155] <= hphy_inst.O_IOINTDQDIN155io_intdqdin[156] <= hphy_inst.O_IOINTDQDIN156io_intdqdin[157] <= hphy_inst.O_IOINTDQDIN157io_intdqdin[158] <= hphy_inst.O_IOINTDQDIN158io_intdqdin[159] <= hphy_inst.O_IOINTDQDIN159io_intdqdin[160] <= hphy_inst.O_IOINTDQDIN160io_intdqdin[161] <= hphy_inst.O_IOINTDQDIN161io_intdqdin[162] <= hphy_inst.O_IOINTDQDIN162io_intdqdin[163] <= hphy_inst.O_IOINTDQDIN163io_intdqdin[164] <= hphy_inst.O_IOINTDQDIN164io_intdqdin[165] <= hphy_inst.O_IOINTDQDIN165io_intdqdin[166] <= hphy_inst.O_IOINTDQDIN166io_intdqdin[167] <= hphy_inst.O_IOINTDQDIN167io_intdqdin[168] <= hphy_inst.O_IOINTDQDIN168io_intdqdin[169] <= hphy_inst.O_IOINTDQDIN169io_intdqdin[170] <= hphy_inst.O_IOINTDQDIN170io_intdqdin[171] <= hphy_inst.O_IOINTDQDIN171io_intdqdin[172] <= hphy_inst.O_IOINTDQDIN172io_intdqdin[173] <= hphy_inst.O_IOINTDQDIN173io_intdqdin[174] <= hphy_inst.O_IOINTDQDIN174io_intdqdin[175] <= hphy_inst.O_IOINTDQDIN175io_intdqdin[176] <= hphy_inst.O_IOINTDQDIN176io_intdqdin[177] <= hphy_inst.O_IOINTDQDIN177io_intdqdin[178] <= hphy_inst.O_IOINTDQDIN178io_intdqdin[179] <= hphy_inst.O_IOINTDQDIN179io_intdqdout[0] => hphy_inst.I_IOINTDQDOUTio_intdqdout[1] => hphy_inst.I_IOINTDQDOUT1io_intdqdout[2] => hphy_inst.I_IOINTDQDOUT2io_intdqdout[3] => hphy_inst.I_IOINTDQDOUT3io_intdqdout[4] => hphy_inst.I_IOINTDQDOUT4io_intdqdout[5] => hphy_inst.I_IOINTDQDOUT5io_intdqdout[6] => hphy_inst.I_IOINTDQDOUT6io_intdqdout[7] => hphy_inst.I_IOINTDQDOUT7io_intdqdout[8] => hphy_inst.I_IOINTDQDOUT8io_intdqdout[9] => hphy_inst.I_IOINTDQDOUT9io_intdqdout[10] => hphy_inst.I_IOINTDQDOUT10io_intdqdout[11] => hphy_inst.I_IOINTDQDOUT11io_intdqdout[12] => hphy_inst.I_IOINTDQDOUT12io_intdqdout[13] => hphy_inst.I_IOINTDQDOUT13io_intdqdout[14] => hphy_inst.I_IOINTDQDOUT14io_intdqdout[15] => hphy_inst.I_IOINTDQDOUT15io_intdqdout[16] => hphy_inst.I_IOINTDQDOUT16io_intdqdout[17] => hphy_inst.I_IOINTDQDOUT17io_intdqdout[18] => hphy_inst.I_IOINTDQDOUT18io_intdqdout[19] => hphy_inst.I_IOINTDQDOUT19io_intdqdout[20] => hphy_inst.I_IOINTDQDOUT20io_intdqdout[21] => hphy_inst.I_IOINTDQDOUT21io_intdqdout[22] => hphy_inst.I_IOINTDQDOUT22io_intdqdout[23] => hphy_inst.I_IOINTDQDOUT23io_intdqdout[24] => hphy_inst.I_IOINTDQDOUT24io_intdqdout[25] => hphy_inst.I_IOINTDQDOUT25io_intdqdout[26] => hphy_inst.I_IOINTDQDOUT26io_intdqdout[27] => hphy_inst.I_IOINTDQDOUT27io_intdqdout[28] => hphy_inst.I_IOINTDQDOUT28io_intdqdout[29] => hphy_inst.I_IOINTDQDOUT29io_intdqdout[30] => hphy_inst.I_IOINTDQDOUT30io_intdqdout[31] => hphy_inst.I_IOINTDQDOUT31io_intdqdout[32] => hphy_inst.I_IOINTDQDOUT32io_intdqdout[33] => hphy_inst.I_IOINTDQDOUT33io_intdqdout[34] => hphy_inst.I_IOINTDQDOUT34io_intdqdout[35] => hphy_inst.I_IOINTDQDOUT35io_intdqdout[36] => hphy_inst.I_IOINTDQDOUT36io_intdqdout[37] => hphy_inst.I_IOINTDQDOUT37io_intdqdout[38] => hphy_inst.I_IOINTDQDOUT38io_intdqdout[39] => hphy_inst.I_IOINTDQDOUT39io_intdqdout[40] => hphy_inst.I_IOINTDQDOUT40io_intdqdout[41] => hphy_inst.I_IOINTDQDOUT41io_intdqdout[42] => hphy_inst.I_IOINTDQDOUT42io_intdqdout[43] => hphy_inst.I_IOINTDQDOUT43io_intdqdout[44] => hphy_inst.I_IOINTDQDOUT44io_intdqdout[45] => hphy_inst.I_IOINTDQDOUT45io_intdqdout[46] => hphy_inst.I_IOINTDQDOUT46io_intdqdout[47] => hphy_inst.I_IOINTDQDOUT47io_intdqdout[48] => hphy_inst.I_IOINTDQDOUT48io_intdqdout[49] => hphy_inst.I_IOINTDQDOUT49io_intdqdout[50] => hphy_inst.I_IOINTDQDOUT50io_intdqdout[51] => hphy_inst.I_IOINTDQDOUT51io_intdqdout[52] => hphy_inst.I_IOINTDQDOUT52io_intdqdout[53] => hphy_inst.I_IOINTDQDOUT53io_intdqdout[54] => hphy_inst.I_IOINTDQDOUT54io_intdqdout[55] => hphy_inst.I_IOINTDQDOUT55io_intdqdout[56] => hphy_inst.I_IOINTDQDOUT56io_intdqdout[57] => hphy_inst.I_IOINTDQDOUT57io_intdqdout[58] => hphy_inst.I_IOINTDQDOUT58io_intdqdout[59] => hphy_inst.I_IOINTDQDOUT59io_intdqdout[60] => hphy_inst.I_IOINTDQDOUT60io_intdqdout[61] => hphy_inst.I_IOINTDQDOUT61io_intdqdout[62] => hphy_inst.I_IOINTDQDOUT62io_intdqdout[63] => hphy_inst.I_IOINTDQDOUT63io_intdqdout[64] => hphy_inst.I_IOINTDQDOUT64io_intdqdout[65] => hphy_inst.I_IOINTDQDOUT65io_intdqdout[66] => hphy_inst.I_IOINTDQDOUT66io_intdqdout[67] => hphy_inst.I_IOINTDQDOUT67io_intdqdout[68] => hphy_inst.I_IOINTDQDOUT68io_intdqdout[69] => hphy_inst.I_IOINTDQDOUT69io_intdqdout[70] => hphy_inst.I_IOINTDQDOUT70io_intdqdout[71] => hphy_inst.I_IOINTDQDOUT71io_intdqdout[72] => hphy_inst.I_IOINTDQDOUT72io_intdqdout[73] => hphy_inst.I_IOINTDQDOUT73io_intdqdout[74] => hphy_inst.I_IOINTDQDOUT74io_intdqdout[75] => hphy_inst.I_IOINTDQDOUT75io_intdqdout[76] => hphy_inst.I_IOINTDQDOUT76io_intdqdout[77] => hphy_inst.I_IOINTDQDOUT77io_intdqdout[78] => hphy_inst.I_IOINTDQDOUT78io_intdqdout[79] => hphy_inst.I_IOINTDQDOUT79io_intdqdout[80] => hphy_inst.I_IOINTDQDOUT80io_intdqdout[81] => hphy_inst.I_IOINTDQDOUT81io_intdqdout[82] => hphy_inst.I_IOINTDQDOUT82io_intdqdout[83] => hphy_inst.I_IOINTDQDOUT83io_intdqdout[84] => hphy_inst.I_IOINTDQDOUT84io_intdqdout[85] => hphy_inst.I_IOINTDQDOUT85io_intdqdout[86] => hphy_inst.I_IOINTDQDOUT86io_intdqdout[87] => hphy_inst.I_IOINTDQDOUT87io_intdqdout[88] => hphy_inst.I_IOINTDQDOUT88io_intdqdout[89] => hphy_inst.I_IOINTDQDOUT89io_intdqdout[90] => hphy_inst.I_IOINTDQDOUT90io_intdqdout[91] => hphy_inst.I_IOINTDQDOUT91io_intdqdout[92] => hphy_inst.I_IOINTDQDOUT92io_intdqdout[93] => hphy_inst.I_IOINTDQDOUT93io_intdqdout[94] => hphy_inst.I_IOINTDQDOUT94io_intdqdout[95] => hphy_inst.I_IOINTDQDOUT95io_intdqdout[96] => hphy_inst.I_IOINTDQDOUT96io_intdqdout[97] => hphy_inst.I_IOINTDQDOUT97io_intdqdout[98] => hphy_inst.I_IOINTDQDOUT98io_intdqdout[99] => hphy_inst.I_IOINTDQDOUT99io_intdqdout[100] => hphy_inst.I_IOINTDQDOUT100io_intdqdout[101] => hphy_inst.I_IOINTDQDOUT101io_intdqdout[102] => hphy_inst.I_IOINTDQDOUT102io_intdqdout[103] => hphy_inst.I_IOINTDQDOUT103io_intdqdout[104] => hphy_inst.I_IOINTDQDOUT104io_intdqdout[105] => hphy_inst.I_IOINTDQDOUT105io_intdqdout[106] => hphy_inst.I_IOINTDQDOUT106io_intdqdout[107] => hphy_inst.I_IOINTDQDOUT107io_intdqdout[108] => hphy_inst.I_IOINTDQDOUT108io_intdqdout[109] => hphy_inst.I_IOINTDQDOUT109io_intdqdout[110] => hphy_inst.I_IOINTDQDOUT110io_intdqdout[111] => hphy_inst.I_IOINTDQDOUT111io_intdqdout[112] => hphy_inst.I_IOINTDQDOUT112io_intdqdout[113] => hphy_inst.I_IOINTDQDOUT113io_intdqdout[114] => hphy_inst.I_IOINTDQDOUT114io_intdqdout[115] => hphy_inst.I_IOINTDQDOUT115io_intdqdout[116] => hphy_inst.I_IOINTDQDOUT116io_intdqdout[117] => hphy_inst.I_IOINTDQDOUT117io_intdqdout[118] => hphy_inst.I_IOINTDQDOUT118io_intdqdout[119] => hphy_inst.I_IOINTDQDOUT119io_intdqdout[120] => hphy_inst.I_IOINTDQDOUT120io_intdqdout[121] => hphy_inst.I_IOINTDQDOUT121io_intdqdout[122] => hphy_inst.I_IOINTDQDOUT122io_intdqdout[123] => hphy_inst.I_IOINTDQDOUT123io_intdqdout[124] => hphy_inst.I_IOINTDQDOUT124io_intdqdout[125] => hphy_inst.I_IOINTDQDOUT125io_intdqdout[126] => hphy_inst.I_IOINTDQDOUT126io_intdqdout[127] => hphy_inst.I_IOINTDQDOUT127io_intdqdout[128] => hphy_inst.I_IOINTDQDOUT128io_intdqdout[129] => hphy_inst.I_IOINTDQDOUT129io_intdqdout[130] => hphy_inst.I_IOINTDQDOUT130io_intdqdout[131] => hphy_inst.I_IOINTDQDOUT131io_intdqdout[132] => hphy_inst.I_IOINTDQDOUT132io_intdqdout[133] => hphy_inst.I_IOINTDQDOUT133io_intdqdout[134] => hphy_inst.I_IOINTDQDOUT134io_intdqdout[135] => hphy_inst.I_IOINTDQDOUT135io_intdqdout[136] => hphy_inst.I_IOINTDQDOUT136io_intdqdout[137] => hphy_inst.I_IOINTDQDOUT137io_intdqdout[138] => hphy_inst.I_IOINTDQDOUT138io_intdqdout[139] => hphy_inst.I_IOINTDQDOUT139io_intdqdout[140] => hphy_inst.I_IOINTDQDOUT140io_intdqdout[141] => hphy_inst.I_IOINTDQDOUT141io_intdqdout[142] => hphy_inst.I_IOINTDQDOUT142io_intdqdout[143] => hphy_inst.I_IOINTDQDOUT143io_intdqdout[144] => hphy_inst.I_IOINTDQDOUT144io_intdqdout[145] => hphy_inst.I_IOINTDQDOUT145io_intdqdout[146] => hphy_inst.I_IOINTDQDOUT146io_intdqdout[147] => hphy_inst.I_IOINTDQDOUT147io_intdqdout[148] => hphy_inst.I_IOINTDQDOUT148io_intdqdout[149] => hphy_inst.I_IOINTDQDOUT149io_intdqdout[150] => hphy_inst.I_IOINTDQDOUT150io_intdqdout[151] => hphy_inst.I_IOINTDQDOUT151io_intdqdout[152] => hphy_inst.I_IOINTDQDOUT152io_intdqdout[153] => hphy_inst.I_IOINTDQDOUT153io_intdqdout[154] => hphy_inst.I_IOINTDQDOUT154io_intdqdout[155] => hphy_inst.I_IOINTDQDOUT155io_intdqdout[156] => hphy_inst.I_IOINTDQDOUT156io_intdqdout[157] => hphy_inst.I_IOINTDQDOUT157io_intdqdout[158] => hphy_inst.I_IOINTDQDOUT158io_intdqdout[159] => hphy_inst.I_IOINTDQDOUT159io_intdqdout[160] => hphy_inst.I_IOINTDQDOUT160io_intdqdout[161] => hphy_inst.I_IOINTDQDOUT161io_intdqdout[162] => hphy_inst.I_IOINTDQDOUT162io_intdqdout[163] => hphy_inst.I_IOINTDQDOUT163io_intdqdout[164] => hphy_inst.I_IOINTDQDOUT164io_intdqdout[165] => hphy_inst.I_IOINTDQDOUT165io_intdqdout[166] => hphy_inst.I_IOINTDQDOUT166io_intdqdout[167] => hphy_inst.I_IOINTDQDOUT167io_intdqdout[168] => hphy_inst.I_IOINTDQDOUT168io_intdqdout[169] => hphy_inst.I_IOINTDQDOUT169io_intdqdout[170] => hphy_inst.I_IOINTDQDOUT170io_intdqdout[171] => hphy_inst.I_IOINTDQDOUT171io_intdqdout[172] => hphy_inst.I_IOINTDQDOUT172io_intdqdout[173] => hphy_inst.I_IOINTDQDOUT173io_intdqdout[174] => hphy_inst.I_IOINTDQDOUT174io_intdqdout[175] => hphy_inst.I_IOINTDQDOUT175io_intdqdout[176] => hphy_inst.I_IOINTDQDOUT176io_intdqdout[177] => hphy_inst.I_IOINTDQDOUT177io_intdqdout[178] => hphy_inst.I_IOINTDQDOUT178io_intdqdout[179] => hphy_inst.I_IOINTDQDOUT179io_intdqoe[0] => hphy_inst.I_IOINTDQOEio_intdqoe[1] => hphy_inst.I_IOINTDQOE1io_intdqoe[2] => hphy_inst.I_IOINTDQOE2io_intdqoe[3] => hphy_inst.I_IOINTDQOE3io_intdqoe[4] => hphy_inst.I_IOINTDQOE4io_intdqoe[5] => hphy_inst.I_IOINTDQOE5io_intdqoe[6] => hphy_inst.I_IOINTDQOE6io_intdqoe[7] => hphy_inst.I_IOINTDQOE7io_intdqoe[8] => hphy_inst.I_IOINTDQOE8io_intdqoe[9] => hphy_inst.I_IOINTDQOE9io_intdqoe[10] => hphy_inst.I_IOINTDQOE10io_intdqoe[11] => hphy_inst.I_IOINTDQOE11io_intdqoe[12] => hphy_inst.I_IOINTDQOE12io_intdqoe[13] => hphy_inst.I_IOINTDQOE13io_intdqoe[14] => hphy_inst.I_IOINTDQOE14io_intdqoe[15] => hphy_inst.I_IOINTDQOE15io_intdqoe[16] => hphy_inst.I_IOINTDQOE16io_intdqoe[17] => hphy_inst.I_IOINTDQOE17io_intdqoe[18] => hphy_inst.I_IOINTDQOE18io_intdqoe[19] => hphy_inst.I_IOINTDQOE19io_intdqoe[20] => hphy_inst.I_IOINTDQOE20io_intdqoe[21] => hphy_inst.I_IOINTDQOE21io_intdqoe[22] => hphy_inst.I_IOINTDQOE22io_intdqoe[23] => hphy_inst.I_IOINTDQOE23io_intdqoe[24] => hphy_inst.I_IOINTDQOE24io_intdqoe[25] => hphy_inst.I_IOINTDQOE25io_intdqoe[26] => hphy_inst.I_IOINTDQOE26io_intdqoe[27] => hphy_inst.I_IOINTDQOE27io_intdqoe[28] => hphy_inst.I_IOINTDQOE28io_intdqoe[29] => hphy_inst.I_IOINTDQOE29io_intdqoe[30] => hphy_inst.I_IOINTDQOE30io_intdqoe[31] => hphy_inst.I_IOINTDQOE31io_intdqoe[32] => hphy_inst.I_IOINTDQOE32io_intdqoe[33] => hphy_inst.I_IOINTDQOE33io_intdqoe[34] => hphy_inst.I_IOINTDQOE34io_intdqoe[35] => hphy_inst.I_IOINTDQOE35io_intdqoe[36] => hphy_inst.I_IOINTDQOE36io_intdqoe[37] => hphy_inst.I_IOINTDQOE37io_intdqoe[38] => hphy_inst.I_IOINTDQOE38io_intdqoe[39] => hphy_inst.I_IOINTDQOE39io_intdqoe[40] => hphy_inst.I_IOINTDQOE40io_intdqoe[41] => hphy_inst.I_IOINTDQOE41io_intdqoe[42] => hphy_inst.I_IOINTDQOE42io_intdqoe[43] => hphy_inst.I_IOINTDQOE43io_intdqoe[44] => hphy_inst.I_IOINTDQOE44io_intdqoe[45] => hphy_inst.I_IOINTDQOE45io_intdqoe[46] => hphy_inst.I_IOINTDQOE46io_intdqoe[47] => hphy_inst.I_IOINTDQOE47io_intdqoe[48] => hphy_inst.I_IOINTDQOE48io_intdqoe[49] => hphy_inst.I_IOINTDQOE49io_intdqoe[50] => hphy_inst.I_IOINTDQOE50io_intdqoe[51] => hphy_inst.I_IOINTDQOE51io_intdqoe[52] => hphy_inst.I_IOINTDQOE52io_intdqoe[53] => hphy_inst.I_IOINTDQOE53io_intdqoe[54] => hphy_inst.I_IOINTDQOE54io_intdqoe[55] => hphy_inst.I_IOINTDQOE55io_intdqoe[56] => hphy_inst.I_IOINTDQOE56io_intdqoe[57] => hphy_inst.I_IOINTDQOE57io_intdqoe[58] => hphy_inst.I_IOINTDQOE58io_intdqoe[59] => hphy_inst.I_IOINTDQOE59io_intdqoe[60] => hphy_inst.I_IOINTDQOE60io_intdqoe[61] => hphy_inst.I_IOINTDQOE61io_intdqoe[62] => hphy_inst.I_IOINTDQOE62io_intdqoe[63] => hphy_inst.I_IOINTDQOE63io_intdqoe[64] => hphy_inst.I_IOINTDQOE64io_intdqoe[65] => hphy_inst.I_IOINTDQOE65io_intdqoe[66] => hphy_inst.I_IOINTDQOE66io_intdqoe[67] => hphy_inst.I_IOINTDQOE67io_intdqoe[68] => hphy_inst.I_IOINTDQOE68io_intdqoe[69] => hphy_inst.I_IOINTDQOE69io_intdqoe[70] => hphy_inst.I_IOINTDQOE70io_intdqoe[71] => hphy_inst.I_IOINTDQOE71io_intdqoe[72] => hphy_inst.I_IOINTDQOE72io_intdqoe[73] => hphy_inst.I_IOINTDQOE73io_intdqoe[74] => hphy_inst.I_IOINTDQOE74io_intdqoe[75] => hphy_inst.I_IOINTDQOE75io_intdqoe[76] => hphy_inst.I_IOINTDQOE76io_intdqoe[77] => hphy_inst.I_IOINTDQOE77io_intdqoe[78] => hphy_inst.I_IOINTDQOE78io_intdqoe[79] => hphy_inst.I_IOINTDQOE79io_intdqoe[80] => hphy_inst.I_IOINTDQOE80io_intdqoe[81] => hphy_inst.I_IOINTDQOE81io_intdqoe[82] => hphy_inst.I_IOINTDQOE82io_intdqoe[83] => hphy_inst.I_IOINTDQOE83io_intdqoe[84] => hphy_inst.I_IOINTDQOE84io_intdqoe[85] => hphy_inst.I_IOINTDQOE85io_intdqoe[86] => hphy_inst.I_IOINTDQOE86io_intdqoe[87] => hphy_inst.I_IOINTDQOE87io_intdqoe[88] => hphy_inst.I_IOINTDQOE88io_intdqoe[89] => hphy_inst.I_IOINTDQOE89io_intdqsbdout[0] => hphy_inst.I_IOINTDQSBDOUTio_intdqsbdout[1] => hphy_inst.I_IOINTDQSBDOUT1io_intdqsbdout[2] => hphy_inst.I_IOINTDQSBDOUT2io_intdqsbdout[3] => hphy_inst.I_IOINTDQSBDOUT3io_intdqsbdout[4] => hphy_inst.I_IOINTDQSBDOUT4io_intdqsbdout[5] => hphy_inst.I_IOINTDQSBDOUT5io_intdqsbdout[6] => hphy_inst.I_IOINTDQSBDOUT6io_intdqsbdout[7] => hphy_inst.I_IOINTDQSBDOUT7io_intdqsbdout[8] => hphy_inst.I_IOINTDQSBDOUT8io_intdqsbdout[9] => hphy_inst.I_IOINTDQSBDOUT9io_intdqsbdout[10] => hphy_inst.I_IOINTDQSBDOUT10io_intdqsbdout[11] => hphy_inst.I_IOINTDQSBDOUT11io_intdqsbdout[12] => hphy_inst.I_IOINTDQSBDOUT12io_intdqsbdout[13] => hphy_inst.I_IOINTDQSBDOUT13io_intdqsbdout[14] => hphy_inst.I_IOINTDQSBDOUT14io_intdqsbdout[15] => hphy_inst.I_IOINTDQSBDOUT15io_intdqsbdout[16] => hphy_inst.I_IOINTDQSBDOUT16io_intdqsbdout[17] => hphy_inst.I_IOINTDQSBDOUT17io_intdqsbdout[18] => hphy_inst.I_IOINTDQSBDOUT18io_intdqsbdout[19] => hphy_inst.I_IOINTDQSBDOUT19io_intdqsboe[0] => hphy_inst.I_IOINTDQSBOEio_intdqsboe[1] => hphy_inst.I_IOINTDQSBOE1io_intdqsboe[2] => hphy_inst.I_IOINTDQSBOE2io_intdqsboe[3] => hphy_inst.I_IOINTDQSBOE3io_intdqsboe[4] => hphy_inst.I_IOINTDQSBOE4io_intdqsboe[5] => hphy_inst.I_IOINTDQSBOE5io_intdqsboe[6] => hphy_inst.I_IOINTDQSBOE6io_intdqsboe[7] => hphy_inst.I_IOINTDQSBOE7io_intdqsboe[8] => hphy_inst.I_IOINTDQSBOE8io_intdqsboe[9] => hphy_inst.I_IOINTDQSBOE9io_intdqsdout[0] => hphy_inst.I_IOINTDQSDOUTio_intdqsdout[1] => hphy_inst.I_IOINTDQSDOUT1io_intdqsdout[2] => hphy_inst.I_IOINTDQSDOUT2io_intdqsdout[3] => hphy_inst.I_IOINTDQSDOUT3io_intdqsdout[4] => hphy_inst.I_IOINTDQSDOUT4io_intdqsdout[5] => hphy_inst.I_IOINTDQSDOUT5io_intdqsdout[6] => hphy_inst.I_IOINTDQSDOUT6io_intdqsdout[7] => hphy_inst.I_IOINTDQSDOUT7io_intdqsdout[8] => hphy_inst.I_IOINTDQSDOUT8io_intdqsdout[9] => hphy_inst.I_IOINTDQSDOUT9io_intdqsdout[10] => hphy_inst.I_IOINTDQSDOUT10io_intdqsdout[11] => hphy_inst.I_IOINTDQSDOUT11io_intdqsdout[12] => hphy_inst.I_IOINTDQSDOUT12io_intdqsdout[13] => hphy_inst.I_IOINTDQSDOUT13io_intdqsdout[14] => hphy_inst.I_IOINTDQSDOUT14io_intdqsdout[15] => hphy_inst.I_IOINTDQSDOUT15io_intdqsdout[16] => hphy_inst.I_IOINTDQSDOUT16io_intdqsdout[17] => hphy_inst.I_IOINTDQSDOUT17io_intdqsdout[18] => hphy_inst.I_IOINTDQSDOUT18io_intdqsdout[19] => hphy_inst.I_IOINTDQSDOUT19io_intdqslogicdqsena[0] => hphy_inst.I_IOINTDQSLOGICDQSENAio_intdqslogicdqsena[1] => hphy_inst.I_IOINTDQSLOGICDQSENA1io_intdqslogicdqsena[2] => hphy_inst.I_IOINTDQSLOGICDQSENA2io_intdqslogicdqsena[3] => hphy_inst.I_IOINTDQSLOGICDQSENA3io_intdqslogicdqsena[4] => hphy_inst.I_IOINTDQSLOGICDQSENA4io_intdqslogicdqsena[5] => hphy_inst.I_IOINTDQSLOGICDQSENA5io_intdqslogicdqsena[6] => hphy_inst.I_IOINTDQSLOGICDQSENA6io_intdqslogicdqsena[7] => hphy_inst.I_IOINTDQSLOGICDQSENA7io_intdqslogicdqsena[8] => hphy_inst.I_IOINTDQSLOGICDQSENA8io_intdqslogicdqsena[9] => hphy_inst.I_IOINTDQSLOGICDQSENA9io_intdqslogicfiforeset[0] => hphy_inst.I_IOINTDQSLOGICFIFORESETio_intdqslogicfiforeset[1] => hphy_inst.I_IOINTDQSLOGICFIFORESET1io_intdqslogicfiforeset[2] => hphy_inst.I_IOINTDQSLOGICFIFORESET2io_intdqslogicfiforeset[3] => hphy_inst.I_IOINTDQSLOGICFIFORESET3io_intdqslogicfiforeset[4] => hphy_inst.I_IOINTDQSLOGICFIFORESET4io_intdqslogicincrdataen[0] => hphy_inst.I_IOINTDQSLOGICINCRDATAENio_intdqslogicincrdataen[1] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN1io_intdqslogicincrdataen[2] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN2io_intdqslogicincrdataen[3] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN3io_intdqslogicincrdataen[4] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN4io_intdqslogicincrdataen[5] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN5io_intdqslogicincrdataen[6] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN6io_intdqslogicincrdataen[7] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN7io_intdqslogicincrdataen[8] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN8io_intdqslogicincrdataen[9] => hphy_inst.I_IOINTDQSLOGICINCRDATAEN9io_intdqslogicincwrptr[0] => hphy_inst.I_IOINTDQSLOGICINCWRPTRio_intdqslogicincwrptr[1] => hphy_inst.I_IOINTDQSLOGICINCWRPTR1io_intdqslogicincwrptr[2] => hphy_inst.I_IOINTDQSLOGICINCWRPTR2io_intdqslogicincwrptr[3] => hphy_inst.I_IOINTDQSLOGICINCWRPTR3io_intdqslogicincwrptr[4] => hphy_inst.I_IOINTDQSLOGICINCWRPTR4io_intdqslogicincwrptr[5] => hphy_inst.I_IOINTDQSLOGICINCWRPTR5io_intdqslogicincwrptr[6] => hphy_inst.I_IOINTDQSLOGICINCWRPTR6io_intdqslogicincwrptr[7] => hphy_inst.I_IOINTDQSLOGICINCWRPTR7io_intdqslogicincwrptr[8] => hphy_inst.I_IOINTDQSLOGICINCWRPTR8io_intdqslogicincwrptr[9] => hphy_inst.I_IOINTDQSLOGICINCWRPTR9io_intdqslogicoct[0] => hphy_inst.I_IOINTDQSLOGICOCTio_intdqslogicoct[1] => hphy_inst.I_IOINTDQSLOGICOCT1io_intdqslogicoct[2] => hphy_inst.I_IOINTDQSLOGICOCT2io_intdqslogicoct[3] => hphy_inst.I_IOINTDQSLOGICOCT3io_intdqslogicoct[4] => hphy_inst.I_IOINTDQSLOGICOCT4io_intdqslogicoct[5] => hphy_inst.I_IOINTDQSLOGICOCT5io_intdqslogicoct[6] => hphy_inst.I_IOINTDQSLOGICOCT6io_intdqslogicoct[7] => hphy_inst.I_IOINTDQSLOGICOCT7io_intdqslogicoct[8] => hphy_inst.I_IOINTDQSLOGICOCT8io_intdqslogicoct[9] => hphy_inst.I_IOINTDQSLOGICOCT9io_intdqslogicrdatavalid[0] <= hphy_inst.O_IOINTDQSLOGICRDATAVALIDio_intdqslogicrdatavalid[1] <= hphy_inst.O_IOINTDQSLOGICRDATAVALID1io_intdqslogicrdatavalid[2] <= hphy_inst.O_IOINTDQSLOGICRDATAVALID2io_intdqslogicrdatavalid[3] <= hphy_inst.O_IOINTDQSLOGICRDATAVALID3io_intdqslogicrdatavalid[4] <= hphy_inst.O_IOINTDQSLOGICRDATAVALID4io_intdqslogicreadlatency[0] => hphy_inst.I_IOINTDQSLOGICREADLATENCYio_intdqslogicreadlatency[1] => hphy_inst.I_IOINTDQSLOGICREADLATENCY1io_intdqslogicreadlatency[2] => hphy_inst.I_IOINTDQSLOGICREADLATENCY2io_intdqslogicreadlatency[3] => hphy_inst.I_IOINTDQSLOGICREADLATENCY3io_intdqslogicreadlatency[4] => hphy_inst.I_IOINTDQSLOGICREADLATENCY4io_intdqslogicreadlatency[5] => hphy_inst.I_IOINTDQSLOGICREADLATENCY5io_intdqslogicreadlatency[6] => hphy_inst.I_IOINTDQSLOGICREADLATENCY6io_intdqslogicreadlatency[7] => hphy_inst.I_IOINTDQSLOGICREADLATENCY7io_intdqslogicreadlatency[8] => hphy_inst.I_IOINTDQSLOGICREADLATENCY8io_intdqslogicreadlatency[9] => hphy_inst.I_IOINTDQSLOGICREADLATENCY9io_intdqslogicreadlatency[10] => hphy_inst.I_IOINTDQSLOGICREADLATENCY10io_intdqslogicreadlatency[11] => hphy_inst.I_IOINTDQSLOGICREADLATENCY11io_intdqslogicreadlatency[12] => hphy_inst.I_IOINTDQSLOGICREADLATENCY12io_intdqslogicreadlatency[13] => hphy_inst.I_IOINTDQSLOGICREADLATENCY13io_intdqslogicreadlatency[14] => hphy_inst.I_IOINTDQSLOGICREADLATENCY14io_intdqslogicreadlatency[15] => hphy_inst.I_IOINTDQSLOGICREADLATENCY15io_intdqslogicreadlatency[16] => hphy_inst.I_IOINTDQSLOGICREADLATENCY16io_intdqslogicreadlatency[17] => hphy_inst.I_IOINTDQSLOGICREADLATENCY17io_intdqslogicreadlatency[18] => hphy_inst.I_IOINTDQSLOGICREADLATENCY18io_intdqslogicreadlatency[19] => hphy_inst.I_IOINTDQSLOGICREADLATENCY19io_intdqslogicreadlatency[20] => hphy_inst.I_IOINTDQSLOGICREADLATENCY20io_intdqslogicreadlatency[21] => hphy_inst.I_IOINTDQSLOGICREADLATENCY21io_intdqslogicreadlatency[22] => hphy_inst.I_IOINTDQSLOGICREADLATENCY22io_intdqslogicreadlatency[23] => hphy_inst.I_IOINTDQSLOGICREADLATENCY23io_intdqslogicreadlatency[24] => hphy_inst.I_IOINTDQSLOGICREADLATENCY24io_intdqsoe[0] => hphy_inst.I_IOINTDQSOEio_intdqsoe[1] => hphy_inst.I_IOINTDQSOE1io_intdqsoe[2] => hphy_inst.I_IOINTDQSOE2io_intdqsoe[3] => hphy_inst.I_IOINTDQSOE3io_intdqsoe[4] => hphy_inst.I_IOINTDQSOE4io_intdqsoe[5] => hphy_inst.I_IOINTDQSOE5io_intdqsoe[6] => hphy_inst.I_IOINTDQSOE6io_intdqsoe[7] => hphy_inst.I_IOINTDQSOE7io_intdqsoe[8] => hphy_inst.I_IOINTDQSOE8io_intdqsoe[9] => hphy_inst.I_IOINTDQSOE9io_intodtdout[0] => hphy_inst.I_IOINTODTDOUTio_intodtdout[1] => hphy_inst.I_IOINTODTDOUT1io_intodtdout[2] => hphy_inst.I_IOINTODTDOUT2io_intodtdout[3] => hphy_inst.I_IOINTODTDOUT3io_intodtdout[4] => hphy_inst.I_IOINTODTDOUT4io_intodtdout[5] => hphy_inst.I_IOINTODTDOUT5io_intodtdout[6] => hphy_inst.I_IOINTODTDOUT6io_intodtdout[7] => hphy_inst.I_IOINTODTDOUT7io_intrasndout[0] => hphy_inst.I_IOINTRASNDOUTio_intrasndout[1] => hphy_inst.I_IOINTRASNDOUT1io_intrasndout[2] => hphy_inst.I_IOINTRASNDOUT2io_intrasndout[3] => hphy_inst.I_IOINTRASNDOUT3io_intresetndout[0] => hphy_inst.I_IOINTRESETNDOUTio_intresetndout[1] => hphy_inst.I_IOINTRESETNDOUT1io_intresetndout[2] => hphy_inst.I_IOINTRESETNDOUT2io_intresetndout[3] => hphy_inst.I_IOINTRESETNDOUT3io_intwendout[0] => hphy_inst.I_IOINTWENDOUTio_intwendout[1] => hphy_inst.I_IOINTWENDOUT1io_intwendout[2] => hphy_inst.I_IOINTWENDOUT2io_intwendout[3] => hphy_inst.I_IOINTWENDOUT3io_intafirlat[0] <= hphy_inst.O_IOINTAFIRLATio_intafirlat[1] <= hphy_inst.O_IOINTAFIRLAT1io_intafirlat[2] <= hphy_inst.O_IOINTAFIRLAT2io_intafirlat[3] <= hphy_inst.O_IOINTAFIRLAT3io_intafirlat[4] <= hphy_inst.O_IOINTAFIRLAT4io_intafiwlat[0] <= hphy_inst.O_IOINTAFIWLATio_intafiwlat[1] <= hphy_inst.O_IOINTAFIWLAT1io_intafiwlat[2] <= hphy_inst.O_IOINTAFIWLAT2io_intafiwlat[3] <= hphy_inst.O_IOINTAFIWLAT3io_intaficalfail <= hphy_inst.O_IOINTAFICALFAILio_intaficalsuccess <= hphy_inst.O_IOINTAFICALSUCCESSmem_a[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[1] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[2] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[3] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[4] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[5] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[6] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[7] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[8] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[9] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[10] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[11] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_a[12] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_addressmem_ba[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_bankmem_ba[1] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_bankmem_ba[2] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_bankmem_cs_n[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_cs_nmem_cke[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_ckemem_odt[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_odtmem_we_n[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_we_nmem_ras_n[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_ras_nmem_cas_n[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_cas_nmem_reset_n <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_reset_nmem_dq[0] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[1] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[2] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[3] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[4] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[5] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[6] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dq[7] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dqmem_dm[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_dmmem_ck[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_ckmem_ck_n[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.phy_mem_ck_nmem_dqs[0] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.mem_dqsmem_dqs_n[0] <> hps_sdram_p0_acv_hard_io_pads:uio_pads.mem_dqs_nreset_n_scc_clk <= global_reset_n.DB_MAX_OUTPUT_PORT_TYPEreset_n_avl_clk <= global_reset_n.DB_MAX_OUTPUT_PORT_TYPEscc_data => scc_data.IN1scc_dqs_ena[0] => scc_dqs_ena[0].IN1scc_dqs_io_ena[0] => scc_dqs_io_ena[0].IN1scc_dq_ena[0] => scc_dq_ena[0].IN1scc_dq_ena[1] => scc_dq_ena[1].IN1scc_dq_ena[2] => scc_dq_ena[2].IN1scc_dq_ena[3] => scc_dq_ena[3].IN1scc_dq_ena[4] => scc_dq_ena[4].IN1scc_dq_ena[5] => scc_dq_ena[5].IN1scc_dq_ena[6] => scc_dq_ena[6].IN1scc_dq_ena[7] => scc_dq_ena[7].IN1scc_dm_ena[0] => scc_dm_ena[0].IN1scc_upd[0] => scc_upd[0].IN1capture_strobe_tracking[0] <= hps_sdram_p0_acv_hard_io_pads:uio_pads.capture_strobe_trackingphy_clk <= seq_clk.DB_MAX_OUTPUT_PORT_TYPEctl_clk <= hps_sdram_p0_acv_ldc:memphy_ldc.afi_clkphy_reset_n <= phy_reset_n.DB_MAX_OUTPUT_PORT_TYPEpll_afi_clk => pll_afi_clk.IN1pll_afi_half_clk => ~NO_FANOUT~pll_addr_cmd_clk => ~NO_FANOUT~pll_mem_clk => pll_mem_clk.IN1pll_mem_phy_clk => pll_mem_phy_clk.IN2pll_afi_phy_clk => pll_afi_phy_clk.IN1pll_avl_phy_clk => pll_avl_phy_clk.IN2pll_write_clk => pll_write_clk.IN2pll_write_clk_pre_phy_clk => dll_clk.DATAINpll_dqs_ena_clk => pll_dqs_ena_clk.IN1seq_clk => phy_clk.DATAINpll_avl_clk => pll_avl_clk.IN1pll_config_clk => pll_config_clk.IN1dll_clk <= pll_write_clk_pre_phy_clk.DB_MAX_OUTPUT_PORT_TYPEdll_pll_locked <= pll_locked.DB_MAX_OUTPUT_PORT_TYPEdll_phy_delayctrl[0] => dll_phy_delayctrl[0].IN2dll_phy_delayctrl[1] => dll_phy_delayctrl[1].IN2dll_phy_delayctrl[2] => dll_phy_delayctrl[2].IN2dll_phy_delayctrl[3] => dll_phy_delayctrl[3].IN2dll_phy_delayctrl[4] => dll_phy_delayctrl[4].IN2dll_phy_delayctrl[5] => dll_phy_delayctrl[5].IN2dll_phy_delayctrl[6] => dll_phy_delayctrl[6].IN2|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_ldc:memphy_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_padsreset_n_addr_cmd_clk => reset_n_addr_cmd_clk.IN1reset_n_afi_clk => reset_n_core_clk.IN2oct_ctl_rs_value[0] => oct_ctl_rs_value[0].IN1oct_ctl_rs_value[1] => oct_ctl_rs_value[1].IN1oct_ctl_rs_value[2] => oct_ctl_rs_value[2].IN1oct_ctl_rs_value[3] => oct_ctl_rs_value[3].IN1oct_ctl_rs_value[4] => oct_ctl_rs_value[4].IN1oct_ctl_rs_value[5] => oct_ctl_rs_value[5].IN1oct_ctl_rs_value[6] => oct_ctl_rs_value[6].IN1oct_ctl_rs_value[7] => oct_ctl_rs_value[7].IN1oct_ctl_rs_value[8] => oct_ctl_rs_value[8].IN1oct_ctl_rs_value[9] => oct_ctl_rs_value[9].IN1oct_ctl_rs_value[10] => oct_ctl_rs_value[10].IN1oct_ctl_rs_value[11] => oct_ctl_rs_value[11].IN1oct_ctl_rs_value[12] => oct_ctl_rs_value[12].IN1oct_ctl_rs_value[13] => oct_ctl_rs_value[13].IN1oct_ctl_rs_value[14] => oct_ctl_rs_value[14].IN1oct_ctl_rs_value[15] => oct_ctl_rs_value[15].IN1oct_ctl_rt_value[0] => oct_ctl_rt_value[0].IN1oct_ctl_rt_value[1] => oct_ctl_rt_value[1].IN1oct_ctl_rt_value[2] => oct_ctl_rt_value[2].IN1oct_ctl_rt_value[3] => oct_ctl_rt_value[3].IN1oct_ctl_rt_value[4] => oct_ctl_rt_value[4].IN1oct_ctl_rt_value[5] => oct_ctl_rt_value[5].IN1oct_ctl_rt_value[6] => oct_ctl_rt_value[6].IN1oct_ctl_rt_value[7] => oct_ctl_rt_value[7].IN1oct_ctl_rt_value[8] => oct_ctl_rt_value[8].IN1oct_ctl_rt_value[9] => oct_ctl_rt_value[9].IN1oct_ctl_rt_value[10] => oct_ctl_rt_value[10].IN1oct_ctl_rt_value[11] => oct_ctl_rt_value[11].IN1oct_ctl_rt_value[12] => oct_ctl_rt_value[12].IN1oct_ctl_rt_value[13] => oct_ctl_rt_value[13].IN1oct_ctl_rt_value[14] => oct_ctl_rt_value[14].IN1oct_ctl_rt_value[15] => oct_ctl_rt_value[15].IN1phy_ddio_address[0] => phy_ddio_address[0].IN1phy_ddio_address[1] => phy_ddio_address[1].IN1phy_ddio_address[2] => phy_ddio_address[2].IN1phy_ddio_address[3] => phy_ddio_address[3].IN1phy_ddio_address[4] => phy_ddio_address[4].IN1phy_ddio_address[5] => phy_ddio_address[5].IN1phy_ddio_address[6] => phy_ddio_address[6].IN1phy_ddio_address[7] => phy_ddio_address[7].IN1phy_ddio_address[8] => phy_ddio_address[8].IN1phy_ddio_address[9] => phy_ddio_address[9].IN1phy_ddio_address[10] => phy_ddio_address[10].IN1phy_ddio_address[11] => phy_ddio_address[11].IN1phy_ddio_address[12] => phy_ddio_address[12].IN1phy_ddio_address[13] => phy_ddio_address[13].IN1phy_ddio_address[14] => phy_ddio_address[14].IN1phy_ddio_address[15] => phy_ddio_address[15].IN1phy_ddio_address[16] => phy_ddio_address[16].IN1phy_ddio_address[17] => phy_ddio_address[17].IN1phy_ddio_address[18] => phy_ddio_address[18].IN1phy_ddio_address[19] => phy_ddio_address[19].IN1phy_ddio_address[20] => phy_ddio_address[20].IN1phy_ddio_address[21] => phy_ddio_address[21].IN1phy_ddio_address[22] => phy_ddio_address[22].IN1phy_ddio_address[23] => phy_ddio_address[23].IN1phy_ddio_address[24] => phy_ddio_address[24].IN1phy_ddio_address[25] => phy_ddio_address[25].IN1phy_ddio_address[26] => phy_ddio_address[26].IN1phy_ddio_address[27] => phy_ddio_address[27].IN1phy_ddio_address[28] => phy_ddio_address[28].IN1phy_ddio_address[29] => phy_ddio_address[29].IN1phy_ddio_address[30] => phy_ddio_address[30].IN1phy_ddio_address[31] => phy_ddio_address[31].IN1phy_ddio_address[32] => phy_ddio_address[32].IN1phy_ddio_address[33] => phy_ddio_address[33].IN1phy_ddio_address[34] => phy_ddio_address[34].IN1phy_ddio_address[35] => phy_ddio_address[35].IN1phy_ddio_address[36] => phy_ddio_address[36].IN1phy_ddio_address[37] => phy_ddio_address[37].IN1phy_ddio_address[38] => phy_ddio_address[38].IN1phy_ddio_address[39] => phy_ddio_address[39].IN1phy_ddio_address[40] => phy_ddio_address[40].IN1phy_ddio_address[41] => phy_ddio_address[41].IN1phy_ddio_address[42] => phy_ddio_address[42].IN1phy_ddio_address[43] => phy_ddio_address[43].IN1phy_ddio_address[44] => phy_ddio_address[44].IN1phy_ddio_address[45] => phy_ddio_address[45].IN1phy_ddio_address[46] => phy_ddio_address[46].IN1phy_ddio_address[47] => phy_ddio_address[47].IN1phy_ddio_address[48] => phy_ddio_address[48].IN1phy_ddio_address[49] => phy_ddio_address[49].IN1phy_ddio_address[50] => phy_ddio_address[50].IN1phy_ddio_address[51] => phy_ddio_address[51].IN1phy_ddio_address[52] => phy_ddio_address[52].IN1phy_ddio_address[53] => phy_ddio_address[53].IN1phy_ddio_address[54] => phy_ddio_address[54].IN1phy_ddio_address[55] => phy_ddio_address[55].IN1phy_ddio_address[56] => phy_ddio_address[56].IN1phy_ddio_address[57] => phy_ddio_address[57].IN1phy_ddio_address[58] => phy_ddio_address[58].IN1phy_ddio_address[59] => phy_ddio_address[59].IN1phy_ddio_address[60] => phy_ddio_address[60].IN1phy_ddio_address[61] => phy_ddio_address[61].IN1phy_ddio_address[62] => phy_ddio_address[62].IN1phy_ddio_address[63] => phy_ddio_address[63].IN1phy_ddio_bank[0] => phy_ddio_bank[0].IN1phy_ddio_bank[1] => phy_ddio_bank[1].IN1phy_ddio_bank[2] => phy_ddio_bank[2].IN1phy_ddio_bank[3] => phy_ddio_bank[3].IN1phy_ddio_bank[4] => phy_ddio_bank[4].IN1phy_ddio_bank[5] => phy_ddio_bank[5].IN1phy_ddio_bank[6] => phy_ddio_bank[6].IN1phy_ddio_bank[7] => phy_ddio_bank[7].IN1phy_ddio_bank[8] => phy_ddio_bank[8].IN1phy_ddio_bank[9] => phy_ddio_bank[9].IN1phy_ddio_bank[10] => phy_ddio_bank[10].IN1phy_ddio_bank[11] => phy_ddio_bank[11].IN1phy_ddio_cs_n[0] => phy_ddio_cs_n[0].IN1phy_ddio_cs_n[1] => phy_ddio_cs_n[1].IN1phy_ddio_cs_n[2] => phy_ddio_cs_n[2].IN1phy_ddio_cs_n[3] => phy_ddio_cs_n[3].IN1phy_ddio_cs_n[4] => phy_ddio_cs_n[4].IN1phy_ddio_cs_n[5] => phy_ddio_cs_n[5].IN1phy_ddio_cs_n[6] => phy_ddio_cs_n[6].IN1phy_ddio_cs_n[7] => phy_ddio_cs_n[7].IN1phy_ddio_cke[0] => phy_ddio_cke[0].IN1phy_ddio_cke[1] => phy_ddio_cke[1].IN1phy_ddio_cke[2] => phy_ddio_cke[2].IN1phy_ddio_cke[3] => phy_ddio_cke[3].IN1phy_ddio_cke[4] => phy_ddio_cke[4].IN1phy_ddio_cke[5] => phy_ddio_cke[5].IN1phy_ddio_cke[6] => phy_ddio_cke[6].IN1phy_ddio_cke[7] => phy_ddio_cke[7].IN1phy_ddio_odt[0] => phy_ddio_odt[0].IN1phy_ddio_odt[1] => phy_ddio_odt[1].IN1phy_ddio_odt[2] => phy_ddio_odt[2].IN1phy_ddio_odt[3] => phy_ddio_odt[3].IN1phy_ddio_odt[4] => phy_ddio_odt[4].IN1phy_ddio_odt[5] => phy_ddio_odt[5].IN1phy_ddio_odt[6] => phy_ddio_odt[6].IN1phy_ddio_odt[7] => phy_ddio_odt[7].IN1phy_ddio_we_n[0] => phy_ddio_we_n[0].IN1phy_ddio_we_n[1] => phy_ddio_we_n[1].IN1phy_ddio_we_n[2] => phy_ddio_we_n[2].IN1phy_ddio_we_n[3] => phy_ddio_we_n[3].IN1phy_ddio_ras_n[0] => phy_ddio_ras_n[0].IN1phy_ddio_ras_n[1] => phy_ddio_ras_n[1].IN1phy_ddio_ras_n[2] => phy_ddio_ras_n[2].IN1phy_ddio_ras_n[3] => phy_ddio_ras_n[3].IN1phy_ddio_cas_n[0] => phy_ddio_cas_n[0].IN1phy_ddio_cas_n[1] => phy_ddio_cas_n[1].IN1phy_ddio_cas_n[2] => phy_ddio_cas_n[2].IN1phy_ddio_cas_n[3] => phy_ddio_cas_n[3].IN1phy_ddio_ck[0] => phy_ddio_ck[0].IN1phy_ddio_ck[1] => phy_ddio_ck[1].IN1phy_ddio_ck[2] => phy_ddio_ck[2].IN1phy_ddio_ck[3] => phy_ddio_ck[3].IN1phy_ddio_reset_n[0] => phy_ddio_reset_n[0].IN1phy_ddio_reset_n[1] => phy_ddio_reset_n[1].IN1phy_ddio_reset_n[2] => phy_ddio_reset_n[2].IN1phy_ddio_reset_n[3] => phy_ddio_reset_n[3].IN1phy_mem_address[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[1] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[2] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[3] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[4] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[5] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[6] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[7] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[8] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[9] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[10] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[11] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_address[12] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_addressphy_mem_bank[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_bankphy_mem_bank[1] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_bankphy_mem_bank[2] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_bankphy_mem_cs_n[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_cs_nphy_mem_cke[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_ckephy_mem_odt[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_odtphy_mem_we_n[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_we_nphy_mem_ras_n[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_ras_nphy_mem_cas_n[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_cas_nphy_mem_reset_n <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_reset_npll_afi_clk => core_clk.IN1pll_afi_phy_clk => pll_afi_phy_clk.IN1pll_avl_phy_clk => pll_avl_phy_clk.IN2pll_avl_clk => hr_clk.IN2avl_clk => ~NO_FANOUT~pll_mem_clk => ~NO_FANOUT~pll_mem_phy_clk => pll_mem_phy_clk.IN2pll_write_clk => pll_write_clk.IN2pll_dqs_ena_clk => ~NO_FANOUT~pll_addr_cmd_clk => ~NO_FANOUT~phy_mem_dq[0] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[1] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[2] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[3] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[4] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[5] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[6] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dq[7] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_write_data_iophy_mem_dm[0] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.extra_write_data_outphy_mem_ck[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_ckphy_mem_ck_n[0] <= hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads.phy_mem_ck_nmem_dqs[0] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.strobe_iomem_dqs_n[0] <> hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.strobe_n_iodll_phy_delayctrl[0] => dll_phy_delayctrl[0].IN2dll_phy_delayctrl[1] => dll_phy_delayctrl[1].IN2dll_phy_delayctrl[2] => dll_phy_delayctrl[2].IN2dll_phy_delayctrl[3] => dll_phy_delayctrl[3].IN2dll_phy_delayctrl[4] => dll_phy_delayctrl[4].IN2dll_phy_delayctrl[5] => dll_phy_delayctrl[5].IN2dll_phy_delayctrl[6] => dll_phy_delayctrl[6].IN2scc_clk => scc_clk.IN1scc_data => scc_data.IN1scc_dqs_ena[0] => scc_dqs_ena[0].IN1scc_dqs_io_ena[0] => scc_dqs_io_ena[0].IN1scc_dq_ena[0] => scc_dq_ena[0].IN1scc_dq_ena[1] => scc_dq_ena[1].IN1scc_dq_ena[2] => scc_dq_ena[2].IN1scc_dq_ena[3] => scc_dq_ena[3].IN1scc_dq_ena[4] => scc_dq_ena[4].IN1scc_dq_ena[5] => scc_dq_ena[5].IN1scc_dq_ena[6] => scc_dq_ena[6].IN1scc_dq_ena[7] => scc_dq_ena[7].IN1scc_dm_ena[0] => scc_dm_ena[0].IN1scc_upd => scc_upd.IN1seq_read_latency_counter[0] => ~NO_FANOUT~seq_read_latency_counter[1] => ~NO_FANOUT~seq_read_latency_counter[2] => ~NO_FANOUT~seq_read_latency_counter[3] => ~NO_FANOUT~seq_read_latency_counter[4] => ~NO_FANOUT~seq_read_increment_vfifo_fr[0] => ~NO_FANOUT~seq_read_increment_vfifo_hr[0] => ~NO_FANOUT~phy_ddio_dmdout[0] => phy_ddio_dmdout[0].IN1phy_ddio_dmdout[1] => phy_ddio_dmdout[1].IN1phy_ddio_dmdout[2] => phy_ddio_dmdout[2].IN1phy_ddio_dmdout[3] => phy_ddio_dmdout[3].IN1phy_ddio_dmdout[4] => ~NO_FANOUT~phy_ddio_dmdout[5] => ~NO_FANOUT~phy_ddio_dmdout[6] => ~NO_FANOUT~phy_ddio_dmdout[7] => ~NO_FANOUT~phy_ddio_dmdout[8] => ~NO_FANOUT~phy_ddio_dmdout[9] => ~NO_FANOUT~phy_ddio_dmdout[10] => ~NO_FANOUT~phy_ddio_dmdout[11] => ~NO_FANOUT~phy_ddio_dmdout[12] => ~NO_FANOUT~phy_ddio_dmdout[13] => ~NO_FANOUT~phy_ddio_dmdout[14] => ~NO_FANOUT~phy_ddio_dmdout[15] => ~NO_FANOUT~phy_ddio_dmdout[16] => ~NO_FANOUT~phy_ddio_dmdout[17] => ~NO_FANOUT~phy_ddio_dmdout[18] => ~NO_FANOUT~phy_ddio_dmdout[19] => ~NO_FANOUT~phy_ddio_dmdout[20] => ~NO_FANOUT~phy_ddio_dmdout[21] => ~NO_FANOUT~phy_ddio_dmdout[22] => ~NO_FANOUT~phy_ddio_dmdout[23] => ~NO_FANOUT~phy_ddio_dmdout[24] => ~NO_FANOUT~phy_ddio_dqdout[0] => phy_ddio_dqdout[0].IN1phy_ddio_dqdout[1] => phy_ddio_dqdout[1].IN1phy_ddio_dqdout[2] => phy_ddio_dqdout[2].IN1phy_ddio_dqdout[3] => phy_ddio_dqdout[3].IN1phy_ddio_dqdout[4] => phy_ddio_dqdout[4].IN1phy_ddio_dqdout[5] => phy_ddio_dqdout[5].IN1phy_ddio_dqdout[6] => phy_ddio_dqdout[6].IN1phy_ddio_dqdout[7] => phy_ddio_dqdout[7].IN1phy_ddio_dqdout[8] => phy_ddio_dqdout[8].IN1phy_ddio_dqdout[9] => phy_ddio_dqdout[9].IN1phy_ddio_dqdout[10] => phy_ddio_dqdout[10].IN1phy_ddio_dqdout[11] => phy_ddio_dqdout[11].IN1phy_ddio_dqdout[12] => phy_ddio_dqdout[12].IN1phy_ddio_dqdout[13] => phy_ddio_dqdout[13].IN1phy_ddio_dqdout[14] => phy_ddio_dqdout[14].IN1phy_ddio_dqdout[15] => phy_ddio_dqdout[15].IN1phy_ddio_dqdout[16] => phy_ddio_dqdout[16].IN1phy_ddio_dqdout[17] => phy_ddio_dqdout[17].IN1phy_ddio_dqdout[18] => phy_ddio_dqdout[18].IN1phy_ddio_dqdout[19] => phy_ddio_dqdout[19].IN1phy_ddio_dqdout[20] => phy_ddio_dqdout[20].IN1phy_ddio_dqdout[21] => phy_ddio_dqdout[21].IN1phy_ddio_dqdout[22] => phy_ddio_dqdout[22].IN1phy_ddio_dqdout[23] => phy_ddio_dqdout[23].IN1phy_ddio_dqdout[24] => phy_ddio_dqdout[24].IN1phy_ddio_dqdout[25] => phy_ddio_dqdout[25].IN1phy_ddio_dqdout[26] => phy_ddio_dqdout[26].IN1phy_ddio_dqdout[27] => phy_ddio_dqdout[27].IN1phy_ddio_dqdout[28] => phy_ddio_dqdout[28].IN1phy_ddio_dqdout[29] => phy_ddio_dqdout[29].IN1phy_ddio_dqdout[30] => phy_ddio_dqdout[30].IN1phy_ddio_dqdout[31] => phy_ddio_dqdout[31].IN1phy_ddio_dqdout[32] => ~NO_FANOUT~phy_ddio_dqdout[33] => ~NO_FANOUT~phy_ddio_dqdout[34] => ~NO_FANOUT~phy_ddio_dqdout[35] => ~NO_FANOUT~phy_ddio_dqdout[36] => ~NO_FANOUT~phy_ddio_dqdout[37] => ~NO_FANOUT~phy_ddio_dqdout[38] => ~NO_FANOUT~phy_ddio_dqdout[39] => ~NO_FANOUT~phy_ddio_dqdout[40] => ~NO_FANOUT~phy_ddio_dqdout[41] => ~NO_FANOUT~phy_ddio_dqdout[42] => ~NO_FANOUT~phy_ddio_dqdout[43] => ~NO_FANOUT~phy_ddio_dqdout[44] => ~NO_FANOUT~phy_ddio_dqdout[45] => ~NO_FANOUT~phy_ddio_dqdout[46] => ~NO_FANOUT~phy_ddio_dqdout[47] => ~NO_FANOUT~phy_ddio_dqdout[48] => ~NO_FANOUT~phy_ddio_dqdout[49] => ~NO_FANOUT~phy_ddio_dqdout[50] => ~NO_FANOUT~phy_ddio_dqdout[51] => ~NO_FANOUT~phy_ddio_dqdout[52] => ~NO_FANOUT~phy_ddio_dqdout[53] => ~NO_FANOUT~phy_ddio_dqdout[54] => ~NO_FANOUT~phy_ddio_dqdout[55] => ~NO_FANOUT~phy_ddio_dqdout[56] => ~NO_FANOUT~phy_ddio_dqdout[57] => ~NO_FANOUT~phy_ddio_dqdout[58] => ~NO_FANOUT~phy_ddio_dqdout[59] => ~NO_FANOUT~phy_ddio_dqdout[60] => ~NO_FANOUT~phy_ddio_dqdout[61] => ~NO_FANOUT~phy_ddio_dqdout[62] => ~NO_FANOUT~phy_ddio_dqdout[63] => ~NO_FANOUT~phy_ddio_dqdout[64] => ~NO_FANOUT~phy_ddio_dqdout[65] => ~NO_FANOUT~phy_ddio_dqdout[66] => ~NO_FANOUT~phy_ddio_dqdout[67] => ~NO_FANOUT~phy_ddio_dqdout[68] => ~NO_FANOUT~phy_ddio_dqdout[69] => ~NO_FANOUT~phy_ddio_dqdout[70] => ~NO_FANOUT~phy_ddio_dqdout[71] => ~NO_FANOUT~phy_ddio_dqdout[72] => ~NO_FANOUT~phy_ddio_dqdout[73] => ~NO_FANOUT~phy_ddio_dqdout[74] => ~NO_FANOUT~phy_ddio_dqdout[75] => ~NO_FANOUT~phy_ddio_dqdout[76] => ~NO_FANOUT~phy_ddio_dqdout[77] => ~NO_FANOUT~phy_ddio_dqdout[78] => ~NO_FANOUT~phy_ddio_dqdout[79] => ~NO_FANOUT~phy_ddio_dqdout[80] => ~NO_FANOUT~phy_ddio_dqdout[81] => ~NO_FANOUT~phy_ddio_dqdout[82] => ~NO_FANOUT~phy_ddio_dqdout[83] => ~NO_FANOUT~phy_ddio_dqdout[84] => ~NO_FANOUT~phy_ddio_dqdout[85] => ~NO_FANOUT~phy_ddio_dqdout[86] => ~NO_FANOUT~phy_ddio_dqdout[87] => ~NO_FANOUT~phy_ddio_dqdout[88] => ~NO_FANOUT~phy_ddio_dqdout[89] => ~NO_FANOUT~phy_ddio_dqdout[90] => ~NO_FANOUT~phy_ddio_dqdout[91] => ~NO_FANOUT~phy_ddio_dqdout[92] => ~NO_FANOUT~phy_ddio_dqdout[93] => ~NO_FANOUT~phy_ddio_dqdout[94] => ~NO_FANOUT~phy_ddio_dqdout[95] => ~NO_FANOUT~phy_ddio_dqdout[96] => ~NO_FANOUT~phy_ddio_dqdout[97] => ~NO_FANOUT~phy_ddio_dqdout[98] => ~NO_FANOUT~phy_ddio_dqdout[99] => ~NO_FANOUT~phy_ddio_dqdout[100] => ~NO_FANOUT~phy_ddio_dqdout[101] => ~NO_FANOUT~phy_ddio_dqdout[102] => ~NO_FANOUT~phy_ddio_dqdout[103] => ~NO_FANOUT~phy_ddio_dqdout[104] => ~NO_FANOUT~phy_ddio_dqdout[105] => ~NO_FANOUT~phy_ddio_dqdout[106] => ~NO_FANOUT~phy_ddio_dqdout[107] => ~NO_FANOUT~phy_ddio_dqdout[108] => ~NO_FANOUT~phy_ddio_dqdout[109] => ~NO_FANOUT~phy_ddio_dqdout[110] => ~NO_FANOUT~phy_ddio_dqdout[111] => ~NO_FANOUT~phy_ddio_dqdout[112] => ~NO_FANOUT~phy_ddio_dqdout[113] => ~NO_FANOUT~phy_ddio_dqdout[114] => ~NO_FANOUT~phy_ddio_dqdout[115] => ~NO_FANOUT~phy_ddio_dqdout[116] => ~NO_FANOUT~phy_ddio_dqdout[117] => ~NO_FANOUT~phy_ddio_dqdout[118] => ~NO_FANOUT~phy_ddio_dqdout[119] => ~NO_FANOUT~phy_ddio_dqdout[120] => ~NO_FANOUT~phy_ddio_dqdout[121] => ~NO_FANOUT~phy_ddio_dqdout[122] => ~NO_FANOUT~phy_ddio_dqdout[123] => ~NO_FANOUT~phy_ddio_dqdout[124] => ~NO_FANOUT~phy_ddio_dqdout[125] => ~NO_FANOUT~phy_ddio_dqdout[126] => ~NO_FANOUT~phy_ddio_dqdout[127] => ~NO_FANOUT~phy_ddio_dqdout[128] => ~NO_FANOUT~phy_ddio_dqdout[129] => ~NO_FANOUT~phy_ddio_dqdout[130] => ~NO_FANOUT~phy_ddio_dqdout[131] => ~NO_FANOUT~phy_ddio_dqdout[132] => ~NO_FANOUT~phy_ddio_dqdout[133] => ~NO_FANOUT~phy_ddio_dqdout[134] => ~NO_FANOUT~phy_ddio_dqdout[135] => ~NO_FANOUT~phy_ddio_dqdout[136] => ~NO_FANOUT~phy_ddio_dqdout[137] => ~NO_FANOUT~phy_ddio_dqdout[138] => ~NO_FANOUT~phy_ddio_dqdout[139] => ~NO_FANOUT~phy_ddio_dqdout[140] => ~NO_FANOUT~phy_ddio_dqdout[141] => ~NO_FANOUT~phy_ddio_dqdout[142] => ~NO_FANOUT~phy_ddio_dqdout[143] => ~NO_FANOUT~phy_ddio_dqdout[144] => ~NO_FANOUT~phy_ddio_dqdout[145] => ~NO_FANOUT~phy_ddio_dqdout[146] => ~NO_FANOUT~phy_ddio_dqdout[147] => ~NO_FANOUT~phy_ddio_dqdout[148] => ~NO_FANOUT~phy_ddio_dqdout[149] => ~NO_FANOUT~phy_ddio_dqdout[150] => ~NO_FANOUT~phy_ddio_dqdout[151] => ~NO_FANOUT~phy_ddio_dqdout[152] => ~NO_FANOUT~phy_ddio_dqdout[153] => ~NO_FANOUT~phy_ddio_dqdout[154] => ~NO_FANOUT~phy_ddio_dqdout[155] => ~NO_FANOUT~phy_ddio_dqdout[156] => ~NO_FANOUT~phy_ddio_dqdout[157] => ~NO_FANOUT~phy_ddio_dqdout[158] => ~NO_FANOUT~phy_ddio_dqdout[159] => ~NO_FANOUT~phy_ddio_dqdout[160] => ~NO_FANOUT~phy_ddio_dqdout[161] => ~NO_FANOUT~phy_ddio_dqdout[162] => ~NO_FANOUT~phy_ddio_dqdout[163] => ~NO_FANOUT~phy_ddio_dqdout[164] => ~NO_FANOUT~phy_ddio_dqdout[165] => ~NO_FANOUT~phy_ddio_dqdout[166] => ~NO_FANOUT~phy_ddio_dqdout[167] => ~NO_FANOUT~phy_ddio_dqdout[168] => ~NO_FANOUT~phy_ddio_dqdout[169] => ~NO_FANOUT~phy_ddio_dqdout[170] => ~NO_FANOUT~phy_ddio_dqdout[171] => ~NO_FANOUT~phy_ddio_dqdout[172] => ~NO_FANOUT~phy_ddio_dqdout[173] => ~NO_FANOUT~phy_ddio_dqdout[174] => ~NO_FANOUT~phy_ddio_dqdout[175] => ~NO_FANOUT~phy_ddio_dqdout[176] => ~NO_FANOUT~phy_ddio_dqdout[177] => ~NO_FANOUT~phy_ddio_dqdout[178] => ~NO_FANOUT~phy_ddio_dqdout[179] => ~NO_FANOUT~phy_ddio_dqs_oe[0] => phy_ddio_dqs_oe[0].IN1phy_ddio_dqs_oe[1] => phy_ddio_dqs_oe[1].IN1phy_ddio_dqs_oe[2] => ~NO_FANOUT~phy_ddio_dqs_oe[3] => ~NO_FANOUT~phy_ddio_dqs_oe[4] => ~NO_FANOUT~phy_ddio_dqs_oe[5] => ~NO_FANOUT~phy_ddio_dqs_oe[6] => ~NO_FANOUT~phy_ddio_dqs_oe[7] => ~NO_FANOUT~phy_ddio_dqs_oe[8] => ~NO_FANOUT~phy_ddio_dqs_oe[9] => ~NO_FANOUT~phy_ddio_dqsdout[0] => phy_ddio_dqsdout[0].IN1phy_ddio_dqsdout[1] => phy_ddio_dqsdout[1].IN1phy_ddio_dqsdout[2] => phy_ddio_dqsdout[2].IN1phy_ddio_dqsdout[3] => phy_ddio_dqsdout[3].IN1phy_ddio_dqsdout[4] => ~NO_FANOUT~phy_ddio_dqsdout[5] => ~NO_FANOUT~phy_ddio_dqsdout[6] => ~NO_FANOUT~phy_ddio_dqsdout[7] => ~NO_FANOUT~phy_ddio_dqsdout[8] => ~NO_FANOUT~phy_ddio_dqsdout[9] => ~NO_FANOUT~phy_ddio_dqsdout[10] => ~NO_FANOUT~phy_ddio_dqsdout[11] => ~NO_FANOUT~phy_ddio_dqsdout[12] => ~NO_FANOUT~phy_ddio_dqsdout[13] => ~NO_FANOUT~phy_ddio_dqsdout[14] => ~NO_FANOUT~phy_ddio_dqsdout[15] => ~NO_FANOUT~phy_ddio_dqsdout[16] => ~NO_FANOUT~phy_ddio_dqsdout[17] => ~NO_FANOUT~phy_ddio_dqsdout[18] => ~NO_FANOUT~phy_ddio_dqsdout[19] => ~NO_FANOUT~phy_ddio_dqsb_oe[0] => ~NO_FANOUT~phy_ddio_dqsb_oe[1] => ~NO_FANOUT~phy_ddio_dqsb_oe[2] => ~NO_FANOUT~phy_ddio_dqsb_oe[3] => ~NO_FANOUT~phy_ddio_dqsb_oe[4] => ~NO_FANOUT~phy_ddio_dqsb_oe[5] => ~NO_FANOUT~phy_ddio_dqsb_oe[6] => ~NO_FANOUT~phy_ddio_dqsb_oe[7] => ~NO_FANOUT~phy_ddio_dqsb_oe[8] => ~NO_FANOUT~phy_ddio_dqsb_oe[9] => ~NO_FANOUT~phy_ddio_dqslogic_oct[0] => phy_ddio_dqslogic_oct[0].IN1phy_ddio_dqslogic_oct[1] => phy_ddio_dqslogic_oct[1].IN1phy_ddio_dqslogic_oct[2] => ~NO_FANOUT~phy_ddio_dqslogic_oct[3] => ~NO_FANOUT~phy_ddio_dqslogic_oct[4] => ~NO_FANOUT~phy_ddio_dqslogic_oct[5] => ~NO_FANOUT~phy_ddio_dqslogic_oct[6] => ~NO_FANOUT~phy_ddio_dqslogic_oct[7] => ~NO_FANOUT~phy_ddio_dqslogic_oct[8] => ~NO_FANOUT~phy_ddio_dqslogic_oct[9] => ~NO_FANOUT~phy_ddio_dqslogic_fiforeset[0] => phy_ddio_dqslogic_fiforeset[0].IN1phy_ddio_dqslogic_fiforeset[1] => ~NO_FANOUT~phy_ddio_dqslogic_fiforeset[2] => ~NO_FANOUT~phy_ddio_dqslogic_fiforeset[3] => ~NO_FANOUT~phy_ddio_dqslogic_fiforeset[4] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_pstamble[0] => phy_ddio_dqslogic_aclr_pstamble[0].IN1phy_ddio_dqslogic_aclr_pstamble[1] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_pstamble[2] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_pstamble[3] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_pstamble[4] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_fifoctrl[0] => phy_ddio_dqslogic_aclr_fifoctrl[0].IN1phy_ddio_dqslogic_aclr_fifoctrl[1] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_fifoctrl[2] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_fifoctrl[3] => ~NO_FANOUT~phy_ddio_dqslogic_aclr_fifoctrl[4] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[0] => phy_ddio_dqslogic_incwrptr[0].IN1phy_ddio_dqslogic_incwrptr[1] => phy_ddio_dqslogic_incwrptr[1].IN1phy_ddio_dqslogic_incwrptr[2] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[3] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[4] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[5] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[6] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[7] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[8] => ~NO_FANOUT~phy_ddio_dqslogic_incwrptr[9] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[0] => phy_ddio_dqslogic_readlatency[0].IN1phy_ddio_dqslogic_readlatency[1] => phy_ddio_dqslogic_readlatency[1].IN1phy_ddio_dqslogic_readlatency[2] => phy_ddio_dqslogic_readlatency[2].IN1phy_ddio_dqslogic_readlatency[3] => phy_ddio_dqslogic_readlatency[3].IN1phy_ddio_dqslogic_readlatency[4] => phy_ddio_dqslogic_readlatency[4].IN1phy_ddio_dqslogic_readlatency[5] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[6] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[7] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[8] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[9] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[10] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[11] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[12] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[13] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[14] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[15] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[16] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[17] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[18] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[19] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[20] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[21] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[22] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[23] => ~NO_FANOUT~phy_ddio_dqslogic_readlatency[24] => ~NO_FANOUT~ddio_phy_dqslogic_rdatavalid[0] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.lfifo_rdata_validddio_phy_dqslogic_rdatavalid[1] <= <VCC>ddio_phy_dqslogic_rdatavalid[2] <= <VCC>ddio_phy_dqslogic_rdatavalid[3] <= <VCC>ddio_phy_dqslogic_rdatavalid[4] <= <VCC>ddio_phy_dqdin[0] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[1] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[2] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[3] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[4] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[5] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[6] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[7] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[8] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[9] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[10] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[11] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[12] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[13] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[14] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[15] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[16] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[17] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[18] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[19] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[20] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[21] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[22] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[23] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[24] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[25] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[26] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[27] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[28] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[29] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[30] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[31] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.read_data_outddio_phy_dqdin[32] <= <GND>ddio_phy_dqdin[33] <= <GND>ddio_phy_dqdin[34] <= <GND>ddio_phy_dqdin[35] <= <GND>ddio_phy_dqdin[36] <= <GND>ddio_phy_dqdin[37] <= <GND>ddio_phy_dqdin[38] <= <GND>ddio_phy_dqdin[39] <= <GND>ddio_phy_dqdin[40] <= <GND>ddio_phy_dqdin[41] <= <GND>ddio_phy_dqdin[42] <= <GND>ddio_phy_dqdin[43] <= <GND>ddio_phy_dqdin[44] <= <GND>ddio_phy_dqdin[45] <= <GND>ddio_phy_dqdin[46] <= <GND>ddio_phy_dqdin[47] <= <GND>ddio_phy_dqdin[48] <= <GND>ddio_phy_dqdin[49] <= <GND>ddio_phy_dqdin[50] <= <GND>ddio_phy_dqdin[51] <= <GND>ddio_phy_dqdin[52] <= <GND>ddio_phy_dqdin[53] <= <GND>ddio_phy_dqdin[54] <= <GND>ddio_phy_dqdin[55] <= <GND>ddio_phy_dqdin[56] <= <GND>ddio_phy_dqdin[57] <= <GND>ddio_phy_dqdin[58] <= <GND>ddio_phy_dqdin[59] <= <GND>ddio_phy_dqdin[60] <= <GND>ddio_phy_dqdin[61] <= <GND>ddio_phy_dqdin[62] <= <GND>ddio_phy_dqdin[63] <= <GND>ddio_phy_dqdin[64] <= <GND>ddio_phy_dqdin[65] <= <GND>ddio_phy_dqdin[66] <= <GND>ddio_phy_dqdin[67] <= <GND>ddio_phy_dqdin[68] <= <GND>ddio_phy_dqdin[69] <= <GND>ddio_phy_dqdin[70] <= <GND>ddio_phy_dqdin[71] <= <GND>ddio_phy_dqdin[72] <= <GND>ddio_phy_dqdin[73] <= <GND>ddio_phy_dqdin[74] <= <GND>ddio_phy_dqdin[75] <= <GND>ddio_phy_dqdin[76] <= <GND>ddio_phy_dqdin[77] <= <GND>ddio_phy_dqdin[78] <= <GND>ddio_phy_dqdin[79] <= <GND>ddio_phy_dqdin[80] <= <GND>ddio_phy_dqdin[81] <= <GND>ddio_phy_dqdin[82] <= <GND>ddio_phy_dqdin[83] <= <GND>ddio_phy_dqdin[84] <= <GND>ddio_phy_dqdin[85] <= <GND>ddio_phy_dqdin[86] <= <GND>ddio_phy_dqdin[87] <= <GND>ddio_phy_dqdin[88] <= <GND>ddio_phy_dqdin[89] <= <GND>ddio_phy_dqdin[90] <= <GND>ddio_phy_dqdin[91] <= <GND>ddio_phy_dqdin[92] <= <GND>ddio_phy_dqdin[93] <= <GND>ddio_phy_dqdin[94] <= <GND>ddio_phy_dqdin[95] <= <GND>ddio_phy_dqdin[96] <= <GND>ddio_phy_dqdin[97] <= <GND>ddio_phy_dqdin[98] <= <GND>ddio_phy_dqdin[99] <= <GND>ddio_phy_dqdin[100] <= <GND>ddio_phy_dqdin[101] <= <GND>ddio_phy_dqdin[102] <= <GND>ddio_phy_dqdin[103] <= <GND>ddio_phy_dqdin[104] <= <GND>ddio_phy_dqdin[105] <= <GND>ddio_phy_dqdin[106] <= <GND>ddio_phy_dqdin[107] <= <GND>ddio_phy_dqdin[108] <= <GND>ddio_phy_dqdin[109] <= <GND>ddio_phy_dqdin[110] <= <GND>ddio_phy_dqdin[111] <= <GND>ddio_phy_dqdin[112] <= <GND>ddio_phy_dqdin[113] <= <GND>ddio_phy_dqdin[114] <= <GND>ddio_phy_dqdin[115] <= <GND>ddio_phy_dqdin[116] <= <GND>ddio_phy_dqdin[117] <= <GND>ddio_phy_dqdin[118] <= <GND>ddio_phy_dqdin[119] <= <GND>ddio_phy_dqdin[120] <= <GND>ddio_phy_dqdin[121] <= <GND>ddio_phy_dqdin[122] <= <GND>ddio_phy_dqdin[123] <= <GND>ddio_phy_dqdin[124] <= <GND>ddio_phy_dqdin[125] <= <GND>ddio_phy_dqdin[126] <= <GND>ddio_phy_dqdin[127] <= <GND>ddio_phy_dqdin[128] <= <GND>ddio_phy_dqdin[129] <= <GND>ddio_phy_dqdin[130] <= <GND>ddio_phy_dqdin[131] <= <GND>ddio_phy_dqdin[132] <= <GND>ddio_phy_dqdin[133] <= <GND>ddio_phy_dqdin[134] <= <GND>ddio_phy_dqdin[135] <= <GND>ddio_phy_dqdin[136] <= <GND>ddio_phy_dqdin[137] <= <GND>ddio_phy_dqdin[138] <= <GND>ddio_phy_dqdin[139] <= <GND>ddio_phy_dqdin[140] <= <GND>ddio_phy_dqdin[141] <= <GND>ddio_phy_dqdin[142] <= <GND>ddio_phy_dqdin[143] <= <GND>ddio_phy_dqdin[144] <= <GND>ddio_phy_dqdin[145] <= <GND>ddio_phy_dqdin[146] <= <GND>ddio_phy_dqdin[147] <= <GND>ddio_phy_dqdin[148] <= <GND>ddio_phy_dqdin[149] <= <GND>ddio_phy_dqdin[150] <= <GND>ddio_phy_dqdin[151] <= <GND>ddio_phy_dqdin[152] <= <GND>ddio_phy_dqdin[153] <= <GND>ddio_phy_dqdin[154] <= <GND>ddio_phy_dqdin[155] <= <GND>ddio_phy_dqdin[156] <= <GND>ddio_phy_dqdin[157] <= <GND>ddio_phy_dqdin[158] <= <GND>ddio_phy_dqdin[159] <= <GND>ddio_phy_dqdin[160] <= <GND>ddio_phy_dqdin[161] <= <GND>ddio_phy_dqdin[162] <= <GND>ddio_phy_dqdin[163] <= <GND>ddio_phy_dqdin[164] <= <GND>ddio_phy_dqdin[165] <= <GND>ddio_phy_dqdin[166] <= <GND>ddio_phy_dqdin[167] <= <GND>ddio_phy_dqdin[168] <= <GND>ddio_phy_dqdin[169] <= <GND>ddio_phy_dqdin[170] <= <GND>ddio_phy_dqdin[171] <= <GND>ddio_phy_dqdin[172] <= <GND>ddio_phy_dqdin[173] <= <GND>ddio_phy_dqdin[174] <= <GND>ddio_phy_dqdin[175] <= <GND>ddio_phy_dqdin[176] <= <GND>ddio_phy_dqdin[177] <= <GND>ddio_phy_dqdin[178] <= <GND>ddio_phy_dqdin[179] <= <GND>phy_ddio_dqslogic_incrdataen[0] => phy_ddio_dqslogic_incrdataen[0].IN1phy_ddio_dqslogic_incrdataen[1] => phy_ddio_dqslogic_incrdataen[1].IN1phy_ddio_dqslogic_incrdataen[2] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[3] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[4] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[5] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[6] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[7] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[8] => ~NO_FANOUT~phy_ddio_dqslogic_incrdataen[9] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[0] => phy_ddio_dqslogic_dqsena[0].IN2phy_ddio_dqslogic_dqsena[1] => phy_ddio_dqslogic_dqsena[1].IN2phy_ddio_dqslogic_dqsena[2] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[3] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[4] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[5] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[6] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[7] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[8] => ~NO_FANOUT~phy_ddio_dqslogic_dqsena[9] => ~NO_FANOUT~phy_ddio_dqoe[0] => phy_ddio_dqoe[0].IN1phy_ddio_dqoe[1] => phy_ddio_dqoe[1].IN1phy_ddio_dqoe[2] => phy_ddio_dqoe[2].IN1phy_ddio_dqoe[3] => phy_ddio_dqoe[3].IN1phy_ddio_dqoe[4] => phy_ddio_dqoe[4].IN1phy_ddio_dqoe[5] => phy_ddio_dqoe[5].IN1phy_ddio_dqoe[6] => phy_ddio_dqoe[6].IN1phy_ddio_dqoe[7] => phy_ddio_dqoe[7].IN1phy_ddio_dqoe[8] => phy_ddio_dqoe[8].IN1phy_ddio_dqoe[9] => phy_ddio_dqoe[9].IN1phy_ddio_dqoe[10] => phy_ddio_dqoe[10].IN1phy_ddio_dqoe[11] => phy_ddio_dqoe[11].IN1phy_ddio_dqoe[12] => phy_ddio_dqoe[12].IN1phy_ddio_dqoe[13] => phy_ddio_dqoe[13].IN1phy_ddio_dqoe[14] => phy_ddio_dqoe[14].IN1phy_ddio_dqoe[15] => phy_ddio_dqoe[15].IN1phy_ddio_dqoe[16] => ~NO_FANOUT~phy_ddio_dqoe[17] => ~NO_FANOUT~phy_ddio_dqoe[18] => ~NO_FANOUT~phy_ddio_dqoe[19] => ~NO_FANOUT~phy_ddio_dqoe[20] => ~NO_FANOUT~phy_ddio_dqoe[21] => ~NO_FANOUT~phy_ddio_dqoe[22] => ~NO_FANOUT~phy_ddio_dqoe[23] => ~NO_FANOUT~phy_ddio_dqoe[24] => ~NO_FANOUT~phy_ddio_dqoe[25] => ~NO_FANOUT~phy_ddio_dqoe[26] => ~NO_FANOUT~phy_ddio_dqoe[27] => ~NO_FANOUT~phy_ddio_dqoe[28] => ~NO_FANOUT~phy_ddio_dqoe[29] => ~NO_FANOUT~phy_ddio_dqoe[30] => ~NO_FANOUT~phy_ddio_dqoe[31] => ~NO_FANOUT~phy_ddio_dqoe[32] => ~NO_FANOUT~phy_ddio_dqoe[33] => ~NO_FANOUT~phy_ddio_dqoe[34] => ~NO_FANOUT~phy_ddio_dqoe[35] => ~NO_FANOUT~phy_ddio_dqoe[36] => ~NO_FANOUT~phy_ddio_dqoe[37] => ~NO_FANOUT~phy_ddio_dqoe[38] => ~NO_FANOUT~phy_ddio_dqoe[39] => ~NO_FANOUT~phy_ddio_dqoe[40] => ~NO_FANOUT~phy_ddio_dqoe[41] => ~NO_FANOUT~phy_ddio_dqoe[42] => ~NO_FANOUT~phy_ddio_dqoe[43] => ~NO_FANOUT~phy_ddio_dqoe[44] => ~NO_FANOUT~phy_ddio_dqoe[45] => ~NO_FANOUT~phy_ddio_dqoe[46] => ~NO_FANOUT~phy_ddio_dqoe[47] => ~NO_FANOUT~phy_ddio_dqoe[48] => ~NO_FANOUT~phy_ddio_dqoe[49] => ~NO_FANOUT~phy_ddio_dqoe[50] => ~NO_FANOUT~phy_ddio_dqoe[51] => ~NO_FANOUT~phy_ddio_dqoe[52] => ~NO_FANOUT~phy_ddio_dqoe[53] => ~NO_FANOUT~phy_ddio_dqoe[54] => ~NO_FANOUT~phy_ddio_dqoe[55] => ~NO_FANOUT~phy_ddio_dqoe[56] => ~NO_FANOUT~phy_ddio_dqoe[57] => ~NO_FANOUT~phy_ddio_dqoe[58] => ~NO_FANOUT~phy_ddio_dqoe[59] => ~NO_FANOUT~phy_ddio_dqoe[60] => ~NO_FANOUT~phy_ddio_dqoe[61] => ~NO_FANOUT~phy_ddio_dqoe[62] => ~NO_FANOUT~phy_ddio_dqoe[63] => ~NO_FANOUT~phy_ddio_dqoe[64] => ~NO_FANOUT~phy_ddio_dqoe[65] => ~NO_FANOUT~phy_ddio_dqoe[66] => ~NO_FANOUT~phy_ddio_dqoe[67] => ~NO_FANOUT~phy_ddio_dqoe[68] => ~NO_FANOUT~phy_ddio_dqoe[69] => ~NO_FANOUT~phy_ddio_dqoe[70] => ~NO_FANOUT~phy_ddio_dqoe[71] => ~NO_FANOUT~phy_ddio_dqoe[72] => ~NO_FANOUT~phy_ddio_dqoe[73] => ~NO_FANOUT~phy_ddio_dqoe[74] => ~NO_FANOUT~phy_ddio_dqoe[75] => ~NO_FANOUT~phy_ddio_dqoe[76] => ~NO_FANOUT~phy_ddio_dqoe[77] => ~NO_FANOUT~phy_ddio_dqoe[78] => ~NO_FANOUT~phy_ddio_dqoe[79] => ~NO_FANOUT~phy_ddio_dqoe[80] => ~NO_FANOUT~phy_ddio_dqoe[81] => ~NO_FANOUT~phy_ddio_dqoe[82] => ~NO_FANOUT~phy_ddio_dqoe[83] => ~NO_FANOUT~phy_ddio_dqoe[84] => ~NO_FANOUT~phy_ddio_dqoe[85] => ~NO_FANOUT~phy_ddio_dqoe[86] => ~NO_FANOUT~phy_ddio_dqoe[87] => ~NO_FANOUT~phy_ddio_dqoe[88] => ~NO_FANOUT~phy_ddio_dqoe[89] => ~NO_FANOUT~capture_strobe_tracking[0] <= hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs.capture_strobe_tracking|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_padsreset_n => ~NO_FANOUT~reset_n_afi_clk => ~NO_FANOUT~pll_hr_clk => pll_hr_clk.IN23pll_avl_phy_clk => pll_avl_phy_clk.IN23pll_afi_clk => ~NO_FANOUT~pll_mem_clk => pll_mem_clk.IN23pll_write_clk => pll_write_clk.IN23phy_ddio_address[0] => phy_ddio_address[0].IN1phy_ddio_address[1] => phy_ddio_address[1].IN1phy_ddio_address[2] => phy_ddio_address[2].IN1phy_ddio_address[3] => phy_ddio_address[3].IN1phy_ddio_address[4] => phy_ddio_address[4].IN1phy_ddio_address[5] => phy_ddio_address[5].IN1phy_ddio_address[6] => phy_ddio_address[6].IN1phy_ddio_address[7] => phy_ddio_address[7].IN1phy_ddio_address[8] => phy_ddio_address[8].IN1phy_ddio_address[9] => phy_ddio_address[9].IN1phy_ddio_address[10] => phy_ddio_address[10].IN1phy_ddio_address[11] => phy_ddio_address[11].IN1phy_ddio_address[12] => phy_ddio_address[12].IN1phy_ddio_address[13] => phy_ddio_address[13].IN1phy_ddio_address[14] => phy_ddio_address[14].IN1phy_ddio_address[15] => phy_ddio_address[15].IN1phy_ddio_address[16] => phy_ddio_address[16].IN1phy_ddio_address[17] => phy_ddio_address[17].IN1phy_ddio_address[18] => phy_ddio_address[18].IN1phy_ddio_address[19] => phy_ddio_address[19].IN1phy_ddio_address[20] => phy_ddio_address[20].IN1phy_ddio_address[21] => phy_ddio_address[21].IN1phy_ddio_address[22] => phy_ddio_address[22].IN1phy_ddio_address[23] => phy_ddio_address[23].IN1phy_ddio_address[24] => phy_ddio_address[24].IN1phy_ddio_address[25] => phy_ddio_address[25].IN1phy_ddio_address[26] => phy_ddio_address[26].IN1phy_ddio_address[27] => phy_ddio_address[27].IN1phy_ddio_address[28] => phy_ddio_address[28].IN1phy_ddio_address[29] => phy_ddio_address[29].IN1phy_ddio_address[30] => phy_ddio_address[30].IN1phy_ddio_address[31] => phy_ddio_address[31].IN1phy_ddio_address[32] => phy_ddio_address[32].IN1phy_ddio_address[33] => phy_ddio_address[33].IN1phy_ddio_address[34] => phy_ddio_address[34].IN1phy_ddio_address[35] => phy_ddio_address[35].IN1phy_ddio_address[36] => phy_ddio_address[36].IN1phy_ddio_address[37] => phy_ddio_address[37].IN1phy_ddio_address[38] => phy_ddio_address[38].IN1phy_ddio_address[39] => phy_ddio_address[39].IN1phy_ddio_address[40] => phy_ddio_address[40].IN1phy_ddio_address[41] => phy_ddio_address[41].IN1phy_ddio_address[42] => phy_ddio_address[42].IN1phy_ddio_address[43] => phy_ddio_address[43].IN1phy_ddio_address[44] => phy_ddio_address[44].IN1phy_ddio_address[45] => phy_ddio_address[45].IN1phy_ddio_address[46] => phy_ddio_address[46].IN1phy_ddio_address[47] => phy_ddio_address[47].IN1phy_ddio_address[48] => phy_ddio_address[48].IN1phy_ddio_address[49] => phy_ddio_address[49].IN1phy_ddio_address[50] => phy_ddio_address[50].IN1phy_ddio_address[51] => phy_ddio_address[51].IN1dll_delayctrl_in[0] => dll_delayctrl_in[0].IN23dll_delayctrl_in[1] => dll_delayctrl_in[1].IN23dll_delayctrl_in[2] => dll_delayctrl_in[2].IN23dll_delayctrl_in[3] => dll_delayctrl_in[3].IN23dll_delayctrl_in[4] => dll_delayctrl_in[4].IN23dll_delayctrl_in[5] => dll_delayctrl_in[5].IN23dll_delayctrl_in[6] => dll_delayctrl_in[6].IN23phy_ddio_bank[0] => phy_ddio_bank[0].IN1phy_ddio_bank[1] => phy_ddio_bank[1].IN1phy_ddio_bank[2] => phy_ddio_bank[2].IN1phy_ddio_bank[3] => phy_ddio_bank[3].IN1phy_ddio_bank[4] => phy_ddio_bank[4].IN1phy_ddio_bank[5] => phy_ddio_bank[5].IN1phy_ddio_bank[6] => phy_ddio_bank[6].IN1phy_ddio_bank[7] => phy_ddio_bank[7].IN1phy_ddio_bank[8] => phy_ddio_bank[8].IN1phy_ddio_bank[9] => phy_ddio_bank[9].IN1phy_ddio_bank[10] => phy_ddio_bank[10].IN1phy_ddio_bank[11] => phy_ddio_bank[11].IN1phy_ddio_cs_n[0] => phy_ddio_cs_n[0].IN1phy_ddio_cs_n[1] => phy_ddio_cs_n[1].IN1phy_ddio_cs_n[2] => phy_ddio_cs_n[2].IN1phy_ddio_cs_n[3] => phy_ddio_cs_n[3].IN1phy_ddio_cke[0] => phy_ddio_cke[0].IN1phy_ddio_cke[1] => phy_ddio_cke[1].IN1phy_ddio_cke[2] => phy_ddio_cke[2].IN1phy_ddio_cke[3] => phy_ddio_cke[3].IN1phy_ddio_odt[0] => phy_ddio_odt[0].IN1phy_ddio_odt[1] => phy_ddio_odt[1].IN1phy_ddio_odt[2] => phy_ddio_odt[2].IN1phy_ddio_odt[3] => phy_ddio_odt[3].IN1phy_ddio_we_n[0] => phy_ddio_we_n[0].IN1phy_ddio_we_n[1] => phy_ddio_we_n[1].IN1phy_ddio_we_n[2] => phy_ddio_we_n[2].IN1phy_ddio_we_n[3] => phy_ddio_we_n[3].IN1phy_ddio_ras_n[0] => phy_ddio_ras_n[0].IN1phy_ddio_ras_n[1] => phy_ddio_ras_n[1].IN1phy_ddio_ras_n[2] => phy_ddio_ras_n[2].IN1phy_ddio_ras_n[3] => phy_ddio_ras_n[3].IN1phy_ddio_cas_n[0] => phy_ddio_cas_n[0].IN1phy_ddio_cas_n[1] => phy_ddio_cas_n[1].IN1phy_ddio_cas_n[2] => phy_ddio_cas_n[2].IN1phy_ddio_cas_n[3] => phy_ddio_cas_n[3].IN1phy_ddio_ck[0] => clock_gen[0].mem_ck_hi.IN1phy_ddio_ck[1] => clock_gen[0].mem_ck_lo.IN1phy_ddio_ck[2] => ~NO_FANOUT~phy_ddio_ck[3] => ~NO_FANOUT~phy_ddio_reset_n[0] => phy_ddio_reset_n[0].IN1phy_ddio_reset_n[1] => phy_ddio_reset_n[1].IN1phy_ddio_reset_n[2] => phy_ddio_reset_n[2].IN1phy_ddio_reset_n[3] => phy_ddio_reset_n[3].IN1phy_mem_address[0] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[1] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[2] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[3] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[4] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[5] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[6] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[7] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[8] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[9] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[10] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[11] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_address[12] <= hps_sdram_p0_generic_ddio:uaddress_pad.dataoutphy_mem_bank[0] <= hps_sdram_p0_generic_ddio:ubank_pad.dataoutphy_mem_bank[1] <= hps_sdram_p0_generic_ddio:ubank_pad.dataoutphy_mem_bank[2] <= hps_sdram_p0_generic_ddio:ubank_pad.dataoutphy_mem_cs_n[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_cke[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_odt[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_we_n[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_ras_n[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_cas_n[0] <= hps_sdram_p0_generic_ddio:ucmd_pad.dataoutphy_mem_reset_n <= hps_sdram_p0_generic_ddio:ureset_n_pad.dataoutphy_mem_ck[0] <= hps_sdram_p0_clock_pair_generator:clock_gen[0].uclk_generator.dataoutphy_mem_ck_n[0] <= hps_sdram_p0_clock_pair_generator:clock_gen[0].uclk_generator.dataout_b|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[0].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[1].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[2].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[3].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[4].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[5].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[6].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[7].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[8].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[9].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[10].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[11].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[12].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[13].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[14].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[15].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[16].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[17].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[18].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[19].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[20].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[21].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_acv_ldc:address_gen[22].acv_ac_ldcpll_hr_clk => leveling_delay_chain_hr.I_CLK_INpll_dq_clk => ~NO_FANOUT~pll_dqs_clk => leveling_delay_chain_dqs.I_CLK_INdll_phy_delayctrl[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_phy_delayctrl[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_phy_delayctrl[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_phy_delayctrl[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_phy_delayctrl[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_phy_delayctrl[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_phy_delayctrl[6] => leveling_delay_chain_dqs.DELAYCTRLIN6afi_clk <= leveling_delay_chain_dqs.CLKOUTavl_clk <= leveling_delay_chain_hr.CLKOUTadc_clk <= leveling_delay_chain_dqs.CLKOUTadc_clk_cps <= clk_phase_select_addr_cmd.CLKOUThr_clk <= clk_phase_select_hr.CLKOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_generic_ddio:uaddress_paddatain[0] => acblock[0].hr_to_fr_hi.DATAINHIdatain[1] => acblock[0].hr_to_fr_lo.DATAINHIdatain[2] => acblock[0].hr_to_fr_hi.DATAINLOdatain[3] => acblock[0].hr_to_fr_lo.DATAINLOdatain[4] => acblock[1].hr_to_fr_hi.DATAINHIdatain[5] => acblock[1].hr_to_fr_lo.DATAINHIdatain[6] => acblock[1].hr_to_fr_hi.DATAINLOdatain[7] => acblock[1].hr_to_fr_lo.DATAINLOdatain[8] => acblock[2].hr_to_fr_hi.DATAINHIdatain[9] => acblock[2].hr_to_fr_lo.DATAINHIdatain[10] => acblock[2].hr_to_fr_hi.DATAINLOdatain[11] => acblock[2].hr_to_fr_lo.DATAINLOdatain[12] => acblock[3].hr_to_fr_hi.DATAINHIdatain[13] => acblock[3].hr_to_fr_lo.DATAINHIdatain[14] => acblock[3].hr_to_fr_hi.DATAINLOdatain[15] => acblock[3].hr_to_fr_lo.DATAINLOdatain[16] => acblock[4].hr_to_fr_hi.DATAINHIdatain[17] => acblock[4].hr_to_fr_lo.DATAINHIdatain[18] => acblock[4].hr_to_fr_hi.DATAINLOdatain[19] => acblock[4].hr_to_fr_lo.DATAINLOdatain[20] => acblock[5].hr_to_fr_hi.DATAINHIdatain[21] => acblock[5].hr_to_fr_lo.DATAINHIdatain[22] => acblock[5].hr_to_fr_hi.DATAINLOdatain[23] => acblock[5].hr_to_fr_lo.DATAINLOdatain[24] => acblock[6].hr_to_fr_hi.DATAINHIdatain[25] => acblock[6].hr_to_fr_lo.DATAINHIdatain[26] => acblock[6].hr_to_fr_hi.DATAINLOdatain[27] => acblock[6].hr_to_fr_lo.DATAINLOdatain[28] => acblock[7].hr_to_fr_hi.DATAINHIdatain[29] => acblock[7].hr_to_fr_lo.DATAINHIdatain[30] => acblock[7].hr_to_fr_hi.DATAINLOdatain[31] => acblock[7].hr_to_fr_lo.DATAINLOdatain[32] => acblock[8].hr_to_fr_hi.DATAINHIdatain[33] => acblock[8].hr_to_fr_lo.DATAINHIdatain[34] => acblock[8].hr_to_fr_hi.DATAINLOdatain[35] => acblock[8].hr_to_fr_lo.DATAINLOdatain[36] => acblock[9].hr_to_fr_hi.DATAINHIdatain[37] => acblock[9].hr_to_fr_lo.DATAINHIdatain[38] => acblock[9].hr_to_fr_hi.DATAINLOdatain[39] => acblock[9].hr_to_fr_lo.DATAINLOdatain[40] => acblock[10].hr_to_fr_hi.DATAINHIdatain[41] => acblock[10].hr_to_fr_lo.DATAINHIdatain[42] => acblock[10].hr_to_fr_hi.DATAINLOdatain[43] => acblock[10].hr_to_fr_lo.DATAINLOdatain[44] => acblock[11].hr_to_fr_hi.DATAINHIdatain[45] => acblock[11].hr_to_fr_lo.DATAINHIdatain[46] => acblock[11].hr_to_fr_hi.DATAINLOdatain[47] => acblock[11].hr_to_fr_lo.DATAINLOdatain[48] => acblock[12].hr_to_fr_hi.DATAINHIdatain[49] => acblock[12].hr_to_fr_lo.DATAINHIdatain[50] => acblock[12].hr_to_fr_hi.DATAINLOdatain[51] => acblock[12].hr_to_fr_lo.DATAINLOhalfratebypass => acblock[0].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[0].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[1].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[1].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[2].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[2].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[3].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[3].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[4].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[4].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[5].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[5].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[6].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[6].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[7].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[7].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[8].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[8].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[9].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[9].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[10].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[10].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[11].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[11].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[12].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[12].hr_to_fr_lo.HRBYPASSdataout[0] <= acblock[0].ddio_out.DATAOUTdataout[1] <= acblock[1].ddio_out.DATAOUTdataout[2] <= acblock[2].ddio_out.DATAOUTdataout[3] <= acblock[3].ddio_out.DATAOUTdataout[4] <= acblock[4].ddio_out.DATAOUTdataout[5] <= acblock[5].ddio_out.DATAOUTdataout[6] <= acblock[6].ddio_out.DATAOUTdataout[7] <= acblock[7].ddio_out.DATAOUTdataout[8] <= acblock[8].ddio_out.DATAOUTdataout[9] <= acblock[9].ddio_out.DATAOUTdataout[10] <= acblock[10].ddio_out.DATAOUTdataout[11] <= acblock[11].ddio_out.DATAOUTdataout[12] <= acblock[12].ddio_out.DATAOUTclk_hr[0] => acblock[0].hr_to_fr_hi.CLKHIclk_hr[0] => acblock[0].hr_to_fr_hi.CLKLOclk_hr[0] => acblock[0].hr_to_fr_hi.MUXSELclk_hr[0] => acblock[0].hr_to_fr_lo.CLKHIclk_hr[0] => acblock[0].hr_to_fr_lo.CLKLOclk_hr[0] => acblock[0].hr_to_fr_lo.MUXSELclk_hr[1] => acblock[1].hr_to_fr_hi.CLKHIclk_hr[1] => acblock[1].hr_to_fr_hi.CLKLOclk_hr[1] => acblock[1].hr_to_fr_hi.MUXSELclk_hr[1] => acblock[1].hr_to_fr_lo.CLKHIclk_hr[1] => acblock[1].hr_to_fr_lo.CLKLOclk_hr[1] => acblock[1].hr_to_fr_lo.MUXSELclk_hr[2] => acblock[2].hr_to_fr_hi.CLKHIclk_hr[2] => acblock[2].hr_to_fr_hi.CLKLOclk_hr[2] => acblock[2].hr_to_fr_hi.MUXSELclk_hr[2] => acblock[2].hr_to_fr_lo.CLKHIclk_hr[2] => acblock[2].hr_to_fr_lo.CLKLOclk_hr[2] => acblock[2].hr_to_fr_lo.MUXSELclk_hr[3] => acblock[3].hr_to_fr_hi.CLKHIclk_hr[3] => acblock[3].hr_to_fr_hi.CLKLOclk_hr[3] => acblock[3].hr_to_fr_hi.MUXSELclk_hr[3] => acblock[3].hr_to_fr_lo.CLKHIclk_hr[3] => acblock[3].hr_to_fr_lo.CLKLOclk_hr[3] => acblock[3].hr_to_fr_lo.MUXSELclk_hr[4] => acblock[4].hr_to_fr_hi.CLKHIclk_hr[4] => acblock[4].hr_to_fr_hi.CLKLOclk_hr[4] => acblock[4].hr_to_fr_hi.MUXSELclk_hr[4] => acblock[4].hr_to_fr_lo.CLKHIclk_hr[4] => acblock[4].hr_to_fr_lo.CLKLOclk_hr[4] => acblock[4].hr_to_fr_lo.MUXSELclk_hr[5] => acblock[5].hr_to_fr_hi.CLKHIclk_hr[5] => acblock[5].hr_to_fr_hi.CLKLOclk_hr[5] => acblock[5].hr_to_fr_hi.MUXSELclk_hr[5] => acblock[5].hr_to_fr_lo.CLKHIclk_hr[5] => acblock[5].hr_to_fr_lo.CLKLOclk_hr[5] => acblock[5].hr_to_fr_lo.MUXSELclk_hr[6] => acblock[6].hr_to_fr_hi.CLKHIclk_hr[6] => acblock[6].hr_to_fr_hi.CLKLOclk_hr[6] => acblock[6].hr_to_fr_hi.MUXSELclk_hr[6] => acblock[6].hr_to_fr_lo.CLKHIclk_hr[6] => acblock[6].hr_to_fr_lo.CLKLOclk_hr[6] => acblock[6].hr_to_fr_lo.MUXSELclk_hr[7] => acblock[7].hr_to_fr_hi.CLKHIclk_hr[7] => acblock[7].hr_to_fr_hi.CLKLOclk_hr[7] => acblock[7].hr_to_fr_hi.MUXSELclk_hr[7] => acblock[7].hr_to_fr_lo.CLKHIclk_hr[7] => acblock[7].hr_to_fr_lo.CLKLOclk_hr[7] => acblock[7].hr_to_fr_lo.MUXSELclk_hr[8] => acblock[8].hr_to_fr_hi.CLKHIclk_hr[8] => acblock[8].hr_to_fr_hi.CLKLOclk_hr[8] => acblock[8].hr_to_fr_hi.MUXSELclk_hr[8] => acblock[8].hr_to_fr_lo.CLKHIclk_hr[8] => acblock[8].hr_to_fr_lo.CLKLOclk_hr[8] => acblock[8].hr_to_fr_lo.MUXSELclk_hr[9] => acblock[9].hr_to_fr_hi.CLKHIclk_hr[9] => acblock[9].hr_to_fr_hi.CLKLOclk_hr[9] => acblock[9].hr_to_fr_hi.MUXSELclk_hr[9] => acblock[9].hr_to_fr_lo.CLKHIclk_hr[9] => acblock[9].hr_to_fr_lo.CLKLOclk_hr[9] => acblock[9].hr_to_fr_lo.MUXSELclk_hr[10] => acblock[10].hr_to_fr_hi.CLKHIclk_hr[10] => acblock[10].hr_to_fr_hi.CLKLOclk_hr[10] => acblock[10].hr_to_fr_hi.MUXSELclk_hr[10] => acblock[10].hr_to_fr_lo.CLKHIclk_hr[10] => acblock[10].hr_to_fr_lo.CLKLOclk_hr[10] => acblock[10].hr_to_fr_lo.MUXSELclk_hr[11] => acblock[11].hr_to_fr_hi.CLKHIclk_hr[11] => acblock[11].hr_to_fr_hi.CLKLOclk_hr[11] => acblock[11].hr_to_fr_hi.MUXSELclk_hr[11] => acblock[11].hr_to_fr_lo.CLKHIclk_hr[11] => acblock[11].hr_to_fr_lo.CLKLOclk_hr[11] => acblock[11].hr_to_fr_lo.MUXSELclk_hr[12] => acblock[12].hr_to_fr_hi.CLKHIclk_hr[12] => acblock[12].hr_to_fr_hi.CLKLOclk_hr[12] => acblock[12].hr_to_fr_hi.MUXSELclk_hr[12] => acblock[12].hr_to_fr_lo.CLKHIclk_hr[12] => acblock[12].hr_to_fr_lo.CLKLOclk_hr[12] => acblock[12].hr_to_fr_lo.MUXSELclk_fr[0] => acblock[0].ddio_out.CLKHIclk_fr[0] => acblock[0].ddio_out.CLKLOclk_fr[0] => acblock[0].ddio_out.MUXSELclk_fr[1] => acblock[1].ddio_out.CLKHIclk_fr[1] => acblock[1].ddio_out.CLKLOclk_fr[1] => acblock[1].ddio_out.MUXSELclk_fr[2] => acblock[2].ddio_out.CLKHIclk_fr[2] => acblock[2].ddio_out.CLKLOclk_fr[2] => acblock[2].ddio_out.MUXSELclk_fr[3] => acblock[3].ddio_out.CLKHIclk_fr[3] => acblock[3].ddio_out.CLKLOclk_fr[3] => acblock[3].ddio_out.MUXSELclk_fr[4] => acblock[4].ddio_out.CLKHIclk_fr[4] => acblock[4].ddio_out.CLKLOclk_fr[4] => acblock[4].ddio_out.MUXSELclk_fr[5] => acblock[5].ddio_out.CLKHIclk_fr[5] => acblock[5].ddio_out.CLKLOclk_fr[5] => acblock[5].ddio_out.MUXSELclk_fr[6] => acblock[6].ddio_out.CLKHIclk_fr[6] => acblock[6].ddio_out.CLKLOclk_fr[6] => acblock[6].ddio_out.MUXSELclk_fr[7] => acblock[7].ddio_out.CLKHIclk_fr[7] => acblock[7].ddio_out.CLKLOclk_fr[7] => acblock[7].ddio_out.MUXSELclk_fr[8] => acblock[8].ddio_out.CLKHIclk_fr[8] => acblock[8].ddio_out.CLKLOclk_fr[8] => acblock[8].ddio_out.MUXSELclk_fr[9] => acblock[9].ddio_out.CLKHIclk_fr[9] => acblock[9].ddio_out.CLKLOclk_fr[9] => acblock[9].ddio_out.MUXSELclk_fr[10] => acblock[10].ddio_out.CLKHIclk_fr[10] => acblock[10].ddio_out.CLKLOclk_fr[10] => acblock[10].ddio_out.MUXSELclk_fr[11] => acblock[11].ddio_out.CLKHIclk_fr[11] => acblock[11].ddio_out.CLKLOclk_fr[11] => acblock[11].ddio_out.MUXSELclk_fr[12] => acblock[12].ddio_out.CLKHIclk_fr[12] => acblock[12].ddio_out.CLKLOclk_fr[12] => acblock[12].ddio_out.MUXSEL|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_generic_ddio:ubank_paddatain[0] => acblock[0].hr_to_fr_hi.DATAINHIdatain[1] => acblock[0].hr_to_fr_lo.DATAINHIdatain[2] => acblock[0].hr_to_fr_hi.DATAINLOdatain[3] => acblock[0].hr_to_fr_lo.DATAINLOdatain[4] => acblock[1].hr_to_fr_hi.DATAINHIdatain[5] => acblock[1].hr_to_fr_lo.DATAINHIdatain[6] => acblock[1].hr_to_fr_hi.DATAINLOdatain[7] => acblock[1].hr_to_fr_lo.DATAINLOdatain[8] => acblock[2].hr_to_fr_hi.DATAINHIdatain[9] => acblock[2].hr_to_fr_lo.DATAINHIdatain[10] => acblock[2].hr_to_fr_hi.DATAINLOdatain[11] => acblock[2].hr_to_fr_lo.DATAINLOhalfratebypass => acblock[0].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[0].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[1].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[1].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[2].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[2].hr_to_fr_lo.HRBYPASSdataout[0] <= acblock[0].ddio_out.DATAOUTdataout[1] <= acblock[1].ddio_out.DATAOUTdataout[2] <= acblock[2].ddio_out.DATAOUTclk_hr[0] => acblock[0].hr_to_fr_hi.CLKHIclk_hr[0] => acblock[0].hr_to_fr_hi.CLKLOclk_hr[0] => acblock[0].hr_to_fr_hi.MUXSELclk_hr[0] => acblock[0].hr_to_fr_lo.CLKHIclk_hr[0] => acblock[0].hr_to_fr_lo.CLKLOclk_hr[0] => acblock[0].hr_to_fr_lo.MUXSELclk_hr[1] => acblock[1].hr_to_fr_hi.CLKHIclk_hr[1] => acblock[1].hr_to_fr_hi.CLKLOclk_hr[1] => acblock[1].hr_to_fr_hi.MUXSELclk_hr[1] => acblock[1].hr_to_fr_lo.CLKHIclk_hr[1] => acblock[1].hr_to_fr_lo.CLKLOclk_hr[1] => acblock[1].hr_to_fr_lo.MUXSELclk_hr[2] => acblock[2].hr_to_fr_hi.CLKHIclk_hr[2] => acblock[2].hr_to_fr_hi.CLKLOclk_hr[2] => acblock[2].hr_to_fr_hi.MUXSELclk_hr[2] => acblock[2].hr_to_fr_lo.CLKHIclk_hr[2] => acblock[2].hr_to_fr_lo.CLKLOclk_hr[2] => acblock[2].hr_to_fr_lo.MUXSELclk_fr[0] => acblock[0].ddio_out.CLKHIclk_fr[0] => acblock[0].ddio_out.CLKLOclk_fr[0] => acblock[0].ddio_out.MUXSELclk_fr[1] => acblock[1].ddio_out.CLKHIclk_fr[1] => acblock[1].ddio_out.CLKLOclk_fr[1] => acblock[1].ddio_out.MUXSELclk_fr[2] => acblock[2].ddio_out.CLKHIclk_fr[2] => acblock[2].ddio_out.CLKLOclk_fr[2] => acblock[2].ddio_out.MUXSEL|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_generic_ddio:ucmd_paddatain[0] => acblock[0].hr_to_fr_hi.DATAINHIdatain[1] => acblock[0].hr_to_fr_lo.DATAINHIdatain[2] => acblock[0].hr_to_fr_hi.DATAINLOdatain[3] => acblock[0].hr_to_fr_lo.DATAINLOdatain[4] => acblock[1].hr_to_fr_hi.DATAINHIdatain[5] => acblock[1].hr_to_fr_lo.DATAINHIdatain[6] => acblock[1].hr_to_fr_hi.DATAINLOdatain[7] => acblock[1].hr_to_fr_lo.DATAINLOdatain[8] => acblock[2].hr_to_fr_hi.DATAINHIdatain[9] => acblock[2].hr_to_fr_lo.DATAINHIdatain[10] => acblock[2].hr_to_fr_hi.DATAINLOdatain[11] => acblock[2].hr_to_fr_lo.DATAINLOdatain[12] => acblock[3].hr_to_fr_hi.DATAINHIdatain[13] => acblock[3].hr_to_fr_lo.DATAINHIdatain[14] => acblock[3].hr_to_fr_hi.DATAINLOdatain[15] => acblock[3].hr_to_fr_lo.DATAINLOdatain[16] => acblock[4].hr_to_fr_hi.DATAINHIdatain[17] => acblock[4].hr_to_fr_lo.DATAINHIdatain[18] => acblock[4].hr_to_fr_hi.DATAINLOdatain[19] => acblock[4].hr_to_fr_lo.DATAINLOdatain[20] => acblock[5].hr_to_fr_hi.DATAINHIdatain[21] => acblock[5].hr_to_fr_lo.DATAINHIdatain[22] => acblock[5].hr_to_fr_hi.DATAINLOdatain[23] => acblock[5].hr_to_fr_lo.DATAINLOhalfratebypass => acblock[0].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[0].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[1].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[1].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[2].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[2].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[3].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[3].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[4].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[4].hr_to_fr_lo.HRBYPASShalfratebypass => acblock[5].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[5].hr_to_fr_lo.HRBYPASSdataout[0] <= acblock[0].ddio_out.DATAOUTdataout[1] <= acblock[1].ddio_out.DATAOUTdataout[2] <= acblock[2].ddio_out.DATAOUTdataout[3] <= acblock[3].ddio_out.DATAOUTdataout[4] <= acblock[4].ddio_out.DATAOUTdataout[5] <= acblock[5].ddio_out.DATAOUTclk_hr[0] => acblock[0].hr_to_fr_hi.CLKHIclk_hr[0] => acblock[0].hr_to_fr_hi.CLKLOclk_hr[0] => acblock[0].hr_to_fr_hi.MUXSELclk_hr[0] => acblock[0].hr_to_fr_lo.CLKHIclk_hr[0] => acblock[0].hr_to_fr_lo.CLKLOclk_hr[0] => acblock[0].hr_to_fr_lo.MUXSELclk_hr[1] => acblock[1].hr_to_fr_hi.CLKHIclk_hr[1] => acblock[1].hr_to_fr_hi.CLKLOclk_hr[1] => acblock[1].hr_to_fr_hi.MUXSELclk_hr[1] => acblock[1].hr_to_fr_lo.CLKHIclk_hr[1] => acblock[1].hr_to_fr_lo.CLKLOclk_hr[1] => acblock[1].hr_to_fr_lo.MUXSELclk_hr[2] => acblock[2].hr_to_fr_hi.CLKHIclk_hr[2] => acblock[2].hr_to_fr_hi.CLKLOclk_hr[2] => acblock[2].hr_to_fr_hi.MUXSELclk_hr[2] => acblock[2].hr_to_fr_lo.CLKHIclk_hr[2] => acblock[2].hr_to_fr_lo.CLKLOclk_hr[2] => acblock[2].hr_to_fr_lo.MUXSELclk_hr[3] => acblock[3].hr_to_fr_hi.CLKHIclk_hr[3] => acblock[3].hr_to_fr_hi.CLKLOclk_hr[3] => acblock[3].hr_to_fr_hi.MUXSELclk_hr[3] => acblock[3].hr_to_fr_lo.CLKHIclk_hr[3] => acblock[3].hr_to_fr_lo.CLKLOclk_hr[3] => acblock[3].hr_to_fr_lo.MUXSELclk_hr[4] => acblock[4].hr_to_fr_hi.CLKHIclk_hr[4] => acblock[4].hr_to_fr_hi.CLKLOclk_hr[4] => acblock[4].hr_to_fr_hi.MUXSELclk_hr[4] => acblock[4].hr_to_fr_lo.CLKHIclk_hr[4] => acblock[4].hr_to_fr_lo.CLKLOclk_hr[4] => acblock[4].hr_to_fr_lo.MUXSELclk_hr[5] => acblock[5].hr_to_fr_hi.CLKHIclk_hr[5] => acblock[5].hr_to_fr_hi.CLKLOclk_hr[5] => acblock[5].hr_to_fr_hi.MUXSELclk_hr[5] => acblock[5].hr_to_fr_lo.CLKHIclk_hr[5] => acblock[5].hr_to_fr_lo.CLKLOclk_hr[5] => acblock[5].hr_to_fr_lo.MUXSELclk_fr[0] => acblock[0].ddio_out.CLKHIclk_fr[0] => acblock[0].ddio_out.CLKLOclk_fr[0] => acblock[0].ddio_out.MUXSELclk_fr[1] => acblock[1].ddio_out.CLKHIclk_fr[1] => acblock[1].ddio_out.CLKLOclk_fr[1] => acblock[1].ddio_out.MUXSELclk_fr[2] => acblock[2].ddio_out.CLKHIclk_fr[2] => acblock[2].ddio_out.CLKLOclk_fr[2] => acblock[2].ddio_out.MUXSELclk_fr[3] => acblock[3].ddio_out.CLKHIclk_fr[3] => acblock[3].ddio_out.CLKLOclk_fr[3] => acblock[3].ddio_out.MUXSELclk_fr[4] => acblock[4].ddio_out.CLKHIclk_fr[4] => acblock[4].ddio_out.CLKLOclk_fr[4] => acblock[4].ddio_out.MUXSELclk_fr[5] => acblock[5].ddio_out.CLKHIclk_fr[5] => acblock[5].ddio_out.CLKLOclk_fr[5] => acblock[5].ddio_out.MUXSEL|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_generic_ddio:ureset_n_paddatain[0] => acblock[0].hr_to_fr_hi.DATAINHIdatain[1] => acblock[0].hr_to_fr_lo.DATAINHIdatain[2] => acblock[0].hr_to_fr_hi.DATAINLOdatain[3] => acblock[0].hr_to_fr_lo.DATAINLOhalfratebypass => acblock[0].hr_to_fr_hi.HRBYPASShalfratebypass => acblock[0].hr_to_fr_lo.HRBYPASSdataout[0] <= acblock[0].ddio_out.DATAOUTclk_hr[0] => acblock[0].hr_to_fr_hi.CLKHIclk_hr[0] => acblock[0].hr_to_fr_hi.CLKLOclk_hr[0] => acblock[0].hr_to_fr_hi.MUXSELclk_hr[0] => acblock[0].hr_to_fr_lo.CLKHIclk_hr[0] => acblock[0].hr_to_fr_lo.CLKLOclk_hr[0] => acblock[0].hr_to_fr_lo.MUXSELclk_fr[0] => acblock[0].ddio_out.CLKHIclk_fr[0] => acblock[0].ddio_out.CLKLOclk_fr[0] => acblock[0].ddio_out.MUXSEL|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_paddatain_h[0] => ddio_out_uqe:auto_generated.datain_h[0]datain_l[0] => ddio_out_uqe:auto_generated.datain_l[0]outclock => ddio_out_uqe:auto_generated.outclockoutclocken => ~NO_FANOUT~aclr => ~NO_FANOUT~aset => ~NO_FANOUT~sclr => ~NO_FANOUT~sset => ~NO_FANOUT~oe => ~NO_FANOUT~dataout[0] <> ddio_out_uqe:auto_generated.dataout[0]oe_out[0] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad|ddio_out_uqe:auto_generateddatain_h[0] => ddio_outa[0].DATAINHIdatain_l[0] => ddio_outa[0].DATAINLOdataout[0] <= ddio_outa[0].DATAOUToutclock => ddio_outa[0].CLKHIoutclock => ddio_outa[0].CLKLOoutclock => ddio_outa[0].MUXSEL|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_acv_hard_addr_cmd_pads:uaddr_cmd_pads|hps_sdram_p0_clock_pair_generator:clock_gen[0].uclk_generatordatain[0] => pseudo_diffa_0.DATAdataout[0] <= obufa_0.OUTdataout_b[0] <= obuf_ba_0.OUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqscore_clock_in => core_clock_in.IN1reset_n_core_clock_in => reset_n_core_clock_in.IN1fr_clock_in => fr_clock_in.IN1hr_clock_in => hr_clock_in.IN1write_strobe_clock_in => write_strobe_clock_in.IN1write_strobe[0] => write_strobe[0].IN1write_strobe[1] => write_strobe[1].IN1write_strobe[2] => write_strobe[2].IN1write_strobe[3] => write_strobe[3].IN1strobe_ena_hr_clock_in => strobe_ena_hr_clock_in.IN1capture_strobe_tracking <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.capture_strobe_trackingread_write_data_io[0] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[1] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[2] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[3] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[4] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[5] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[6] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_ioread_write_data_io[7] <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_write_data_iowrite_oe_in[0] => write_oe_in[0].IN1write_oe_in[1] => write_oe_in[1].IN1write_oe_in[2] => write_oe_in[2].IN1write_oe_in[3] => write_oe_in[3].IN1write_oe_in[4] => write_oe_in[4].IN1write_oe_in[5] => write_oe_in[5].IN1write_oe_in[6] => write_oe_in[6].IN1write_oe_in[7] => write_oe_in[7].IN1write_oe_in[8] => write_oe_in[8].IN1write_oe_in[9] => write_oe_in[9].IN1write_oe_in[10] => write_oe_in[10].IN1write_oe_in[11] => write_oe_in[11].IN1write_oe_in[12] => write_oe_in[12].IN1write_oe_in[13] => write_oe_in[13].IN1write_oe_in[14] => write_oe_in[14].IN1write_oe_in[15] => write_oe_in[15].IN1strobe_io <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.strobe_iooutput_strobe_ena[0] => output_strobe_ena[0].IN1output_strobe_ena[1] => output_strobe_ena[1].IN1strobe_n_io <> altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.strobe_n_iooct_ena_in[0] => oct_ena_in[0].IN1oct_ena_in[1] => oct_ena_in[1].IN1read_data_out[0] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[1] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[2] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[3] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[4] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[5] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[6] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[7] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[8] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[9] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[10] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[11] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[12] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[13] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[14] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[15] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[16] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[17] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[18] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[19] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[20] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[21] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[22] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[23] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[24] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[25] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[26] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[27] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[28] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[29] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[30] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outread_data_out[31] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.read_data_outcapture_strobe_out <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.capture_strobe_outwrite_data_in[0] => write_data_in[0].IN1write_data_in[1] => write_data_in[1].IN1write_data_in[2] => write_data_in[2].IN1write_data_in[3] => write_data_in[3].IN1write_data_in[4] => write_data_in[4].IN1write_data_in[5] => write_data_in[5].IN1write_data_in[6] => write_data_in[6].IN1write_data_in[7] => write_data_in[7].IN1write_data_in[8] => write_data_in[8].IN1write_data_in[9] => write_data_in[9].IN1write_data_in[10] => write_data_in[10].IN1write_data_in[11] => write_data_in[11].IN1write_data_in[12] => write_data_in[12].IN1write_data_in[13] => write_data_in[13].IN1write_data_in[14] => write_data_in[14].IN1write_data_in[15] => write_data_in[15].IN1write_data_in[16] => write_data_in[16].IN1write_data_in[17] => write_data_in[17].IN1write_data_in[18] => write_data_in[18].IN1write_data_in[19] => write_data_in[19].IN1write_data_in[20] => write_data_in[20].IN1write_data_in[21] => write_data_in[21].IN1write_data_in[22] => write_data_in[22].IN1write_data_in[23] => write_data_in[23].IN1write_data_in[24] => write_data_in[24].IN1write_data_in[25] => write_data_in[25].IN1write_data_in[26] => write_data_in[26].IN1write_data_in[27] => write_data_in[27].IN1write_data_in[28] => write_data_in[28].IN1write_data_in[29] => write_data_in[29].IN1write_data_in[30] => write_data_in[30].IN1write_data_in[31] => write_data_in[31].IN1extra_write_data_in[0] => extra_write_data_in[0].IN1extra_write_data_in[1] => extra_write_data_in[1].IN1extra_write_data_in[2] => extra_write_data_in[2].IN1extra_write_data_in[3] => extra_write_data_in[3].IN1extra_write_data_out[0] <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.extra_write_data_outparallelterminationcontrol_in[0] => parallelterminationcontrol_in[0].IN1parallelterminationcontrol_in[1] => parallelterminationcontrol_in[1].IN1parallelterminationcontrol_in[2] => parallelterminationcontrol_in[2].IN1parallelterminationcontrol_in[3] => parallelterminationcontrol_in[3].IN1parallelterminationcontrol_in[4] => parallelterminationcontrol_in[4].IN1parallelterminationcontrol_in[5] => parallelterminationcontrol_in[5].IN1parallelterminationcontrol_in[6] => parallelterminationcontrol_in[6].IN1parallelterminationcontrol_in[7] => parallelterminationcontrol_in[7].IN1parallelterminationcontrol_in[8] => parallelterminationcontrol_in[8].IN1parallelterminationcontrol_in[9] => parallelterminationcontrol_in[9].IN1parallelterminationcontrol_in[10] => parallelterminationcontrol_in[10].IN1parallelterminationcontrol_in[11] => parallelterminationcontrol_in[11].IN1parallelterminationcontrol_in[12] => parallelterminationcontrol_in[12].IN1parallelterminationcontrol_in[13] => parallelterminationcontrol_in[13].IN1parallelterminationcontrol_in[14] => parallelterminationcontrol_in[14].IN1parallelterminationcontrol_in[15] => parallelterminationcontrol_in[15].IN1seriesterminationcontrol_in[0] => seriesterminationcontrol_in[0].IN1seriesterminationcontrol_in[1] => seriesterminationcontrol_in[1].IN1seriesterminationcontrol_in[2] => seriesterminationcontrol_in[2].IN1seriesterminationcontrol_in[3] => seriesterminationcontrol_in[3].IN1seriesterminationcontrol_in[4] => seriesterminationcontrol_in[4].IN1seriesterminationcontrol_in[5] => seriesterminationcontrol_in[5].IN1seriesterminationcontrol_in[6] => seriesterminationcontrol_in[6].IN1seriesterminationcontrol_in[7] => seriesterminationcontrol_in[7].IN1seriesterminationcontrol_in[8] => seriesterminationcontrol_in[8].IN1seriesterminationcontrol_in[9] => seriesterminationcontrol_in[9].IN1seriesterminationcontrol_in[10] => seriesterminationcontrol_in[10].IN1seriesterminationcontrol_in[11] => seriesterminationcontrol_in[11].IN1seriesterminationcontrol_in[12] => seriesterminationcontrol_in[12].IN1seriesterminationcontrol_in[13] => seriesterminationcontrol_in[13].IN1seriesterminationcontrol_in[14] => seriesterminationcontrol_in[14].IN1seriesterminationcontrol_in[15] => seriesterminationcontrol_in[15].IN1config_data_in => config_data_in.IN1config_update => config_update.IN1config_dqs_ena => config_dqs_ena.IN1config_io_ena[0] => config_io_ena[0].IN1config_io_ena[1] => config_io_ena[1].IN1config_io_ena[2] => config_io_ena[2].IN1config_io_ena[3] => config_io_ena[3].IN1config_io_ena[4] => config_io_ena[4].IN1config_io_ena[5] => config_io_ena[5].IN1config_io_ena[6] => config_io_ena[6].IN1config_io_ena[7] => config_io_ena[7].IN1config_extra_io_ena[0] => config_extra_io_ena[0].IN1config_dqs_io_ena => config_dqs_io_ena.IN1config_clock_in => config_clock_in.IN1lfifo_rdata_en[0] => lfifo_rdata_en[0].IN1lfifo_rdata_en[1] => lfifo_rdata_en[1].IN1lfifo_rdata_en_full[0] => lfifo_rdata_en_full[0].IN1lfifo_rdata_en_full[1] => lfifo_rdata_en_full[1].IN1lfifo_rd_latency[0] => lfifo_rd_latency[0].IN1lfifo_rd_latency[1] => lfifo_rd_latency[1].IN1lfifo_rd_latency[2] => lfifo_rd_latency[2].IN1lfifo_rd_latency[3] => lfifo_rd_latency[3].IN1lfifo_rd_latency[4] => lfifo_rd_latency[4].IN1lfifo_reset_n => lfifo_reset_n.IN1lfifo_rdata_valid <= altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst.lfifo_rdata_validvfifo_qvld[0] => vfifo_qvld[0].IN1vfifo_qvld[1] => vfifo_qvld[1].IN1vfifo_inc_wr_ptr[0] => vfifo_inc_wr_ptr[0].IN1vfifo_inc_wr_ptr[1] => vfifo_inc_wr_ptr[1].IN1vfifo_reset_n => vfifo_reset_n.IN1rfifo_reset_n => rfifo_reset_n.IN1dll_delayctrl_in[0] => dll_delayctrl_in[0].IN1dll_delayctrl_in[1] => dll_delayctrl_in[1].IN1dll_delayctrl_in[2] => dll_delayctrl_in[2].IN1dll_delayctrl_in[3] => dll_delayctrl_in[3].IN1dll_delayctrl_in[4] => dll_delayctrl_in[4].IN1dll_delayctrl_in[5] => dll_delayctrl_in[5].IN1dll_delayctrl_in[6] => dll_delayctrl_in[6].IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_instdll_delayctrl_in[0] => leveling_delay_chain_dqs.DELAYCTRLINdll_delayctrl_in[0] => dqs_delay_chain.DELAYCTRLINdll_delayctrl_in[1] => leveling_delay_chain_dqs.DELAYCTRLIN1dll_delayctrl_in[1] => dqs_delay_chain.DELAYCTRLIN1dll_delayctrl_in[2] => leveling_delay_chain_dqs.DELAYCTRLIN2dll_delayctrl_in[2] => dqs_delay_chain.DELAYCTRLIN2dll_delayctrl_in[3] => leveling_delay_chain_dqs.DELAYCTRLIN3dll_delayctrl_in[3] => dqs_delay_chain.DELAYCTRLIN3dll_delayctrl_in[4] => leveling_delay_chain_dqs.DELAYCTRLIN4dll_delayctrl_in[4] => dqs_delay_chain.DELAYCTRLIN4dll_delayctrl_in[5] => leveling_delay_chain_dqs.DELAYCTRLIN5dll_delayctrl_in[5] => dqs_delay_chain.DELAYCTRLIN5dll_delayctrl_in[6] => leveling_delay_chain_dqs.DELAYCTRLIN6dll_delayctrl_in[6] => dqs_delay_chain.DELAYCTRLIN6dll_offsetdelay_in[0] => ~NO_FANOUT~dll_offsetdelay_in[1] => ~NO_FANOUT~dll_offsetdelay_in[2] => ~NO_FANOUT~dll_offsetdelay_in[3] => ~NO_FANOUT~dll_offsetdelay_in[4] => ~NO_FANOUT~dll_offsetdelay_in[5] => ~NO_FANOUT~dll_offsetdelay_in[6] => ~NO_FANOUT~capture_strobe_in => ~NO_FANOUT~capture_strobe_n_in => ~NO_FANOUT~capture_strobe_ena[0] => ~NO_FANOUT~capture_strobe_out <= <GND>output_strobe_ena[0] => hr_to_fr_os_oe.DATAINHIoutput_strobe_ena[1] => hr_to_fr_os_oe.DATAINLOoutput_strobe_out <= <GND>output_strobe_n_out <= <VCC>oct_ena_in[0] => hr_to_fr_os_oct.DATAINHIoct_ena_in[1] => hr_to_fr_os_oct.DATAINLOstrobe_io <> obuf_os_0strobe_n_io <> obuf_os_bar_0core_clock_in => ~NO_FANOUT~fr_clock_in => leveling_delay_chain_dq.I_CLK_INhr_clock_in => leveling_delay_chain_hr.I_CLK_INdr_clock_in => ~NO_FANOUT~strobe_ena_hr_clock_in => ~NO_FANOUT~write_strobe_clock_in => leveling_delay_chain_dqs.I_CLK_INwrite_strobe[0] => hr_to_fr_os_hi.DATAINHIwrite_strobe[1] => hr_to_fr_os_lo.DATAINHIwrite_strobe[2] => hr_to_fr_os_hi.DATAINLOwrite_strobe[3] => hr_to_fr_os_lo.DATAINLOreset_n_core_clock_in => ~NO_FANOUT~parallelterminationcontrol_in[0] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => obuf_os_0.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[0] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLINparallelterminationcontrol_in[1] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => obuf_os_0.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[1] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN1parallelterminationcontrol_in[2] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => obuf_os_0.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[2] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN2parallelterminationcontrol_in[3] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => obuf_os_0.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[3] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN3parallelterminationcontrol_in[4] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => obuf_os_0.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[4] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN4parallelterminationcontrol_in[5] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => obuf_os_0.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[5] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN5parallelterminationcontrol_in[6] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => obuf_os_0.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[6] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN6parallelterminationcontrol_in[7] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => obuf_os_0.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[7] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN7parallelterminationcontrol_in[8] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => obuf_os_0.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[8] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN8parallelterminationcontrol_in[9] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => obuf_os_0.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[9] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN9parallelterminationcontrol_in[10] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => obuf_os_0.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[10] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN10parallelterminationcontrol_in[11] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => obuf_os_0.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[11] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN11parallelterminationcontrol_in[12] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => obuf_os_0.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[12] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN12parallelterminationcontrol_in[13] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => obuf_os_0.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[13] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN13parallelterminationcontrol_in[14] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => obuf_os_0.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[14] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN14parallelterminationcontrol_in[15] => obuf_os_bar_0.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => obuf_os_0.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[0].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[1].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[2].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[3].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[4].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[5].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[6].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => pad_gen[7].data_out.PARALLELTERMINATIONCONTROLIN15parallelterminationcontrol_in[15] => extra_output_pad_gen[0].obuf_1.PARALLELTERMINATIONCONTROLIN15seriesterminationcontrol_in[0] => obuf_os_bar_0.CONTROLINseriesterminationcontrol_in[0] => obuf_os_0.CONTROLINseriesterminationcontrol_in[0] => pad_gen[0].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[1].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[2].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[3].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[4].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[5].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[6].data_out.CONTROLINseriesterminationcontrol_in[0] => pad_gen[7].data_out.CONTROLINseriesterminationcontrol_in[0] => extra_output_pad_gen[0].obuf_1.CONTROLINseriesterminationcontrol_in[1] => obuf_os_bar_0.CONTROLIN1seriesterminationcontrol_in[1] => obuf_os_0.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[0].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[1].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[2].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[3].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[4].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[5].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[6].data_out.CONTROLIN1seriesterminationcontrol_in[1] => pad_gen[7].data_out.CONTROLIN1seriesterminationcontrol_in[1] => extra_output_pad_gen[0].obuf_1.CONTROLIN1seriesterminationcontrol_in[2] => obuf_os_bar_0.CONTROLIN2seriesterminationcontrol_in[2] => obuf_os_0.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[0].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[1].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[2].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[3].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[4].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[5].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[6].data_out.CONTROLIN2seriesterminationcontrol_in[2] => pad_gen[7].data_out.CONTROLIN2seriesterminationcontrol_in[2] => extra_output_pad_gen[0].obuf_1.CONTROLIN2seriesterminationcontrol_in[3] => obuf_os_bar_0.CONTROLIN3seriesterminationcontrol_in[3] => obuf_os_0.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[0].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[1].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[2].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[3].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[4].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[5].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[6].data_out.CONTROLIN3seriesterminationcontrol_in[3] => pad_gen[7].data_out.CONTROLIN3seriesterminationcontrol_in[3] => extra_output_pad_gen[0].obuf_1.CONTROLIN3seriesterminationcontrol_in[4] => obuf_os_bar_0.CONTROLIN4seriesterminationcontrol_in[4] => obuf_os_0.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[0].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[1].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[2].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[3].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[4].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[5].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[6].data_out.CONTROLIN4seriesterminationcontrol_in[4] => pad_gen[7].data_out.CONTROLIN4seriesterminationcontrol_in[4] => extra_output_pad_gen[0].obuf_1.CONTROLIN4seriesterminationcontrol_in[5] => obuf_os_bar_0.CONTROLIN5seriesterminationcontrol_in[5] => obuf_os_0.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[0].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[1].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[2].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[3].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[4].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[5].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[6].data_out.CONTROLIN5seriesterminationcontrol_in[5] => pad_gen[7].data_out.CONTROLIN5seriesterminationcontrol_in[5] => extra_output_pad_gen[0].obuf_1.CONTROLIN5seriesterminationcontrol_in[6] => obuf_os_bar_0.CONTROLIN6seriesterminationcontrol_in[6] => obuf_os_0.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[0].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[1].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[2].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[3].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[4].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[5].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[6].data_out.CONTROLIN6seriesterminationcontrol_in[6] => pad_gen[7].data_out.CONTROLIN6seriesterminationcontrol_in[6] => extra_output_pad_gen[0].obuf_1.CONTROLIN6seriesterminationcontrol_in[7] => obuf_os_bar_0.CONTROLIN7seriesterminationcontrol_in[7] => obuf_os_0.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[0].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[1].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[2].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[3].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[4].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[5].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[6].data_out.CONTROLIN7seriesterminationcontrol_in[7] => pad_gen[7].data_out.CONTROLIN7seriesterminationcontrol_in[7] => extra_output_pad_gen[0].obuf_1.CONTROLIN7seriesterminationcontrol_in[8] => obuf_os_bar_0.CONTROLIN8seriesterminationcontrol_in[8] => obuf_os_0.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[0].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[1].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[2].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[3].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[4].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[5].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[6].data_out.CONTROLIN8seriesterminationcontrol_in[8] => pad_gen[7].data_out.CONTROLIN8seriesterminationcontrol_in[8] => extra_output_pad_gen[0].obuf_1.CONTROLIN8seriesterminationcontrol_in[9] => obuf_os_bar_0.CONTROLIN9seriesterminationcontrol_in[9] => obuf_os_0.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[0].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[1].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[2].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[3].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[4].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[5].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[6].data_out.CONTROLIN9seriesterminationcontrol_in[9] => pad_gen[7].data_out.CONTROLIN9seriesterminationcontrol_in[9] => extra_output_pad_gen[0].obuf_1.CONTROLIN9seriesterminationcontrol_in[10] => obuf_os_bar_0.CONTROLIN10seriesterminationcontrol_in[10] => obuf_os_0.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[0].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[1].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[2].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[3].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[4].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[5].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[6].data_out.CONTROLIN10seriesterminationcontrol_in[10] => pad_gen[7].data_out.CONTROLIN10seriesterminationcontrol_in[10] => extra_output_pad_gen[0].obuf_1.CONTROLIN10seriesterminationcontrol_in[11] => obuf_os_bar_0.CONTROLIN11seriesterminationcontrol_in[11] => obuf_os_0.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[0].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[1].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[2].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[3].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[4].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[5].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[6].data_out.CONTROLIN11seriesterminationcontrol_in[11] => pad_gen[7].data_out.CONTROLIN11seriesterminationcontrol_in[11] => extra_output_pad_gen[0].obuf_1.CONTROLIN11seriesterminationcontrol_in[12] => obuf_os_bar_0.CONTROLIN12seriesterminationcontrol_in[12] => obuf_os_0.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[0].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[1].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[2].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[3].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[4].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[5].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[6].data_out.CONTROLIN12seriesterminationcontrol_in[12] => pad_gen[7].data_out.CONTROLIN12seriesterminationcontrol_in[12] => extra_output_pad_gen[0].obuf_1.CONTROLIN12seriesterminationcontrol_in[13] => obuf_os_bar_0.CONTROLIN13seriesterminationcontrol_in[13] => obuf_os_0.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[0].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[1].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[2].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[3].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[4].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[5].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[6].data_out.CONTROLIN13seriesterminationcontrol_in[13] => pad_gen[7].data_out.CONTROLIN13seriesterminationcontrol_in[13] => extra_output_pad_gen[0].obuf_1.CONTROLIN13seriesterminationcontrol_in[14] => obuf_os_bar_0.CONTROLIN14seriesterminationcontrol_in[14] => obuf_os_0.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[0].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[1].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[2].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[3].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[4].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[5].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[6].data_out.CONTROLIN14seriesterminationcontrol_in[14] => pad_gen[7].data_out.CONTROLIN14seriesterminationcontrol_in[14] => extra_output_pad_gen[0].obuf_1.CONTROLIN14seriesterminationcontrol_in[15] => obuf_os_bar_0.CONTROLIN15seriesterminationcontrol_in[15] => obuf_os_0.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[0].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[1].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[2].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[3].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[4].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[5].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[6].data_out.CONTROLIN15seriesterminationcontrol_in[15] => pad_gen[7].data_out.CONTROLIN15seriesterminationcontrol_in[15] => extra_output_pad_gen[0].obuf_1.CONTROLIN15read_data_in[0] => ~NO_FANOUT~read_data_in[1] => ~NO_FANOUT~read_data_in[2] => ~NO_FANOUT~read_data_in[3] => ~NO_FANOUT~read_data_in[4] => ~NO_FANOUT~read_data_in[5] => ~NO_FANOUT~read_data_in[6] => ~NO_FANOUT~read_data_in[7] => ~NO_FANOUT~write_data_out[0] <= <GND>write_data_out[1] <= <GND>write_data_out[2] <= <GND>write_data_out[3] <= <GND>write_data_out[4] <= <GND>write_data_out[5] <= <GND>write_data_out[6] <= <GND>write_data_out[7] <= <GND>read_write_data_io[0] <> pad_gen[0].data_outread_write_data_io[1] <> pad_gen[1].data_outread_write_data_io[2] <> pad_gen[2].data_outread_write_data_io[3] <> pad_gen[3].data_outread_write_data_io[4] <> pad_gen[4].data_outread_write_data_io[5] <> pad_gen[5].data_outread_write_data_io[6] <> pad_gen[6].data_outread_write_data_io[7] <> pad_gen[7].data_outwrite_oe_in[0] => output_path_gen[0].hr_to_fr_oe.DATAINHIwrite_oe_in[1] => output_path_gen[0].hr_to_fr_oe.DATAINLOwrite_oe_in[2] => output_path_gen[1].hr_to_fr_oe.DATAINHIwrite_oe_in[3] => output_path_gen[1].hr_to_fr_oe.DATAINLOwrite_oe_in[4] => output_path_gen[2].hr_to_fr_oe.DATAINHIwrite_oe_in[5] => output_path_gen[2].hr_to_fr_oe.DATAINLOwrite_oe_in[6] => output_path_gen[3].hr_to_fr_oe.DATAINHIwrite_oe_in[7] => output_path_gen[3].hr_to_fr_oe.DATAINLOwrite_oe_in[8] => output_path_gen[4].hr_to_fr_oe.DATAINHIwrite_oe_in[9] => output_path_gen[4].hr_to_fr_oe.DATAINLOwrite_oe_in[10] => output_path_gen[5].hr_to_fr_oe.DATAINHIwrite_oe_in[11] => output_path_gen[5].hr_to_fr_oe.DATAINLOwrite_oe_in[12] => output_path_gen[6].hr_to_fr_oe.DATAINHIwrite_oe_in[13] => output_path_gen[6].hr_to_fr_oe.DATAINLOwrite_oe_in[14] => output_path_gen[7].hr_to_fr_oe.DATAINHIwrite_oe_in[15] => output_path_gen[7].hr_to_fr_oe.DATAINLOread_data_out[0] <= input_path_gen[0].read_fifo.O_DOUTread_data_out[1] <= input_path_gen[0].read_fifo.O_DOUT1read_data_out[2] <= input_path_gen[0].read_fifo.O_DOUT2read_data_out[3] <= input_path_gen[0].read_fifo.O_DOUT3read_data_out[4] <= input_path_gen[1].read_fifo.O_DOUTread_data_out[5] <= input_path_gen[1].read_fifo.O_DOUT1read_data_out[6] <= input_path_gen[1].read_fifo.O_DOUT2read_data_out[7] <= input_path_gen[1].read_fifo.O_DOUT3read_data_out[8] <= input_path_gen[2].read_fifo.O_DOUTread_data_out[9] <= input_path_gen[2].read_fifo.O_DOUT1read_data_out[10] <= input_path_gen[2].read_fifo.O_DOUT2read_data_out[11] <= input_path_gen[2].read_fifo.O_DOUT3read_data_out[12] <= input_path_gen[3].read_fifo.O_DOUTread_data_out[13] <= input_path_gen[3].read_fifo.O_DOUT1read_data_out[14] <= input_path_gen[3].read_fifo.O_DOUT2read_data_out[15] <= input_path_gen[3].read_fifo.O_DOUT3read_data_out[16] <= input_path_gen[4].read_fifo.O_DOUTread_data_out[17] <= input_path_gen[4].read_fifo.O_DOUT1read_data_out[18] <= input_path_gen[4].read_fifo.O_DOUT2read_data_out[19] <= input_path_gen[4].read_fifo.O_DOUT3read_data_out[20] <= input_path_gen[5].read_fifo.O_DOUTread_data_out[21] <= input_path_gen[5].read_fifo.O_DOUT1read_data_out[22] <= input_path_gen[5].read_fifo.O_DOUT2read_data_out[23] <= input_path_gen[5].read_fifo.O_DOUT3read_data_out[24] <= input_path_gen[6].read_fifo.O_DOUTread_data_out[25] <= input_path_gen[6].read_fifo.O_DOUT1read_data_out[26] <= input_path_gen[6].read_fifo.O_DOUT2read_data_out[27] <= input_path_gen[6].read_fifo.O_DOUT3read_data_out[28] <= input_path_gen[7].read_fifo.O_DOUTread_data_out[29] <= input_path_gen[7].read_fifo.O_DOUT1read_data_out[30] <= input_path_gen[7].read_fifo.O_DOUT2read_data_out[31] <= input_path_gen[7].read_fifo.O_DOUT3write_data_in[0] => output_path_gen[0].hr_to_fr_hi.DATAINHIwrite_data_in[1] => output_path_gen[0].hr_to_fr_lo.DATAINHIwrite_data_in[2] => output_path_gen[0].hr_to_fr_hi.DATAINLOwrite_data_in[3] => output_path_gen[0].hr_to_fr_lo.DATAINLOwrite_data_in[4] => output_path_gen[1].hr_to_fr_hi.DATAINHIwrite_data_in[5] => output_path_gen[1].hr_to_fr_lo.DATAINHIwrite_data_in[6] => output_path_gen[1].hr_to_fr_hi.DATAINLOwrite_data_in[7] => output_path_gen[1].hr_to_fr_lo.DATAINLOwrite_data_in[8] => output_path_gen[2].hr_to_fr_hi.DATAINHIwrite_data_in[9] => output_path_gen[2].hr_to_fr_lo.DATAINHIwrite_data_in[10] => output_path_gen[2].hr_to_fr_hi.DATAINLOwrite_data_in[11] => output_path_gen[2].hr_to_fr_lo.DATAINLOwrite_data_in[12] => output_path_gen[3].hr_to_fr_hi.DATAINHIwrite_data_in[13] => output_path_gen[3].hr_to_fr_lo.DATAINHIwrite_data_in[14] => output_path_gen[3].hr_to_fr_hi.DATAINLOwrite_data_in[15] => output_path_gen[3].hr_to_fr_lo.DATAINLOwrite_data_in[16] => output_path_gen[4].hr_to_fr_hi.DATAINHIwrite_data_in[17] => output_path_gen[4].hr_to_fr_lo.DATAINHIwrite_data_in[18] => output_path_gen[4].hr_to_fr_hi.DATAINLOwrite_data_in[19] => output_path_gen[4].hr_to_fr_lo.DATAINLOwrite_data_in[20] => output_path_gen[5].hr_to_fr_hi.DATAINHIwrite_data_in[21] => output_path_gen[5].hr_to_fr_lo.DATAINHIwrite_data_in[22] => output_path_gen[5].hr_to_fr_hi.DATAINLOwrite_data_in[23] => output_path_gen[5].hr_to_fr_lo.DATAINLOwrite_data_in[24] => output_path_gen[6].hr_to_fr_hi.DATAINHIwrite_data_in[25] => output_path_gen[6].hr_to_fr_lo.DATAINHIwrite_data_in[26] => output_path_gen[6].hr_to_fr_hi.DATAINLOwrite_data_in[27] => output_path_gen[6].hr_to_fr_lo.DATAINLOwrite_data_in[28] => output_path_gen[7].hr_to_fr_hi.DATAINHIwrite_data_in[29] => output_path_gen[7].hr_to_fr_lo.DATAINHIwrite_data_in[30] => output_path_gen[7].hr_to_fr_hi.DATAINLOwrite_data_in[31] => output_path_gen[7].hr_to_fr_lo.DATAINLOextra_write_data_in[0] => extra_output_pad_gen[0].hr_to_fr_hi.DATAINHIextra_write_data_in[1] => extra_output_pad_gen[0].hr_to_fr_lo.DATAINHIextra_write_data_in[2] => extra_output_pad_gen[0].hr_to_fr_hi.DATAINLOextra_write_data_in[3] => extra_output_pad_gen[0].hr_to_fr_lo.DATAINLOextra_write_data_out[0] <= extra_output_pad_gen[0].obuf_1.OUTcapture_strobe_tracking <= dqs_ff.DB_MAX_OUTPUT_PORT_TYPElfifo_rdata_en[0] => hr_to_fr_lfifo_rdata_en.DATAINHIlfifo_rdata_en[1] => hr_to_fr_lfifo_rdata_en.DATAINLOlfifo_rdata_en_full[0] => hr_to_fr_lfifo_rdata_en_full.DATAINHIlfifo_rdata_en_full[1] => hr_to_fr_lfifo_rdata_en_full.DATAINLOlfifo_rd_latency[0] => lfifo.I_RD_LATENCYlfifo_rd_latency[1] => lfifo.I_RD_LATENCY1lfifo_rd_latency[2] => lfifo.I_RD_LATENCY2lfifo_rd_latency[3] => lfifo.I_RD_LATENCY3lfifo_rd_latency[4] => lfifo.I_RD_LATENCY4lfifo_reset_n => lfifo.I_RST_Nlfifo_rdata_valid <= lfifo.O_RDATA_VALIDvfifo_qvld[0] => hr_to_fr_vfifo_qvld.DATAINHIvfifo_qvld[1] => hr_to_fr_vfifo_qvld.DATAINLOvfifo_inc_wr_ptr[0] => hr_to_fr_vfifo_inc_wr_ptr.DATAINHIvfifo_inc_wr_ptr[1] => hr_to_fr_vfifo_inc_wr_ptr.DATAINLOvfifo_reset_n => vfifo.I_RSTNrfifo_reset_n => input_path_gen[0].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[1].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[2].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[3].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[4].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[5].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[6].read_fifo.I_RSTNrfifo_reset_n => input_path_gen[7].read_fifo.I_RSTNconfig_data_in => dqs_io_config_1.DATAINconfig_data_in => dqs_config_gen[0].dqs_config_inst.DATAINconfig_data_in => pad_gen[0].config_1.DATAINconfig_data_in => pad_gen[1].config_1.DATAINconfig_data_in => pad_gen[2].config_1.DATAINconfig_data_in => pad_gen[3].config_1.DATAINconfig_data_in => pad_gen[4].config_1.DATAINconfig_data_in => pad_gen[5].config_1.DATAINconfig_data_in => pad_gen[6].config_1.DATAINconfig_data_in => pad_gen[7].config_1.DATAINconfig_data_in => extra_output_pad_gen[0].config_1.DATAINconfig_dqs_ena => dqs_config_gen[0].dqs_config_inst.ENABLEconfig_io_ena[0] => pad_gen[0].config_1.ENABLEconfig_io_ena[1] => pad_gen[1].config_1.ENABLEconfig_io_ena[2] => pad_gen[2].config_1.ENABLEconfig_io_ena[3] => pad_gen[3].config_1.ENABLEconfig_io_ena[4] => pad_gen[4].config_1.ENABLEconfig_io_ena[5] => pad_gen[5].config_1.ENABLEconfig_io_ena[6] => pad_gen[6].config_1.ENABLEconfig_io_ena[7] => pad_gen[7].config_1.ENABLEconfig_extra_io_ena[0] => extra_output_pad_gen[0].config_1.ENABLEconfig_dqs_io_ena => dqs_io_config_1.ENABLEconfig_update => dqs_io_config_1.UPDATEconfig_update => dqs_config_gen[0].dqs_config_inst.UPDATEconfig_update => pad_gen[0].config_1.UPDATEconfig_update => pad_gen[1].config_1.UPDATEconfig_update => pad_gen[2].config_1.UPDATEconfig_update => pad_gen[3].config_1.UPDATEconfig_update => pad_gen[4].config_1.UPDATEconfig_update => pad_gen[5].config_1.UPDATEconfig_update => pad_gen[6].config_1.UPDATEconfig_update => pad_gen[7].config_1.UPDATEconfig_update => extra_output_pad_gen[0].config_1.UPDATEconfig_clock_in => dqs_io_config_1.CLKconfig_clock_in => dqs_config_gen[0].dqs_config_inst.CLKconfig_clock_in => pad_gen[0].config_1.CLKconfig_clock_in => pad_gen[1].config_1.CLKconfig_clock_in => pad_gen[2].config_1.CLKconfig_clock_in => pad_gen[3].config_1.CLKconfig_clock_in => pad_gen[4].config_1.CLKconfig_clock_in => pad_gen[5].config_1.CLKconfig_clock_in => pad_gen[6].config_1.CLKconfig_clock_in => pad_gen[7].config_1.CLKconfig_clock_in => extra_output_pad_gen[0].config_1.CLK|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|altera_mem_if_hhp_qseq_synth_top:seq|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|altera_mem_if_hard_memory_controller_top_cyclonev:c0afi_clk => ~NO_FANOUT~afi_half_clk => ~NO_FANOUT~ctl_clk => hmc_inst.I_CTLCLKmp_cmd_clk_0 => hmc_inst.I_PORTCLK0mp_cmd_clk_1 => hmc_inst.I_PORTCLK1mp_cmd_clk_2 => hmc_inst.I_PORTCLK2mp_cmd_clk_3 => hmc_inst.I_PORTCLK3mp_cmd_clk_4 => hmc_inst.I_PORTCLK4mp_cmd_clk_5 => hmc_inst.I_PORTCLK5mp_cmd_reset_n_0 => hmc_inst.I_IAVSTCMDRESETN0mp_cmd_reset_n_1 => hmc_inst.I_IAVSTCMDRESETN1mp_cmd_reset_n_2 => hmc_inst.I_IAVSTCMDRESETN2mp_cmd_reset_n_3 => hmc_inst.I_IAVSTCMDRESETN3mp_cmd_reset_n_4 => hmc_inst.I_IAVSTCMDRESETN4mp_cmd_reset_n_5 => hmc_inst.I_IAVSTCMDRESETN5mp_rfifo_clk_0 => hmc_inst.I_IAVSTRDCLK0mp_rfifo_clk_1 => hmc_inst.I_IAVSTRDCLK1mp_rfifo_clk_2 => hmc_inst.I_IAVSTRDCLK2mp_rfifo_clk_3 => hmc_inst.I_IAVSTRDCLK3mp_rfifo_reset_n_0 => hmc_inst.I_IAVSTRDRESETN0mp_rfifo_reset_n_1 => hmc_inst.I_IAVSTRDRESETN1mp_rfifo_reset_n_2 => hmc_inst.I_IAVSTRDRESETN2mp_rfifo_reset_n_3 => hmc_inst.I_IAVSTRDRESETN3mp_wfifo_clk_0 => hmc_inst.I_IAVSTWRCLK0mp_wfifo_clk_1 => hmc_inst.I_IAVSTWRCLK1mp_wfifo_clk_2 => hmc_inst.I_IAVSTWRCLK2mp_wfifo_clk_3 => hmc_inst.I_IAVSTWRCLK3mp_wfifo_reset_n_0 => hmc_inst.I_IAVSTWRRESETN0mp_wfifo_reset_n_1 => hmc_inst.I_IAVSTWRRESETN1mp_wfifo_reset_n_2 => hmc_inst.I_IAVSTWRRESETN2mp_wfifo_reset_n_3 => hmc_inst.I_IAVSTWRRESETN3csr_clk => hmc_inst.I_MMRCLKcsr_reset_n => hmc_inst.I_MMRRESETNafi_reset_n => ~NO_FANOUT~ctl_reset_n => hmc_inst.I_CTLRESETNavl_ready_0 <= hmc_inst.O_OAMMREADY0avl_write_req_0 => hmc_inst.I_IAVSTCMDDATA01avl_read_req_0 => hmc_inst.I_IAVSTCMDDATA0avl_addr_0[0] => hmc_inst.I_IAVSTCMDDATA02avl_be_0[0] => i_avst_wr_data_g.DATABavl_be_0[0] => i_avst_wr_data_g.DATABavl_be_0[0] => i_avst_wr_data_g.DATABavl_wdata_0[0] => i_avst_wr_data_g.DATABavl_wdata_0[0] => i_avst_wr_data_g.DATABavl_wdata_0[0] => i_avst_wr_data_g.DATABavl_size_0[0] => hmc_inst.I_IAVSTCMDDATA034avl_size_0[1] => hmc_inst.I_IAVSTCMDDATA035avl_size_0[2] => hmc_inst.I_IAVSTCMDDATA036avl_burstbegin_0 => ~NO_FANOUT~avl_rdata_0[0] <= <GND>avl_rdata_valid_0 <= <GND>avl_ready_1 <= hmc_inst.O_OAMMREADY1avl_write_req_1 => hmc_inst.I_IAVSTCMDDATA11avl_read_req_1 => hmc_inst.I_IAVSTCMDDATA1avl_addr_1[0] => hmc_inst.I_IAVSTCMDDATA12avl_be_1[0] => i_avst_wr_data_g.DATABavl_be_1[0] => i_avst_wr_data_g.DATABavl_be_1[0] => i_avst_wr_data_g.DATABavl_wdata_1[0] => i_avst_wr_data_g.DATABavl_wdata_1[0] => i_avst_wr_data_g.DATABavl_wdata_1[0] => i_avst_wr_data_g.DATABavl_size_1[0] => hmc_inst.I_IAVSTCMDDATA134avl_size_1[1] => hmc_inst.I_IAVSTCMDDATA135avl_size_1[2] => hmc_inst.I_IAVSTCMDDATA136avl_burstbegin_1 => ~NO_FANOUT~avl_rdata_1[0] <= <GND>avl_rdata_valid_1 <= <GND>avl_ready_2 <= hmc_inst.O_OAMMREADY2avl_write_req_2 => hmc_inst.I_IAVSTCMDDATA21avl_read_req_2 => hmc_inst.I_IAVSTCMDDATA2avl_addr_2[0] => hmc_inst.I_IAVSTCMDDATA22avl_be_2[0] => i_avst_wr_data_g.DATABavl_be_2[0] => i_avst_wr_data_g.DATABavl_be_2[0] => i_avst_wr_data_g.DATABavl_wdata_2[0] => i_avst_wr_data_g.DATABavl_wdata_2[0] => i_avst_wr_data_g.DATABavl_wdata_2[0] => i_avst_wr_data_g.DATABavl_size_2[0] => hmc_inst.I_IAVSTCMDDATA234avl_size_2[1] => hmc_inst.I_IAVSTCMDDATA235avl_size_2[2] => hmc_inst.I_IAVSTCMDDATA236avl_burstbegin_2 => ~NO_FANOUT~avl_rdata_2[0] <= <GND>avl_rdata_valid_2 <= <GND>avl_ready_3 <= hmc_inst.O_OAMMREADY3avl_write_req_3 => hmc_inst.I_IAVSTCMDDATA31avl_read_req_3 => hmc_inst.I_IAVSTCMDDATA3avl_addr_3[0] => hmc_inst.I_IAVSTCMDDATA32avl_be_3[0] => i_avst_wr_data_g.DATABavl_be_3[0] => i_avst_wr_data_g.DATABavl_be_3[0] => i_avst_wr_data_g.DATABavl_wdata_3[0] => i_avst_wr_data_g.DATABavl_wdata_3[0] => i_avst_wr_data_g.DATABavl_wdata_3[0] => i_avst_wr_data_g.DATABavl_size_3[0] => hmc_inst.I_IAVSTCMDDATA334avl_size_3[1] => hmc_inst.I_IAVSTCMDDATA335avl_size_3[2] => hmc_inst.I_IAVSTCMDDATA336avl_burstbegin_3 => ~NO_FANOUT~avl_rdata_3[0] <= <GND>avl_rdata_valid_3 <= <GND>avl_ready_4 <= hmc_inst.O_OAMMREADY4avl_write_req_4 => hmc_inst.I_IAVSTCMDDATA41avl_read_req_4 => hmc_inst.I_IAVSTCMDDATA4avl_addr_4[0] => hmc_inst.I_IAVSTCMDDATA42avl_be_4[0] => i_avst_wr_data_g.DATABavl_be_4[0] => i_avst_wr_data_g.DATABavl_be_4[0] => i_avst_wr_data_g.DATABavl_wdata_4[0] => i_avst_wr_data_g.DATABavl_wdata_4[0] => i_avst_wr_data_g.DATABavl_wdata_4[0] => i_avst_wr_data_g.DATABavl_size_4[0] => hmc_inst.I_IAVSTCMDDATA434avl_size_4[1] => hmc_inst.I_IAVSTCMDDATA435avl_size_4[2] => hmc_inst.I_IAVSTCMDDATA436avl_burstbegin_4 => ~NO_FANOUT~avl_rdata_4[0] <= <GND>avl_rdata_valid_4 <= <GND>avl_ready_5 <= hmc_inst.O_OAMMREADY5avl_write_req_5 => hmc_inst.I_IAVSTCMDDATA51avl_read_req_5 => hmc_inst.I_IAVSTCMDDATA5avl_addr_5[0] => hmc_inst.I_IAVSTCMDDATA52avl_be_5[0] => i_avst_wr_data_g.DATABavl_be_5[0] => i_avst_wr_data_g.DATABavl_be_5[0] => i_avst_wr_data_g.DATABavl_wdata_5[0] => i_avst_wr_data_g.DATABavl_wdata_5[0] => i_avst_wr_data_g.DATABavl_wdata_5[0] => i_avst_wr_data_g.DATABavl_size_5[0] => hmc_inst.I_IAVSTCMDDATA534avl_size_5[1] => hmc_inst.I_IAVSTCMDDATA535avl_size_5[2] => hmc_inst.I_IAVSTCMDDATA536avl_burstbegin_5 => ~NO_FANOUT~avl_rdata_5[0] <= <GND>avl_rdata_valid_5 <= <GND>afi_rst_n[0] <= hmc_inst.O_AFIRSTNafi_cs_n[0] <= hmc_inst.O_AFICSNafi_cs_n[1] <= hmc_inst.O_AFICSN1afi_cke[0] <= hmc_inst.O_AFICKEafi_cke[1] <= hmc_inst.O_AFICKE1afi_odt[0] <= hmc_inst.O_AFIODTafi_odt[1] <= hmc_inst.O_AFIODT1afi_addr[0] <= hmc_inst.O_AFIADDRafi_addr[1] <= hmc_inst.O_AFIADDR1afi_addr[2] <= hmc_inst.O_AFIADDR2afi_addr[3] <= hmc_inst.O_AFIADDR3afi_addr[4] <= hmc_inst.O_AFIADDR4afi_addr[5] <= hmc_inst.O_AFIADDR5afi_addr[6] <= hmc_inst.O_AFIADDR6afi_addr[7] <= hmc_inst.O_AFIADDR7afi_addr[8] <= hmc_inst.O_AFIADDR8afi_addr[9] <= hmc_inst.O_AFIADDR9afi_addr[10] <= hmc_inst.O_AFIADDR10afi_addr[11] <= hmc_inst.O_AFIADDR11afi_addr[12] <= hmc_inst.O_AFIADDR12afi_addr[13] <= hmc_inst.O_AFIADDR13afi_addr[14] <= hmc_inst.O_AFIADDR14afi_addr[15] <= hmc_inst.O_AFIADDR15afi_addr[16] <= hmc_inst.O_AFIADDR16afi_addr[17] <= hmc_inst.O_AFIADDR17afi_addr[18] <= hmc_inst.O_AFIADDR18afi_addr[19] <= hmc_inst.O_AFIADDR19afi_ba[0] <= hmc_inst.O_AFIBAafi_ba[1] <= hmc_inst.O_AFIBA1afi_ba[2] <= hmc_inst.O_AFIBA2afi_ras_n[0] <= hmc_inst.O_AFIRASNafi_cas_n[0] <= hmc_inst.O_AFICASNafi_we_n[0] <= hmc_inst.O_AFIWENafi_dqs_burst[0] <= hmc_inst.O_AFIDQSBURSTafi_dqs_burst[1] <= hmc_inst.O_AFIDQSBURST1afi_dqs_burst[2] <= hmc_inst.O_AFIDQSBURST2afi_dqs_burst[3] <= hmc_inst.O_AFIDQSBURST3afi_dqs_burst[4] <= hmc_inst.O_AFIDQSBURST4afi_wdata_valid[0] <= hmc_inst.O_AFIWDATAVALIDafi_wdata_valid[1] <= hmc_inst.O_AFIWDATAVALID1afi_wdata_valid[2] <= hmc_inst.O_AFIWDATAVALID2afi_wdata_valid[3] <= hmc_inst.O_AFIWDATAVALID3afi_wdata_valid[4] <= hmc_inst.O_AFIWDATAVALID4afi_wdata[0] <= hmc_inst.O_AFIWDATAafi_wdata[1] <= hmc_inst.O_AFIWDATA1afi_wdata[2] <= hmc_inst.O_AFIWDATA2afi_wdata[3] <= hmc_inst.O_AFIWDATA3afi_wdata[4] <= hmc_inst.O_AFIWDATA4afi_wdata[5] <= hmc_inst.O_AFIWDATA5afi_wdata[6] <= hmc_inst.O_AFIWDATA6afi_wdata[7] <= hmc_inst.O_AFIWDATA7afi_wdata[8] <= hmc_inst.O_AFIWDATA8afi_wdata[9] <= hmc_inst.O_AFIWDATA9afi_wdata[10] <= hmc_inst.O_AFIWDATA10afi_wdata[11] <= hmc_inst.O_AFIWDATA11afi_wdata[12] <= hmc_inst.O_AFIWDATA12afi_wdata[13] <= hmc_inst.O_AFIWDATA13afi_wdata[14] <= hmc_inst.O_AFIWDATA14afi_wdata[15] <= hmc_inst.O_AFIWDATA15afi_wdata[16] <= hmc_inst.O_AFIWDATA16afi_wdata[17] <= hmc_inst.O_AFIWDATA17afi_wdata[18] <= hmc_inst.O_AFIWDATA18afi_wdata[19] <= hmc_inst.O_AFIWDATA19afi_wdata[20] <= hmc_inst.O_AFIWDATA20afi_wdata[21] <= hmc_inst.O_AFIWDATA21afi_wdata[22] <= hmc_inst.O_AFIWDATA22afi_wdata[23] <= hmc_inst.O_AFIWDATA23afi_wdata[24] <= hmc_inst.O_AFIWDATA24afi_wdata[25] <= hmc_inst.O_AFIWDATA25afi_wdata[26] <= hmc_inst.O_AFIWDATA26afi_wdata[27] <= hmc_inst.O_AFIWDATA27afi_wdata[28] <= hmc_inst.O_AFIWDATA28afi_wdata[29] <= hmc_inst.O_AFIWDATA29afi_wdata[30] <= hmc_inst.O_AFIWDATA30afi_wdata[31] <= hmc_inst.O_AFIWDATA31afi_wdata[32] <= hmc_inst.O_AFIWDATA32afi_wdata[33] <= hmc_inst.O_AFIWDATA33afi_wdata[34] <= hmc_inst.O_AFIWDATA34afi_wdata[35] <= hmc_inst.O_AFIWDATA35afi_wdata[36] <= hmc_inst.O_AFIWDATA36afi_wdata[37] <= hmc_inst.O_AFIWDATA37afi_wdata[38] <= hmc_inst.O_AFIWDATA38afi_wdata[39] <= hmc_inst.O_AFIWDATA39afi_wdata[40] <= hmc_inst.O_AFIWDATA40afi_wdata[41] <= hmc_inst.O_AFIWDATA41afi_wdata[42] <= hmc_inst.O_AFIWDATA42afi_wdata[43] <= hmc_inst.O_AFIWDATA43afi_wdata[44] <= hmc_inst.O_AFIWDATA44afi_wdata[45] <= hmc_inst.O_AFIWDATA45afi_wdata[46] <= hmc_inst.O_AFIWDATA46afi_wdata[47] <= hmc_inst.O_AFIWDATA47afi_wdata[48] <= hmc_inst.O_AFIWDATA48afi_wdata[49] <= hmc_inst.O_AFIWDATA49afi_wdata[50] <= hmc_inst.O_AFIWDATA50afi_wdata[51] <= hmc_inst.O_AFIWDATA51afi_wdata[52] <= hmc_inst.O_AFIWDATA52afi_wdata[53] <= hmc_inst.O_AFIWDATA53afi_wdata[54] <= hmc_inst.O_AFIWDATA54afi_wdata[55] <= hmc_inst.O_AFIWDATA55afi_wdata[56] <= hmc_inst.O_AFIWDATA56afi_wdata[57] <= hmc_inst.O_AFIWDATA57afi_wdata[58] <= hmc_inst.O_AFIWDATA58afi_wdata[59] <= hmc_inst.O_AFIWDATA59afi_wdata[60] <= hmc_inst.O_AFIWDATA60afi_wdata[61] <= hmc_inst.O_AFIWDATA61afi_wdata[62] <= hmc_inst.O_AFIWDATA62afi_wdata[63] <= hmc_inst.O_AFIWDATA63afi_wdata[64] <= hmc_inst.O_AFIWDATA64afi_wdata[65] <= hmc_inst.O_AFIWDATA65afi_wdata[66] <= hmc_inst.O_AFIWDATA66afi_wdata[67] <= hmc_inst.O_AFIWDATA67afi_wdata[68] <= hmc_inst.O_AFIWDATA68afi_wdata[69] <= hmc_inst.O_AFIWDATA69afi_wdata[70] <= hmc_inst.O_AFIWDATA70afi_wdata[71] <= hmc_inst.O_AFIWDATA71afi_wdata[72] <= hmc_inst.O_AFIWDATA72afi_wdata[73] <= hmc_inst.O_AFIWDATA73afi_wdata[74] <= hmc_inst.O_AFIWDATA74afi_wdata[75] <= hmc_inst.O_AFIWDATA75afi_wdata[76] <= hmc_inst.O_AFIWDATA76afi_wdata[77] <= hmc_inst.O_AFIWDATA77afi_wdata[78] <= hmc_inst.O_AFIWDATA78afi_wdata[79] <= hmc_inst.O_AFIWDATA79afi_dm[0] <= hmc_inst.O_AFIDMafi_dm[1] <= hmc_inst.O_AFIDM1afi_dm[2] <= hmc_inst.O_AFIDM2afi_dm[3] <= hmc_inst.O_AFIDM3afi_dm[4] <= hmc_inst.O_AFIDM4afi_dm[5] <= hmc_inst.O_AFIDM5afi_dm[6] <= hmc_inst.O_AFIDM6afi_dm[7] <= hmc_inst.O_AFIDM7afi_dm[8] <= hmc_inst.O_AFIDM8afi_dm[9] <= hmc_inst.O_AFIDM9afi_wlat[0] => hmc_inst.I_AFIWLATafi_wlat[1] => hmc_inst.I_AFIWLAT1afi_wlat[2] => hmc_inst.I_AFIWLAT2afi_wlat[3] => hmc_inst.I_AFIWLAT3afi_rdata_en[0] <= hmc_inst.O_AFIRDATAENafi_rdata_en[1] <= hmc_inst.O_AFIRDATAEN1afi_rdata_en[2] <= hmc_inst.O_AFIRDATAEN2afi_rdata_en[3] <= hmc_inst.O_AFIRDATAEN3afi_rdata_en[4] <= hmc_inst.O_AFIRDATAEN4afi_rdata_en_full[0] <= hmc_inst.O_AFIRDATAENFULLafi_rdata_en_full[1] <= hmc_inst.O_AFIRDATAENFULL1afi_rdata_en_full[2] <= hmc_inst.O_AFIRDATAENFULL2afi_rdata_en_full[3] <= hmc_inst.O_AFIRDATAENFULL3afi_rdata_en_full[4] <= hmc_inst.O_AFIRDATAENFULL4afi_rdata[0] => hmc_inst.I_AFIRDATAafi_rdata[1] => hmc_inst.I_AFIRDATA1afi_rdata[2] => hmc_inst.I_AFIRDATA2afi_rdata[3] => hmc_inst.I_AFIRDATA3afi_rdata[4] => hmc_inst.I_AFIRDATA4afi_rdata[5] => hmc_inst.I_AFIRDATA5afi_rdata[6] => hmc_inst.I_AFIRDATA6afi_rdata[7] => hmc_inst.I_AFIRDATA7afi_rdata[8] => hmc_inst.I_AFIRDATA8afi_rdata[9] => hmc_inst.I_AFIRDATA9afi_rdata[10] => hmc_inst.I_AFIRDATA10afi_rdata[11] => hmc_inst.I_AFIRDATA11afi_rdata[12] => hmc_inst.I_AFIRDATA12afi_rdata[13] => hmc_inst.I_AFIRDATA13afi_rdata[14] => hmc_inst.I_AFIRDATA14afi_rdata[15] => hmc_inst.I_AFIRDATA15afi_rdata[16] => hmc_inst.I_AFIRDATA16afi_rdata[17] => hmc_inst.I_AFIRDATA17afi_rdata[18] => hmc_inst.I_AFIRDATA18afi_rdata[19] => hmc_inst.I_AFIRDATA19afi_rdata[20] => hmc_inst.I_AFIRDATA20afi_rdata[21] => hmc_inst.I_AFIRDATA21afi_rdata[22] => hmc_inst.I_AFIRDATA22afi_rdata[23] => hmc_inst.I_AFIRDATA23afi_rdata[24] => hmc_inst.I_AFIRDATA24afi_rdata[25] => hmc_inst.I_AFIRDATA25afi_rdata[26] => hmc_inst.I_AFIRDATA26afi_rdata[27] => hmc_inst.I_AFIRDATA27afi_rdata[28] => hmc_inst.I_AFIRDATA28afi_rdata[29] => hmc_inst.I_AFIRDATA29afi_rdata[30] => hmc_inst.I_AFIRDATA30afi_rdata[31] => hmc_inst.I_AFIRDATA31afi_rdata[32] => hmc_inst.I_AFIRDATA32afi_rdata[33] => hmc_inst.I_AFIRDATA33afi_rdata[34] => hmc_inst.I_AFIRDATA34afi_rdata[35] => hmc_inst.I_AFIRDATA35afi_rdata[36] => hmc_inst.I_AFIRDATA36afi_rdata[37] => hmc_inst.I_AFIRDATA37afi_rdata[38] => hmc_inst.I_AFIRDATA38afi_rdata[39] => hmc_inst.I_AFIRDATA39afi_rdata[40] => hmc_inst.I_AFIRDATA40afi_rdata[41] => hmc_inst.I_AFIRDATA41afi_rdata[42] => hmc_inst.I_AFIRDATA42afi_rdata[43] => hmc_inst.I_AFIRDATA43afi_rdata[44] => hmc_inst.I_AFIRDATA44afi_rdata[45] => hmc_inst.I_AFIRDATA45afi_rdata[46] => hmc_inst.I_AFIRDATA46afi_rdata[47] => hmc_inst.I_AFIRDATA47afi_rdata[48] => hmc_inst.I_AFIRDATA48afi_rdata[49] => hmc_inst.I_AFIRDATA49afi_rdata[50] => hmc_inst.I_AFIRDATA50afi_rdata[51] => hmc_inst.I_AFIRDATA51afi_rdata[52] => hmc_inst.I_AFIRDATA52afi_rdata[53] => hmc_inst.I_AFIRDATA53afi_rdata[54] => hmc_inst.I_AFIRDATA54afi_rdata[55] => hmc_inst.I_AFIRDATA55afi_rdata[56] => hmc_inst.I_AFIRDATA56afi_rdata[57] => hmc_inst.I_AFIRDATA57afi_rdata[58] => hmc_inst.I_AFIRDATA58afi_rdata[59] => hmc_inst.I_AFIRDATA59afi_rdata[60] => hmc_inst.I_AFIRDATA60afi_rdata[61] => hmc_inst.I_AFIRDATA61afi_rdata[62] => hmc_inst.I_AFIRDATA62afi_rdata[63] => hmc_inst.I_AFIRDATA63afi_rdata[64] => hmc_inst.I_AFIRDATA64afi_rdata[65] => hmc_inst.I_AFIRDATA65afi_rdata[66] => hmc_inst.I_AFIRDATA66afi_rdata[67] => hmc_inst.I_AFIRDATA67afi_rdata[68] => hmc_inst.I_AFIRDATA68afi_rdata[69] => hmc_inst.I_AFIRDATA69afi_rdata[70] => hmc_inst.I_AFIRDATA70afi_rdata[71] => hmc_inst.I_AFIRDATA71afi_rdata[72] => hmc_inst.I_AFIRDATA72afi_rdata[73] => hmc_inst.I_AFIRDATA73afi_rdata[74] => hmc_inst.I_AFIRDATA74afi_rdata[75] => hmc_inst.I_AFIRDATA75afi_rdata[76] => hmc_inst.I_AFIRDATA76afi_rdata[77] => hmc_inst.I_AFIRDATA77afi_rdata[78] => hmc_inst.I_AFIRDATA78afi_rdata[79] => hmc_inst.I_AFIRDATA79afi_rdata_valid[0] => hmc_inst.I_AFIRDATAVALIDafi_rlat[0] => ~NO_FANOUT~afi_rlat[1] => ~NO_FANOUT~afi_rlat[2] => ~NO_FANOUT~afi_rlat[3] => ~NO_FANOUT~afi_rlat[4] => ~NO_FANOUT~afi_cal_success => hmc_inst.I_CTLCALSUCCESSafi_mem_clk_disable[0] <= hmc_inst.O_CTLMEMCLKDISABLEafi_ctl_refresh_done[0] <= hmc_inst.O_AFICTLREFRESHDONEafi_seq_busy[0] => hmc_inst.I_AFISEQBUSYafi_seq_busy[0] => hmc_inst.I_AFISEQBUSY1afi_ctl_long_idle[0] <= hmc_inst.O_AFICTLLONGIDLEafi_cal_fail => hmc_inst.I_CTLCALFAILafi_cal_req <= hmc_inst.O_CTLCALREQafi_init_req <= <GND>cfg_dramconfig[0] <= hmc_inst.O_DRAMCONFIGcfg_dramconfig[1] <= hmc_inst.O_DRAMCONFIG1cfg_dramconfig[2] <= hmc_inst.O_DRAMCONFIG2cfg_dramconfig[3] <= hmc_inst.O_DRAMCONFIG3cfg_dramconfig[4] <= hmc_inst.O_DRAMCONFIG4cfg_dramconfig[5] <= hmc_inst.O_DRAMCONFIG5cfg_dramconfig[6] <= hmc_inst.O_DRAMCONFIG6cfg_dramconfig[7] <= hmc_inst.O_DRAMCONFIG7cfg_dramconfig[8] <= hmc_inst.O_DRAMCONFIG8cfg_dramconfig[9] <= hmc_inst.O_DRAMCONFIG9cfg_dramconfig[10] <= hmc_inst.O_DRAMCONFIG10cfg_dramconfig[11] <= hmc_inst.O_DRAMCONFIG11cfg_dramconfig[12] <= hmc_inst.O_DRAMCONFIG12cfg_dramconfig[13] <= hmc_inst.O_DRAMCONFIG13cfg_dramconfig[14] <= hmc_inst.O_DRAMCONFIG14cfg_dramconfig[15] <= hmc_inst.O_DRAMCONFIG15cfg_dramconfig[16] <= hmc_inst.O_DRAMCONFIG16cfg_dramconfig[17] <= hmc_inst.O_DRAMCONFIG17cfg_dramconfig[18] <= hmc_inst.O_DRAMCONFIG18cfg_dramconfig[19] <= hmc_inst.O_DRAMCONFIG19cfg_dramconfig[20] <= hmc_inst.O_DRAMCONFIG20cfg_dramconfig[21] <= <GND>cfg_dramconfig[22] <= <GND>cfg_dramconfig[23] <= <GND>cfg_caswrlat[0] <= hmc_inst.O_CFGCASWRLATcfg_caswrlat[1] <= hmc_inst.O_CFGCASWRLAT1cfg_caswrlat[2] <= hmc_inst.O_CFGCASWRLAT2cfg_caswrlat[3] <= hmc_inst.O_CFGCASWRLAT3cfg_caswrlat[4] <= <GND>cfg_caswrlat[5] <= <GND>cfg_caswrlat[6] <= <GND>cfg_caswrlat[7] <= <GND>cfg_addlat[0] <= hmc_inst.O_CFGADDLATcfg_addlat[1] <= hmc_inst.O_CFGADDLAT1cfg_addlat[2] <= hmc_inst.O_CFGADDLAT2cfg_addlat[3] <= hmc_inst.O_CFGADDLAT3cfg_addlat[4] <= hmc_inst.O_CFGADDLAT4cfg_addlat[5] <= <GND>cfg_addlat[6] <= <GND>cfg_addlat[7] <= <GND>cfg_tcl[0] <= hmc_inst.O_CFGTCLcfg_tcl[1] <= hmc_inst.O_CFGTCL1cfg_tcl[2] <= hmc_inst.O_CFGTCL2cfg_tcl[3] <= hmc_inst.O_CFGTCL3cfg_tcl[4] <= hmc_inst.O_CFGTCL4cfg_tcl[5] <= <GND>cfg_tcl[6] <= <GND>cfg_tcl[7] <= <GND>cfg_trfc[0] <= hmc_inst.O_CFGTRFCcfg_trfc[1] <= hmc_inst.O_CFGTRFC1cfg_trfc[2] <= hmc_inst.O_CFGTRFC2cfg_trfc[3] <= hmc_inst.O_CFGTRFC3cfg_trfc[4] <= hmc_inst.O_CFGTRFC4cfg_trfc[5] <= hmc_inst.O_CFGTRFC5cfg_trfc[6] <= hmc_inst.O_CFGTRFC6cfg_trfc[7] <= hmc_inst.O_CFGTRFC7cfg_trefi[0] <= hmc_inst.O_CFGTREFIcfg_trefi[1] <= hmc_inst.O_CFGTREFI1cfg_trefi[2] <= hmc_inst.O_CFGTREFI2cfg_trefi[3] <= hmc_inst.O_CFGTREFI3cfg_trefi[4] <= hmc_inst.O_CFGTREFI4cfg_trefi[5] <= hmc_inst.O_CFGTREFI5cfg_trefi[6] <= hmc_inst.O_CFGTREFI6cfg_trefi[7] <= hmc_inst.O_CFGTREFI7cfg_trefi[8] <= hmc_inst.O_CFGTREFI8cfg_trefi[9] <= hmc_inst.O_CFGTREFI9cfg_trefi[10] <= hmc_inst.O_CFGTREFI10cfg_trefi[11] <= hmc_inst.O_CFGTREFI11cfg_trefi[12] <= hmc_inst.O_CFGTREFI12cfg_trefi[13] <= <GND>cfg_trefi[14] <= <GND>cfg_trefi[15] <= <GND>cfg_twr[0] <= hmc_inst.O_CFGTWRcfg_twr[1] <= hmc_inst.O_CFGTWR1cfg_twr[2] <= hmc_inst.O_CFGTWR2cfg_twr[3] <= hmc_inst.O_CFGTWR3cfg_twr[4] <= <GND>cfg_twr[5] <= <GND>cfg_twr[6] <= <GND>cfg_twr[7] <= <GND>cfg_tmrd[0] <= hmc_inst.O_CFGTMRDcfg_tmrd[1] <= hmc_inst.O_CFGTMRD1cfg_tmrd[2] <= hmc_inst.O_CFGTMRD2cfg_tmrd[3] <= hmc_inst.O_CFGTMRD3cfg_tmrd[4] <= <GND>cfg_tmrd[5] <= <GND>cfg_tmrd[6] <= <GND>cfg_tmrd[7] <= <GND>cfg_coladdrwidth[0] <= hmc_inst.O_CFGCOLADDRWIDTHcfg_coladdrwidth[1] <= hmc_inst.O_CFGCOLADDRWIDTH1cfg_coladdrwidth[2] <= hmc_inst.O_CFGCOLADDRWIDTH2cfg_coladdrwidth[3] <= hmc_inst.O_CFGCOLADDRWIDTH3cfg_coladdrwidth[4] <= hmc_inst.O_CFGCOLADDRWIDTH4cfg_coladdrwidth[5] <= <GND>cfg_coladdrwidth[6] <= <GND>cfg_coladdrwidth[7] <= <GND>cfg_rowaddrwidth[0] <= hmc_inst.O_CFGROWADDRWIDTHcfg_rowaddrwidth[1] <= hmc_inst.O_CFGROWADDRWIDTH1cfg_rowaddrwidth[2] <= hmc_inst.O_CFGROWADDRWIDTH2cfg_rowaddrwidth[3] <= hmc_inst.O_CFGROWADDRWIDTH3cfg_rowaddrwidth[4] <= hmc_inst.O_CFGROWADDRWIDTH4cfg_rowaddrwidth[5] <= <GND>cfg_rowaddrwidth[6] <= <GND>cfg_rowaddrwidth[7] <= <GND>cfg_bankaddrwidth[0] <= hmc_inst.O_CFGBANKADDRWIDTHcfg_bankaddrwidth[1] <= hmc_inst.O_CFGBANKADDRWIDTH1cfg_bankaddrwidth[2] <= hmc_inst.O_CFGBANKADDRWIDTH2cfg_bankaddrwidth[3] <= <GND>cfg_bankaddrwidth[4] <= <GND>cfg_bankaddrwidth[5] <= <GND>cfg_bankaddrwidth[6] <= <GND>cfg_bankaddrwidth[7] <= <GND>cfg_csaddrwidth[0] <= hmc_inst.O_CFGCSADDRWIDTHcfg_csaddrwidth[1] <= hmc_inst.O_CFGCSADDRWIDTH1cfg_csaddrwidth[2] <= hmc_inst.O_CFGCSADDRWIDTH2cfg_csaddrwidth[3] <= <GND>cfg_csaddrwidth[4] <= <GND>cfg_csaddrwidth[5] <= <GND>cfg_csaddrwidth[6] <= <GND>cfg_csaddrwidth[7] <= <GND>cfg_interfacewidth[0] <= hmc_inst.O_CFGINTERFACEWIDTHcfg_interfacewidth[1] <= hmc_inst.O_CFGINTERFACEWIDTH1cfg_interfacewidth[2] <= hmc_inst.O_CFGINTERFACEWIDTH2cfg_interfacewidth[3] <= hmc_inst.O_CFGINTERFACEWIDTH3cfg_interfacewidth[4] <= hmc_inst.O_CFGINTERFACEWIDTH4cfg_interfacewidth[5] <= hmc_inst.O_CFGINTERFACEWIDTH5cfg_interfacewidth[6] <= hmc_inst.O_CFGINTERFACEWIDTH6cfg_interfacewidth[7] <= hmc_inst.O_CFGINTERFACEWIDTH7cfg_devicewidth[0] <= hmc_inst.O_CFGDEVICEWIDTHcfg_devicewidth[1] <= hmc_inst.O_CFGDEVICEWIDTH1cfg_devicewidth[2] <= hmc_inst.O_CFGDEVICEWIDTH2cfg_devicewidth[3] <= hmc_inst.O_CFGDEVICEWIDTH3cfg_devicewidth[4] <= <GND>cfg_devicewidth[5] <= <GND>cfg_devicewidth[6] <= <GND>cfg_devicewidth[7] <= <GND>local_refresh_ack <= hmc_inst.O_LOCALREFRESHACKlocal_powerdn_ack <= hmc_inst.O_LOCALPOWERDOWNACKlocal_self_rfsh_ack <= hmc_inst.O_LOCALSELFRFSHACKlocal_deep_powerdn_ack <= hmc_inst.O_LOCALDEEPPOWERDNACKlocal_refresh_req => hmc_inst.I_LOCALREFRESHREQlocal_refresh_chip[0] => hmc_inst.I_LOCALREFRESHCHIPlocal_refresh_chip[0] => hmc_inst.I_LOCALREFRESHCHIP1local_self_rfsh_req => hmc_inst.I_LOCALSELFRFSHREQlocal_self_rfsh_chip[0] => hmc_inst.I_LOCALSELFRFSHCHIPlocal_self_rfsh_chip[0] => hmc_inst.I_LOCALSELFRFSHCHIP1local_deep_powerdn_req => hmc_inst.I_LOCALDEEPPOWERDNREQlocal_deep_powerdn_chip[0] => hmc_inst.I_LOCALDEEPPOWERDNCHIPlocal_deep_powerdn_chip[0] => hmc_inst.I_LOCALDEEPPOWERDNCHIP1local_multicast => ~NO_FANOUT~local_priority => ~NO_FANOUT~local_init_done <= hmc_inst.O_LOCALINITDONElocal_cal_success <= io_intaficalsuccess.DB_MAX_OUTPUT_PORT_TYPElocal_cal_fail <= io_intaficalfail.DB_MAX_OUTPUT_PORT_TYPEcsr_read_req => hmc_inst.I_MMRREADREQcsr_write_req => hmc_inst.I_MMRWRITEREQcsr_addr[0] => hmc_inst.I_MMRADDRcsr_addr[1] => hmc_inst.I_MMRADDR1csr_addr[2] => hmc_inst.I_MMRADDR2csr_addr[3] => hmc_inst.I_MMRADDR3csr_addr[4] => hmc_inst.I_MMRADDR4csr_addr[5] => hmc_inst.I_MMRADDR5csr_addr[6] => hmc_inst.I_MMRADDR6csr_addr[7] => hmc_inst.I_MMRADDR7csr_addr[8] => hmc_inst.I_MMRADDR8csr_addr[9] => hmc_inst.I_MMRADDR9csr_wdata[0] => hmc_inst.I_MMRWDATAcsr_wdata[1] => hmc_inst.I_MMRWDATA1csr_wdata[2] => hmc_inst.I_MMRWDATA2csr_wdata[3] => hmc_inst.I_MMRWDATA3csr_wdata[4] => hmc_inst.I_MMRWDATA4csr_wdata[5] => hmc_inst.I_MMRWDATA5csr_wdata[6] => hmc_inst.I_MMRWDATA6csr_wdata[7] => hmc_inst.I_MMRWDATA7csr_rdata[0] <= hmc_inst.O_MMRRDATAcsr_rdata[1] <= hmc_inst.O_MMRRDATA1csr_rdata[2] <= hmc_inst.O_MMRRDATA2csr_rdata[3] <= hmc_inst.O_MMRRDATA3csr_rdata[4] <= hmc_inst.O_MMRRDATA4csr_rdata[5] <= hmc_inst.O_MMRRDATA5csr_rdata[6] <= hmc_inst.O_MMRRDATA6csr_rdata[7] <= hmc_inst.O_MMRRDATA7csr_be[0] => hmc_inst.I_MMRBEcsr_rdata_valid <= hmc_inst.O_MMRRDATAVALIDcsr_waitrequest <= hmc_inst.O_MMRWAITREQUESTbonding_out_1[0] <= hmc_inst.O_BONDINGOUT1bonding_out_1[1] <= hmc_inst.O_BONDINGOUT11bonding_out_1[2] <= hmc_inst.O_BONDINGOUT12bonding_out_1[3] <= hmc_inst.O_BONDINGOUT13bonding_in_1[0] => hmc_inst.I_BONDINGIN1bonding_in_1[1] => hmc_inst.I_BONDINGIN11bonding_in_1[2] => hmc_inst.I_BONDINGIN12bonding_in_1[3] => hmc_inst.I_BONDINGIN13bonding_out_2[0] <= hmc_inst.O_BONDINGOUT2bonding_out_2[1] <= hmc_inst.O_BONDINGOUT21bonding_out_2[2] <= hmc_inst.O_BONDINGOUT22bonding_out_2[3] <= hmc_inst.O_BONDINGOUT23bonding_out_2[4] <= hmc_inst.O_BONDINGOUT24bonding_out_2[5] <= hmc_inst.O_BONDINGOUT25bonding_in_2[0] => hmc_inst.I_BONDINGIN2bonding_in_2[1] => hmc_inst.I_BONDINGIN21bonding_in_2[2] => hmc_inst.I_BONDINGIN22bonding_in_2[3] => hmc_inst.I_BONDINGIN23bonding_in_2[4] => hmc_inst.I_BONDINGIN24bonding_in_2[5] => hmc_inst.I_BONDINGIN25bonding_out_3[0] <= hmc_inst.O_BONDINGOUT3bonding_out_3[1] <= hmc_inst.O_BONDINGOUT31bonding_out_3[2] <= hmc_inst.O_BONDINGOUT32bonding_out_3[3] <= hmc_inst.O_BONDINGOUT33bonding_out_3[4] <= hmc_inst.O_BONDINGOUT34bonding_out_3[5] <= hmc_inst.O_BONDINGOUT35bonding_in_3[0] => hmc_inst.I_BONDINGIN3bonding_in_3[1] => hmc_inst.I_BONDINGIN31bonding_in_3[2] => hmc_inst.I_BONDINGIN32bonding_in_3[3] => hmc_inst.I_BONDINGIN33bonding_in_3[4] => hmc_inst.I_BONDINGIN34bonding_in_3[5] => hmc_inst.I_BONDINGIN35io_intaficalfail => local_cal_fail.DATAINctl_init_req <= hmc_inst.O_CTLINITREQlocal_sts_ctl_empty <= hmc_inst.O_LOCALSTSCTLEMPTYio_intaficalsuccess => local_cal_success.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|altera_mem_if_oct_cyclonev:octoct_rzqin => sd1a_0.I_RZQINparallelterminationcontrol[0] <= sd2a_0.O_PARALLELTERMINATIONCONTROLparallelterminationcontrol[1] <= sd2a_0.O_PARALLELTERMINATIONCONTROL1parallelterminationcontrol[2] <= sd2a_0.O_PARALLELTERMINATIONCONTROL2parallelterminationcontrol[3] <= sd2a_0.O_PARALLELTERMINATIONCONTROL3parallelterminationcontrol[4] <= sd2a_0.O_PARALLELTERMINATIONCONTROL4parallelterminationcontrol[5] <= sd2a_0.O_PARALLELTERMINATIONCONTROL5parallelterminationcontrol[6] <= sd2a_0.O_PARALLELTERMINATIONCONTROL6parallelterminationcontrol[7] <= sd2a_0.O_PARALLELTERMINATIONCONTROL7parallelterminationcontrol[8] <= sd2a_0.O_PARALLELTERMINATIONCONTROL8parallelterminationcontrol[9] <= sd2a_0.O_PARALLELTERMINATIONCONTROL9parallelterminationcontrol[10] <= sd2a_0.O_PARALLELTERMINATIONCONTROL10parallelterminationcontrol[11] <= sd2a_0.O_PARALLELTERMINATIONCONTROL11parallelterminationcontrol[12] <= sd2a_0.O_PARALLELTERMINATIONCONTROL12parallelterminationcontrol[13] <= sd2a_0.O_PARALLELTERMINATIONCONTROL13parallelterminationcontrol[14] <= sd2a_0.O_PARALLELTERMINATIONCONTROL14parallelterminationcontrol[15] <= sd2a_0.O_PARALLELTERMINATIONCONTROL15seriesterminationcontrol[0] <= sd2a_0.O_SERIESTERMINATIONCONTROLseriesterminationcontrol[1] <= sd2a_0.O_SERIESTERMINATIONCONTROL1seriesterminationcontrol[2] <= sd2a_0.O_SERIESTERMINATIONCONTROL2seriesterminationcontrol[3] <= sd2a_0.O_SERIESTERMINATIONCONTROL3seriesterminationcontrol[4] <= sd2a_0.O_SERIESTERMINATIONCONTROL4seriesterminationcontrol[5] <= sd2a_0.O_SERIESTERMINATIONCONTROL5seriesterminationcontrol[6] <= sd2a_0.O_SERIESTERMINATIONCONTROL6seriesterminationcontrol[7] <= sd2a_0.O_SERIESTERMINATIONCONTROL7seriesterminationcontrol[8] <= sd2a_0.O_SERIESTERMINATIONCONTROL8seriesterminationcontrol[9] <= sd2a_0.O_SERIESTERMINATIONCONTROL9seriesterminationcontrol[10] <= sd2a_0.O_SERIESTERMINATIONCONTROL10seriesterminationcontrol[11] <= sd2a_0.O_SERIESTERMINATIONCONTROL11seriesterminationcontrol[12] <= sd2a_0.O_SERIESTERMINATIONCONTROL12seriesterminationcontrol[13] <= sd2a_0.O_SERIESTERMINATIONCONTROL13seriesterminationcontrol[14] <= sd2a_0.O_SERIESTERMINATIONCONTROL14seriesterminationcontrol[15] <= sd2a_0.O_SERIESTERMINATIONCONTROL15|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_hps_0:hps_0|ulight_fifo_hps_0_hps_io:hps_io|ulight_fifo_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|altera_mem_if_dll_cyclonev:dllclk => dll_wys_m.CLKdll_pll_locked => dll_wys_m.ALOADdll_delayctrl[0] <= dll_wys_m.DELAYCTRLOUTdll_delayctrl[1] <= dll_wys_m.DELAYCTRLOUT1dll_delayctrl[2] <= dll_wys_m.DELAYCTRLOUT2dll_delayctrl[3] <= dll_wys_m.DELAYCTRLOUT3dll_delayctrl[4] <= dll_wys_m.DELAYCTRLOUT4dll_delayctrl[5] <= dll_wys_m.DELAYCTRLOUT5dll_delayctrl[6] <= dll_wys_m.DELAYCTRLOUT6|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_led_pio_test:led_pio_testaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out[0].CLKclk => data_out[1].CLKclk => data_out[2].CLKclk => data_out[3].CLKclk => data_out[4].CLKreset_n => data_out[0].ACLRreset_n => data_out[1].ACLRreset_n => data_out[2].ACLRreset_n => data_out[3].ACLRreset_n => data_out[4].ACLRwrite_n => always0.IN1writedata[0] => data_out[0].DATAINwritedata[1] => data_out[1].DATAINwritedata[2] => data_out[2].DATAINwritedata[3] => data_out[3].DATAINwritedata[4] => data_out[4].DATAINwritedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port[0] <= data_out[0].DB_MAX_OUTPUT_PORT_TYPEout_port[1] <= data_out[1].DB_MAX_OUTPUT_PORT_TYPEout_port[2] <= data_out[2].DB_MAX_OUTPUT_PORT_TYPEout_port[3] <= data_out[3].DB_MAX_OUTPUT_PORT_TYPEout_port[4] <= data_out[4].DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:link_disableaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:link_startaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0refclk => refclk.IN1rst => rst.IN1outclk_0 <= altera_pll:altera_pll_i.outclklocked <= altera_pll:altera_pll_i.lockedrefclk1 => refclk1.IN1|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_irefclk => refclk.IN1refclk1 => refclk1.IN1fbclk => ~NO_FANOUT~rst => rst.IN1phase_en => ~NO_FANOUT~updn => ~NO_FANOUT~num_phase_shifts[0] => ~NO_FANOUT~num_phase_shifts[1] => ~NO_FANOUT~num_phase_shifts[2] => ~NO_FANOUT~scanclk => scanclk.IN1cntsel[0] => cntsel_temp[0].DATAINcntsel[1] => cntsel_temp[1].DATAINcntsel[2] => cntsel_temp[2].DATAINcntsel[3] => cntsel_temp[3].DATAINcntsel[4] => cntsel_temp[4].DATAINreconfig_to_pll[0] => ~NO_FANOUT~reconfig_to_pll[1] => ~NO_FANOUT~reconfig_to_pll[2] => ~NO_FANOUT~reconfig_to_pll[3] => reconfig_to_pll[3].IN1reconfig_to_pll[4] => ~NO_FANOUT~reconfig_to_pll[5] => ~NO_FANOUT~reconfig_to_pll[6] => ~NO_FANOUT~reconfig_to_pll[7] => ~NO_FANOUT~reconfig_to_pll[8] => ~NO_FANOUT~reconfig_to_pll[9] => ~NO_FANOUT~reconfig_to_pll[10] => ~NO_FANOUT~reconfig_to_pll[11] => ~NO_FANOUT~reconfig_to_pll[12] => ~NO_FANOUT~reconfig_to_pll[13] => ~NO_FANOUT~reconfig_to_pll[14] => ~NO_FANOUT~reconfig_to_pll[15] => ~NO_FANOUT~reconfig_to_pll[16] => ~NO_FANOUT~reconfig_to_pll[17] => ~NO_FANOUT~reconfig_to_pll[18] => ~NO_FANOUT~reconfig_to_pll[19] => ~NO_FANOUT~reconfig_to_pll[20] => ~NO_FANOUT~reconfig_to_pll[21] => ~NO_FANOUT~reconfig_to_pll[22] => ~NO_FANOUT~reconfig_to_pll[23] => ~NO_FANOUT~reconfig_to_pll[24] => ~NO_FANOUT~reconfig_to_pll[25] => ~NO_FANOUT~reconfig_to_pll[26] => ~NO_FANOUT~reconfig_to_pll[27] => ~NO_FANOUT~reconfig_to_pll[28] => ~NO_FANOUT~reconfig_to_pll[29] => ~NO_FANOUT~reconfig_to_pll[30] => ~NO_FANOUT~reconfig_to_pll[31] => ~NO_FANOUT~reconfig_to_pll[32] => ~NO_FANOUT~reconfig_to_pll[33] => ~NO_FANOUT~reconfig_to_pll[34] => ~NO_FANOUT~reconfig_to_pll[35] => ~NO_FANOUT~reconfig_to_pll[36] => ~NO_FANOUT~reconfig_to_pll[37] => ~NO_FANOUT~reconfig_to_pll[38] => ~NO_FANOUT~reconfig_to_pll[39] => ~NO_FANOUT~reconfig_to_pll[40] => ~NO_FANOUT~reconfig_to_pll[41] => ~NO_FANOUT~reconfig_to_pll[42] => ~NO_FANOUT~reconfig_to_pll[43] => ~NO_FANOUT~reconfig_to_pll[44] => ~NO_FANOUT~reconfig_to_pll[45] => ~NO_FANOUT~reconfig_to_pll[46] => ~NO_FANOUT~reconfig_to_pll[47] => ~NO_FANOUT~reconfig_to_pll[48] => ~NO_FANOUT~reconfig_to_pll[49] => ~NO_FANOUT~reconfig_to_pll[50] => ~NO_FANOUT~reconfig_to_pll[51] => ~NO_FANOUT~reconfig_to_pll[52] => ~NO_FANOUT~reconfig_to_pll[53] => ~NO_FANOUT~reconfig_to_pll[54] => ~NO_FANOUT~reconfig_to_pll[55] => ~NO_FANOUT~reconfig_to_pll[56] => ~NO_FANOUT~reconfig_to_pll[57] => ~NO_FANOUT~reconfig_to_pll[58] => ~NO_FANOUT~reconfig_to_pll[59] => ~NO_FANOUT~reconfig_to_pll[60] => ~NO_FANOUT~reconfig_to_pll[61] => ~NO_FANOUT~reconfig_to_pll[62] => ~NO_FANOUT~reconfig_to_pll[63] => ~NO_FANOUT~extswitch => extswitch.IN1adjpllin => adjpllin.IN1cclk => cclk.IN1outclk[0] <= altera_cyclonev_pll:cyclonev_pll.divclkfboutclk <= altera_cyclonev_pll:cyclonev_pll.extclklocked <= altera_cyclonev_pll:cyclonev_pll.lockphase_done <= <GND>reconfig_from_pll[0] <= reconfig_from_pll_wire[0].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[1] <= reconfig_from_pll_wire[1].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[2] <= reconfig_from_pll_wire[2].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[3] <= reconfig_from_pll_wire[3].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[4] <= reconfig_from_pll_wire[4].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[5] <= reconfig_from_pll_wire[5].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[6] <= reconfig_from_pll_wire[6].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[7] <= reconfig_from_pll_wire[7].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[8] <= reconfig_from_pll_wire[8].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[9] <= reconfig_from_pll_wire[9].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[10] <= reconfig_from_pll_wire[10].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[11] <= reconfig_from_pll_wire[11].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[12] <= reconfig_from_pll_wire[12].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[13] <= reconfig_from_pll_wire[13].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[14] <= reconfig_from_pll_wire[14].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[15] <= reconfig_from_pll_wire[15].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[16] <= altera_cyclonev_pll:cyclonev_pll.lockreconfig_from_pll[17] <= reconfig_from_pll_wire[17].DB_MAX_OUTPUT_PORT_TYPEreconfig_from_pll[18] <= <GND>reconfig_from_pll[19] <= <GND>reconfig_from_pll[20] <= <GND>reconfig_from_pll[21] <= <GND>reconfig_from_pll[22] <= <GND>reconfig_from_pll[23] <= <GND>reconfig_from_pll[24] <= <GND>reconfig_from_pll[25] <= <GND>reconfig_from_pll[26] <= <GND>reconfig_from_pll[27] <= <GND>reconfig_from_pll[28] <= <GND>reconfig_from_pll[29] <= <GND>reconfig_from_pll[30] <= <GND>reconfig_from_pll[31] <= <GND>reconfig_from_pll[32] <= <GND>reconfig_from_pll[33] <= <GND>reconfig_from_pll[34] <= <GND>reconfig_from_pll[35] <= <GND>reconfig_from_pll[36] <= <GND>reconfig_from_pll[37] <= <GND>reconfig_from_pll[38] <= <GND>reconfig_from_pll[39] <= <GND>reconfig_from_pll[40] <= <GND>reconfig_from_pll[41] <= <GND>reconfig_from_pll[42] <= <GND>reconfig_from_pll[43] <= <GND>reconfig_from_pll[44] <= <GND>reconfig_from_pll[45] <= <GND>reconfig_from_pll[46] <= <GND>reconfig_from_pll[47] <= <GND>reconfig_from_pll[48] <= <GND>reconfig_from_pll[49] <= <GND>reconfig_from_pll[50] <= <GND>reconfig_from_pll[51] <= <GND>reconfig_from_pll[52] <= <GND>reconfig_from_pll[53] <= <GND>reconfig_from_pll[54] <= <GND>reconfig_from_pll[55] <= <GND>reconfig_from_pll[56] <= <GND>reconfig_from_pll[57] <= <GND>reconfig_from_pll[58] <= <GND>reconfig_from_pll[59] <= <GND>reconfig_from_pll[60] <= <GND>reconfig_from_pll[61] <= <GND>reconfig_from_pll[62] <= <GND>reconfig_from_pll[63] <= <GND>activeclk <= altera_cyclonev_pll:cyclonev_pll.pllclkselclkbad[0] <= altera_cyclonev_pll:cyclonev_pll.clk0badclkbad[1] <= altera_cyclonev_pll:cyclonev_pll.clk1badphout[0] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[1] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[2] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[3] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[4] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[5] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[6] <= altera_cyclonev_pll:cyclonev_pll.phout_0phout[7] <= altera_cyclonev_pll:cyclonev_pll.phout_0lvds_clk[0] <= <GND>lvds_clk[1] <= <GND>loaden[0] <= <GND>loaden[1] <= <GND>extclk_out[0] <= <GND>extclk_out[1] <= <GND>cascade_out[0] <= altera_cyclonev_pll:cyclonev_pll.cascade_outzdbfbclk <> <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|dps_extra_kick:dps_extra_instclk => dps_current_state~1.DATAINreset => dps_current_state.OUTPUTSELECTreset => dps_current_state.OUTPUTSELECTreset => dps_current_state.OUTPUTSELECTreset => dps_current_state.OUTPUTSELECTreset => dps_current_state.OUTPUTSELECTreset => dps_current_state.OUTPUTSELECTphase_done => Selector0.IN1phase_done => int_phase_en.DATABphase_done => dps_next_state.PHASE_DONE_LOW_0.DATABphase_done => dps_next_state.PHASE_DONE_LOW_1.DATABphase_done => dps_next_state.PHASE_DONE_LOW_2.DATABphase_done => dps_next_state.PHASE_DONE_LOW_3.DATABphase_done => dps_next_state.PHASE_DONE_LOW_4.DATABusr_phase_en => phase_en.IN1phase_en <= phase_en.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|dprio_init:dprio_init_instclk => scanen~reg0.CLKclk => atpgmode~reg0.CLKclk => dprio_init_done~reg0.CLKclk => ser_shift_load~reg0.CLKclk => mdio_dis~reg0.CLKclk => count[0].CLKclk => count[1].CLKclk => count[2].CLKclk => count[3].CLKclk => count[4].CLKclk => count[5].CLKclk => count[6].CLKclk => init_done_forever.CLKclk => rst_n[0].CLKclk => rst_n[1].CLKreset_n => dprio_write.IN1reset_n => rst_n[0].ACLRreset_n => rst_n[1].ACLRdprio_address[0] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_address[1] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_address[2] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_address[3] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_address[4] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_address[5] <= dprio_address.DB_MAX_OUTPUT_PORT_TYPEdprio_byteen[0] <= count[6].DB_MAX_OUTPUT_PORT_TYPEdprio_byteen[1] <= count[6].DB_MAX_OUTPUT_PORT_TYPEdprio_write <= dprio_write.DB_MAX_OUTPUT_PORT_TYPEdprio_writedata[0] <= <GND>dprio_writedata[1] <= <GND>dprio_writedata[2] <= <GND>dprio_writedata[3] <= <GND>dprio_writedata[4] <= <GND>dprio_writedata[5] <= <GND>dprio_writedata[6] <= <GND>dprio_writedata[7] <= <GND>dprio_writedata[8] <= <GND>dprio_writedata[9] <= <GND>dprio_writedata[10] <= <GND>dprio_writedata[11] <= <GND>dprio_writedata[12] <= <GND>dprio_writedata[13] <= <GND>dprio_writedata[14] <= <GND>dprio_writedata[15] <= <GND>atpgmode <= atpgmode~reg0.DB_MAX_OUTPUT_PORT_TYPEmdio_dis <= mdio_dis~reg0.DB_MAX_OUTPUT_PORT_TYPEscanen <= scanen~reg0.DB_MAX_OUTPUT_PORT_TYPEser_shift_load <= ser_shift_load~reg0.DB_MAX_OUTPUT_PORT_TYPEdprio_init_done <= dprio_init_done~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_pll_dps_lcell_comb:lcell_cntsel_int_0dataa => lcell_inst.DATAAdatab => lcell_inst.DATABdatac => lcell_inst.DATACdatad => lcell_inst.DATADdatae => lcell_inst.DATAEdataf => lcell_inst.DATAFcombout <= lcell_inst.COMBOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_pll_dps_lcell_comb:lcell_cntsel_int_1dataa => lcell_inst.DATAAdatab => lcell_inst.DATABdatac => lcell_inst.DATACdatad => lcell_inst.DATADdatae => lcell_inst.DATAEdataf => lcell_inst.DATAFcombout <= lcell_inst.COMBOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_pll_dps_lcell_comb:lcell_cntsel_int_2dataa => lcell_inst.DATAAdatab => lcell_inst.DATABdatac => lcell_inst.DATACdatad => lcell_inst.DATADdatae => lcell_inst.DATAEdataf => lcell_inst.DATAFcombout <= lcell_inst.COMBOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_pll_dps_lcell_comb:lcell_cntsel_int_3dataa => lcell_inst.DATAAdatab => lcell_inst.DATABdatac => lcell_inst.DATACdatad => lcell_inst.DATADdatae => lcell_inst.DATAEdataf => lcell_inst.DATAFcombout <= lcell_inst.COMBOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_pll_dps_lcell_comb:lcell_cntsel_int_4dataa => lcell_inst.DATAAdatab => lcell_inst.DATABdatac => lcell_inst.DATACdatad => lcell_inst.DATADdatae => lcell_inst.DATAEdataf => lcell_inst.DATAFcombout <= lcell_inst.COMBOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_cyclonev_pll:cyclonev_pllphout_0[0] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[1] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[2] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[3] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[4] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[5] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[6] <= altera_cyclonev_pll_base:fpll_0.phoutphout_0[7] <= altera_cyclonev_pll_base:fpll_0.phoutadjpllin[0] => adjpllin[0].IN1cclk[0] => cclk[0].IN1coreclkin[0] => coreclkin[0].IN1extswitch[0] => extswitch[0].IN1iqtxrxclkin[0] => iqtxrxclkin[0].IN1plliqclkin[0] => plliqclkin[0].IN1rxiqclkin[0] => rxiqclkin[0].IN1clkin[0] => clkin[0].IN1clkin[1] => clkin[1].IN1clkin[2] => clkin[2].IN1clkin[3] => clkin[3].IN1refiqclk_0[0] => refiqclk_0[0].IN1refiqclk_0[1] => refiqclk_0[1].IN1clk0bad[0] <= altera_cyclonev_pll_base:fpll_0.clk0badclk1bad[0] <= altera_cyclonev_pll_base:fpll_0.clk1badpllclksel[0] <= altera_cyclonev_pll_base:fpll_0.pllclkselatpgmode[0] => atpgmode[0].IN1clk[0] => clk[0].IN1fpllcsrtest[0] => fpllcsrtest[0].IN1iocsrclkin[0] => iocsrclkin[0].IN1iocsrdatain[0] => iocsrdatain[0].IN1iocsren[0] => iocsren[0].IN1iocsrrstn[0] => iocsrrstn[0].IN1mdiodis[0] => mdiodis[0].IN1phaseen[0] => phaseen[0].IN1read[0] => read[0].IN1rstn[0] => rstn[0].IN1scanen[0] => scanen[0].IN1sershiftload[0] => sershiftload[0].IN1shiftdonei[0] => shiftdonei[0].IN1updn[0] => updn[0].IN1write[0] => write[0].IN1addr_0[0] => addr_0[0].IN1addr_0[1] => addr_0[1].IN1addr_0[2] => addr_0[2].IN1addr_0[3] => addr_0[3].IN1addr_0[4] => addr_0[4].IN1addr_0[5] => addr_0[5].IN1byteen_0[0] => byteen_0[0].IN1byteen_0[1] => byteen_0[1].IN1cntsel_0[0] => cntsel_0[0].IN1cntsel_0[1] => cntsel_0[1].IN1cntsel_0[2] => cntsel_0[2].IN1cntsel_0[3] => cntsel_0[3].IN1cntsel_0[4] => cntsel_0[4].IN1din_0[0] => din_0[0].IN1din_0[1] => din_0[1].IN1din_0[2] => din_0[2].IN1din_0[3] => din_0[3].IN1din_0[4] => din_0[4].IN1din_0[5] => din_0[5].IN1din_0[6] => din_0[6].IN1din_0[7] => din_0[7].IN1din_0[8] => din_0[8].IN1din_0[9] => din_0[9].IN1din_0[10] => din_0[10].IN1din_0[11] => din_0[11].IN1din_0[12] => din_0[12].IN1din_0[13] => din_0[13].IN1din_0[14] => din_0[14].IN1din_0[15] => din_0[15].IN1blockselect[0] <= altera_cyclonev_pll_base:fpll_0.blockselectiocsrdataout[0] <= altera_cyclonev_pll_base:fpll_0.iocsrdataoutiocsrenbuf[0] <= altera_cyclonev_pll_base:fpll_0.iocsrenbufiocsrrstnbuf[0] <= altera_cyclonev_pll_base:fpll_0.iocsrrstnbufphasedone[0] <= altera_cyclonev_pll_base:fpll_0.phasedonedout_0[0] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[1] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[2] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[3] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[4] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[5] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[6] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[7] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[8] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[9] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[10] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[11] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[12] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[13] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[14] <= altera_cyclonev_pll_base:fpll_0.doutdout_0[15] <= altera_cyclonev_pll_base:fpll_0.doutdprioout_0[0] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[1] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[2] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[3] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[4] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[5] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[6] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[7] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[8] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[9] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[10] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[11] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[12] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[13] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[14] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[15] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[16] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[17] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[18] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[19] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[20] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[21] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[22] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[23] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[24] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[25] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[26] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[27] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[28] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[29] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[30] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[31] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[32] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[33] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[34] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[35] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[36] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[37] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[38] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[39] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[40] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[41] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[42] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[43] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[44] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[45] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[46] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[47] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[48] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[49] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[50] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[51] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[52] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[53] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[54] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[55] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[56] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[57] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[58] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[59] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[60] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[61] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[62] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[63] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[64] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[65] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[66] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[67] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[68] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[69] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[70] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[71] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[72] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[73] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[74] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[75] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[76] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[77] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[78] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[79] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[80] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[81] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[82] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[83] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[84] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[85] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[86] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[87] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[88] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[89] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[90] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[91] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[92] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[93] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[94] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[95] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[96] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[97] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[98] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[99] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[100] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[101] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[102] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[103] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[104] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[105] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[106] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[107] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[108] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[109] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[110] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[111] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[112] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[113] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[114] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[115] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[116] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[117] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[118] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[119] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[120] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[121] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[122] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[123] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[124] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[125] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[126] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[127] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[128] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[129] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[130] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[131] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[132] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[133] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[134] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[135] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[136] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[137] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[138] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[139] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[140] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[141] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[142] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[143] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[144] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[145] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[146] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[147] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[148] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[149] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[150] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[151] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[152] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[153] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[154] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[155] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[156] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[157] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[158] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[159] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[160] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[161] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[162] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[163] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[164] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[165] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[166] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[167] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[168] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[169] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[170] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[171] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[172] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[173] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[174] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[175] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[176] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[177] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[178] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[179] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[180] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[181] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[182] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[183] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[184] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[185] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[186] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[187] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[188] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[189] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[190] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[191] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[192] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[193] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[194] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[195] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[196] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[197] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[198] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[199] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[200] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[201] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[202] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[203] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[204] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[205] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[206] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[207] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[208] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[209] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[210] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[211] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[212] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[213] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[214] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[215] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[216] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[217] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[218] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[219] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[220] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[221] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[222] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[223] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[224] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[225] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[226] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[227] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[228] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[229] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[230] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[231] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[232] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[233] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[234] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[235] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[236] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[237] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[238] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[239] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[240] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[241] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[242] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[243] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[244] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[245] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[246] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[247] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[248] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[249] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[250] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[251] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[252] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[253] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[254] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[255] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[256] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[257] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[258] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[259] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[260] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[261] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[262] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[263] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[264] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[265] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[266] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[267] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[268] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[269] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[270] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[271] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[272] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[273] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[274] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[275] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[276] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[277] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[278] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[279] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[280] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[281] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[282] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[283] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[284] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[285] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[286] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[287] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[288] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[289] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[290] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[291] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[292] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[293] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[294] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[295] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[296] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[297] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[298] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[299] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[300] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[301] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[302] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[303] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[304] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[305] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[306] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[307] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[308] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[309] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[310] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[311] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[312] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[313] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[314] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[315] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[316] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[317] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[318] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[319] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[320] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[321] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[322] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[323] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[324] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[325] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[326] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[327] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[328] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[329] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[330] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[331] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[332] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[333] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[334] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[335] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[336] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[337] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[338] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[339] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[340] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[341] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[342] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[343] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[344] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[345] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[346] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[347] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[348] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[349] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[350] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[351] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[352] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[353] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[354] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[355] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[356] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[357] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[358] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[359] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[360] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[361] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[362] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[363] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[364] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[365] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[366] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[367] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[368] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[369] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[370] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[371] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[372] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[373] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[374] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[375] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[376] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[377] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[378] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[379] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[380] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[381] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[382] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[383] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[384] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[385] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[386] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[387] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[388] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[389] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[390] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[391] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[392] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[393] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[394] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[395] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[396] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[397] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[398] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[399] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[400] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[401] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[402] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[403] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[404] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[405] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[406] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[407] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[408] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[409] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[410] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[411] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[412] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[413] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[414] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[415] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[416] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[417] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[418] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[419] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[420] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[421] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[422] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[423] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[424] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[425] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[426] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[427] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[428] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[429] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[430] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[431] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[432] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[433] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[434] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[435] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[436] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[437] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[438] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[439] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[440] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[441] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[442] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[443] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[444] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[445] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[446] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[447] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[448] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[449] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[450] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[451] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[452] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[453] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[454] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[455] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[456] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[457] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[458] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[459] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[460] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[461] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[462] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[463] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[464] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[465] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[466] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[467] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[468] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[469] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[470] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[471] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[472] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[473] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[474] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[475] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[476] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[477] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[478] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[479] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[480] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[481] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[482] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[483] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[484] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[485] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[486] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[487] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[488] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[489] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[490] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[491] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[492] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[493] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[494] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[495] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[496] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[497] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[498] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[499] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[500] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[501] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[502] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[503] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[504] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[505] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[506] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[507] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[508] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[509] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[510] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[511] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[512] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[513] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[514] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[515] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[516] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[517] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[518] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[519] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[520] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[521] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[522] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[523] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[524] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[525] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[526] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[527] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[528] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[529] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[530] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[531] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[532] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[533] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[534] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[535] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[536] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[537] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[538] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[539] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[540] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[541] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[542] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[543] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[544] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[545] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[546] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[547] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[548] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[549] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[550] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[551] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[552] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[553] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[554] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[555] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[556] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[557] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[558] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[559] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[560] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[561] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[562] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[563] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[564] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[565] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[566] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[567] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[568] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[569] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[570] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[571] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[572] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[573] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[574] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[575] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[576] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[577] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[578] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[579] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[580] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[581] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[582] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[583] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[584] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[585] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[586] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[587] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[588] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[589] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[590] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[591] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[592] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[593] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[594] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[595] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[596] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[597] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[598] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[599] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[600] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[601] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[602] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[603] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[604] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[605] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[606] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[607] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[608] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[609] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[610] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[611] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[612] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[613] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[614] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[615] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[616] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[617] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[618] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[619] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[620] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[621] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[622] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[623] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[624] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[625] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[626] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[627] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[628] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[629] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[630] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[631] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[632] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[633] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[634] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[635] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[636] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[637] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[638] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[639] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[640] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[641] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[642] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[643] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[644] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[645] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[646] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[647] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[648] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[649] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[650] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[651] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[652] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[653] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[654] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[655] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[656] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[657] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[658] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[659] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[660] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[661] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[662] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[663] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[664] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[665] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[666] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[667] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[668] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[669] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[670] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[671] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[672] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[673] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[674] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[675] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[676] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[677] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[678] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[679] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[680] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[681] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[682] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[683] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[684] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[685] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[686] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[687] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[688] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[689] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[690] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[691] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[692] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[693] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[694] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[695] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[696] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[697] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[698] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[699] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[700] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[701] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[702] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[703] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[704] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[705] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[706] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[707] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[708] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[709] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[710] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[711] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[712] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[713] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[714] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[715] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[716] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[717] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[718] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[719] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[720] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[721] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[722] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[723] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[724] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[725] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[726] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[727] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[728] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[729] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[730] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[731] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[732] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[733] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[734] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[735] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[736] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[737] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[738] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[739] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[740] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[741] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[742] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[743] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[744] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[745] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[746] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[747] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[748] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[749] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[750] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[751] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[752] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[753] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[754] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[755] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[756] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[757] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[758] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[759] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[760] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[761] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[762] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[763] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[764] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[765] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[766] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[767] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[768] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[769] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[770] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[771] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[772] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[773] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[774] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[775] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[776] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[777] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[778] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[779] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[780] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[781] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[782] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[783] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[784] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[785] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[786] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[787] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[788] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[789] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[790] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[791] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[792] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[793] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[794] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[795] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[796] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[797] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[798] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[799] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[800] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[801] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[802] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[803] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[804] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[805] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[806] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[807] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[808] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[809] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[810] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[811] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[812] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[813] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[814] <= altera_cyclonev_pll_base:fpll_0.dpriooutdprioout_0[815] <= altera_cyclonev_pll_base:fpll_0.dpriooutfbclkfpll[0] => fbclkfpll[0].IN1lvdfbin[0] => lvdfbin[0].IN1nresync[0] => nresync[0].IN1pfden[0] => pfden[0].IN1shiften_fpll[0] => shiften_fpll[0].IN1zdb[0] => zdb[0].IN1fblvdsout[0] <= altera_cyclonev_pll_base:fpll_0.fblvdsoutlock[0] <= altera_cyclonev_pll_base:fpll_0.lockmcntout[0] <= altera_cyclonev_pll_base:fpll_0.mcntoutplniotribuf[0] <= altera_cyclonev_pll_base:fpll_0.plniotribufclken[0] => ~NO_FANOUT~clken[-1] => ~NO_FANOUT~extclk[0] <= <GND>extclk[-1] <= <GND>dll_clkin[0] => ~NO_FANOUT~clkout[0] <= <GND>loaden[0] <= <GND>loaden[1] <= <GND>lvdsclk[0] <= <GND>lvdsclk[1] <= <GND>divclk[0] <= counter[0].output_counter.O_DIVCLKcascade_out[0] <= counter[0].output_counter.O_CASCADEOUT|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|altera_cyclonev_pll:cyclonev_pll|altera_cyclonev_pll_base:fpll_0phout[0] <= DPA.O_PHOUTphout[1] <= DPA.O_PHOUT1phout[2] <= DPA.O_PHOUT2phout[3] <= DPA.O_PHOUT3phout[4] <= DPA.O_PHOUT4phout[5] <= DPA.O_PHOUT5phout[6] <= DPA.O_PHOUT6phout[7] <= DPA.O_PHOUT7adjpllin => REFCLK_SELECT.I_ADJPLLINcclk => REFCLK_SELECT.I_CCLKcoreclkin => REFCLK_SELECT.I_CORECLKINextswitch => REFCLK_SELECT.I_EXTSWITCHiqtxrxclkin => REFCLK_SELECT.I_IQTXRXCLKINplliqclkin => REFCLK_SELECT.I_PLLIQCLKINrxiqclkin => REFCLK_SELECT.I_RXIQCLKINclkin[0] => REFCLK_SELECT.I_CLKINclkin[1] => REFCLK_SELECT.I_CLKIN1clkin[2] => REFCLK_SELECT.I_CLKIN2clkin[3] => REFCLK_SELECT.I_CLKIN3refiqclk[0] => REFCLK_SELECT.I_REFIQCLKrefiqclk[1] => REFCLK_SELECT.I_REFIQCLK1clk0bad <= REFCLK_SELECT.O_CLK0BADclk1bad <= REFCLK_SELECT.O_CLK1BADpllclksel <= REFCLK_SELECT.O_PLLCLKSELatpgmode => PLL_RECONFIG.I_ATPGMODEclk => PLL_RECONFIG.I_CLKfpllcsrtest => PLL_RECONFIG.I_FPLLCSRTESTiocsrclkin => PLL_RECONFIG.I_IOCSRCLKINiocsrdatain => PLL_RECONFIG.I_IOCSRDATAINiocsren => PLL_RECONFIG.I_IOCSRENiocsrrstn => PLL_RECONFIG.I_IOCSRRSTNmdiodis => PLL_RECONFIG.I_MDIODISphaseen => PLL_RECONFIG.I_PHASEENread => PLL_RECONFIG.I_READrstn => PLL_RECONFIG.I_RSTNscanen => PLL_RECONFIG.I_SCANENsershiftload => PLL_RECONFIG.I_SERSHIFTLOADshiftdonei => PLL_RECONFIG.I_SHIFTDONEIupdn => PLL_RECONFIG.I_UPDNupdn => fpll.I_ECNC2TESTwrite => PLL_RECONFIG.I_WRITEaddr[0] => PLL_RECONFIG.I_ADDRaddr[1] => PLL_RECONFIG.I_ADDR1addr[2] => PLL_RECONFIG.I_ADDR2addr[3] => PLL_RECONFIG.I_ADDR3addr[4] => PLL_RECONFIG.I_ADDR4addr[5] => PLL_RECONFIG.I_ADDR5byteen[0] => PLL_RECONFIG.I_BYTEENbyteen[1] => PLL_RECONFIG.I_BYTEEN1cntsel[0] => PLL_RECONFIG.I_CNTSELcntsel[1] => PLL_RECONFIG.I_CNTSEL1cntsel[2] => PLL_RECONFIG.I_CNTSEL2cntsel[3] => PLL_RECONFIG.I_CNTSEL3cntsel[4] => PLL_RECONFIG.I_CNTSEL4din[0] => PLL_RECONFIG.DINdin[1] => PLL_RECONFIG.DIN1din[2] => PLL_RECONFIG.DIN2din[3] => PLL_RECONFIG.DIN3din[4] => PLL_RECONFIG.DIN4din[5] => PLL_RECONFIG.DIN5din[6] => PLL_RECONFIG.DIN6din[7] => PLL_RECONFIG.DIN7din[8] => PLL_RECONFIG.DIN8din[9] => PLL_RECONFIG.DIN9din[10] => PLL_RECONFIG.DIN10din[11] => PLL_RECONFIG.DIN11din[12] => PLL_RECONFIG.DIN12din[13] => PLL_RECONFIG.DIN13din[14] => PLL_RECONFIG.DIN14din[15] => PLL_RECONFIG.DIN15blockselect <= PLL_RECONFIG.O_BLOCKSELECTiocsrdataout <= PLL_RECONFIG.O_IOCSRDATAOUTiocsrenbuf <= PLL_RECONFIG.O_IOCSRENBUFiocsrrstnbuf <= PLL_RECONFIG.O_IOCSRRSTNBUFphasedone <= PLL_RECONFIG.O_PHASEDONEshift <= PLL_RECONFIG.O_SHIFTup <= PLL_RECONFIG.O_UPdout[0] <= PLL_RECONFIG.O_DOUTdout[1] <= PLL_RECONFIG.O_DOUT1dout[2] <= PLL_RECONFIG.O_DOUT2dout[3] <= PLL_RECONFIG.O_DOUT3dout[4] <= PLL_RECONFIG.O_DOUT4dout[5] <= PLL_RECONFIG.O_DOUT5dout[6] <= PLL_RECONFIG.O_DOUT6dout[7] <= PLL_RECONFIG.O_DOUT7dout[8] <= PLL_RECONFIG.O_DOUT8dout[9] <= PLL_RECONFIG.O_DOUT9dout[10] <= PLL_RECONFIG.O_DOUT10dout[11] <= PLL_RECONFIG.O_DOUT11dout[12] <= PLL_RECONFIG.O_DOUT12dout[13] <= PLL_RECONFIG.O_DOUT13dout[14] <= PLL_RECONFIG.O_DOUT14dout[15] <= PLL_RECONFIG.O_DOUT15dprioout[0] <= PLL_RECONFIG.O_DPRIOOUTdprioout[1] <= PLL_RECONFIG.O_DPRIOOUT1dprioout[2] <= PLL_RECONFIG.O_DPRIOOUT2dprioout[3] <= PLL_RECONFIG.O_DPRIOOUT3dprioout[4] <= PLL_RECONFIG.O_DPRIOOUT4dprioout[5] <= PLL_RECONFIG.O_DPRIOOUT5dprioout[6] <= PLL_RECONFIG.O_DPRIOOUT6dprioout[7] <= PLL_RECONFIG.O_DPRIOOUT7dprioout[8] <= PLL_RECONFIG.O_DPRIOOUT8dprioout[9] <= PLL_RECONFIG.O_DPRIOOUT9dprioout[10] <= PLL_RECONFIG.O_DPRIOOUT10dprioout[11] <= PLL_RECONFIG.O_DPRIOOUT11dprioout[12] <= PLL_RECONFIG.O_DPRIOOUT12dprioout[13] <= PLL_RECONFIG.O_DPRIOOUT13dprioout[14] <= PLL_RECONFIG.O_DPRIOOUT14dprioout[15] <= PLL_RECONFIG.O_DPRIOOUT15dprioout[16] <= PLL_RECONFIG.O_DPRIOOUT16dprioout[17] <= PLL_RECONFIG.O_DPRIOOUT17dprioout[18] <= PLL_RECONFIG.O_DPRIOOUT18dprioout[19] <= PLL_RECONFIG.O_DPRIOOUT19dprioout[20] <= PLL_RECONFIG.O_DPRIOOUT20dprioout[21] <= PLL_RECONFIG.O_DPRIOOUT21dprioout[22] <= PLL_RECONFIG.O_DPRIOOUT22dprioout[23] <= PLL_RECONFIG.O_DPRIOOUT23dprioout[24] <= PLL_RECONFIG.O_DPRIOOUT24dprioout[25] <= PLL_RECONFIG.O_DPRIOOUT25dprioout[26] <= PLL_RECONFIG.O_DPRIOOUT26dprioout[27] <= PLL_RECONFIG.O_DPRIOOUT27dprioout[28] <= PLL_RECONFIG.O_DPRIOOUT28dprioout[29] <= PLL_RECONFIG.O_DPRIOOUT29dprioout[30] <= PLL_RECONFIG.O_DPRIOOUT30dprioout[31] <= PLL_RECONFIG.O_DPRIOOUT31dprioout[32] <= PLL_RECONFIG.O_DPRIOOUT32dprioout[33] <= PLL_RECONFIG.O_DPRIOOUT33dprioout[34] <= PLL_RECONFIG.O_DPRIOOUT34dprioout[35] <= PLL_RECONFIG.O_DPRIOOUT35dprioout[36] <= PLL_RECONFIG.O_DPRIOOUT36dprioout[37] <= PLL_RECONFIG.O_DPRIOOUT37dprioout[38] <= PLL_RECONFIG.O_DPRIOOUT38dprioout[39] <= PLL_RECONFIG.O_DPRIOOUT39dprioout[40] <= PLL_RECONFIG.O_DPRIOOUT40dprioout[41] <= PLL_RECONFIG.O_DPRIOOUT41dprioout[42] <= PLL_RECONFIG.O_DPRIOOUT42dprioout[43] <= PLL_RECONFIG.O_DPRIOOUT43dprioout[44] <= PLL_RECONFIG.O_DPRIOOUT44dprioout[45] <= PLL_RECONFIG.O_DPRIOOUT45dprioout[46] <= PLL_RECONFIG.O_DPRIOOUT46dprioout[47] <= PLL_RECONFIG.O_DPRIOOUT47dprioout[48] <= PLL_RECONFIG.O_DPRIOOUT48dprioout[49] <= PLL_RECONFIG.O_DPRIOOUT49dprioout[50] <= PLL_RECONFIG.O_DPRIOOUT50dprioout[51] <= PLL_RECONFIG.O_DPRIOOUT51dprioout[52] <= PLL_RECONFIG.O_DPRIOOUT52dprioout[53] <= PLL_RECONFIG.O_DPRIOOUT53dprioout[54] <= PLL_RECONFIG.O_DPRIOOUT54dprioout[55] <= PLL_RECONFIG.O_DPRIOOUT55dprioout[56] <= PLL_RECONFIG.O_DPRIOOUT56dprioout[57] <= PLL_RECONFIG.O_DPRIOOUT57dprioout[58] <= PLL_RECONFIG.O_DPRIOOUT58dprioout[59] <= PLL_RECONFIG.O_DPRIOOUT59dprioout[60] <= PLL_RECONFIG.O_DPRIOOUT60dprioout[61] <= PLL_RECONFIG.O_DPRIOOUT61dprioout[62] <= PLL_RECONFIG.O_DPRIOOUT62dprioout[63] <= PLL_RECONFIG.O_DPRIOOUT63dprioout[64] <= PLL_RECONFIG.O_DPRIOOUT64dprioout[65] <= PLL_RECONFIG.O_DPRIOOUT65dprioout[66] <= PLL_RECONFIG.O_DPRIOOUT66dprioout[67] <= PLL_RECONFIG.O_DPRIOOUT67dprioout[68] <= PLL_RECONFIG.O_DPRIOOUT68dprioout[69] <= PLL_RECONFIG.O_DPRIOOUT69dprioout[70] <= PLL_RECONFIG.O_DPRIOOUT70dprioout[71] <= PLL_RECONFIG.O_DPRIOOUT71dprioout[72] <= PLL_RECONFIG.O_DPRIOOUT72dprioout[73] <= PLL_RECONFIG.O_DPRIOOUT73dprioout[74] <= PLL_RECONFIG.O_DPRIOOUT74dprioout[75] <= PLL_RECONFIG.O_DPRIOOUT75dprioout[76] <= PLL_RECONFIG.O_DPRIOOUT76dprioout[77] <= PLL_RECONFIG.O_DPRIOOUT77dprioout[78] <= PLL_RECONFIG.O_DPRIOOUT78dprioout[79] <= PLL_RECONFIG.O_DPRIOOUT79dprioout[80] <= PLL_RECONFIG.O_DPRIOOUT80dprioout[81] <= PLL_RECONFIG.O_DPRIOOUT81dprioout[82] <= PLL_RECONFIG.O_DPRIOOUT82dprioout[83] <= PLL_RECONFIG.O_DPRIOOUT83dprioout[84] <= PLL_RECONFIG.O_DPRIOOUT84dprioout[85] <= PLL_RECONFIG.O_DPRIOOUT85dprioout[86] <= PLL_RECONFIG.O_DPRIOOUT86dprioout[87] <= PLL_RECONFIG.O_DPRIOOUT87dprioout[88] <= PLL_RECONFIG.O_DPRIOOUT88dprioout[89] <= PLL_RECONFIG.O_DPRIOOUT89dprioout[90] <= PLL_RECONFIG.O_DPRIOOUT90dprioout[91] <= PLL_RECONFIG.O_DPRIOOUT91dprioout[92] <= PLL_RECONFIG.O_DPRIOOUT92dprioout[93] <= PLL_RECONFIG.O_DPRIOOUT93dprioout[94] <= PLL_RECONFIG.O_DPRIOOUT94dprioout[95] <= PLL_RECONFIG.O_DPRIOOUT95dprioout[96] <= PLL_RECONFIG.O_DPRIOOUT96dprioout[97] <= PLL_RECONFIG.O_DPRIOOUT97dprioout[98] <= PLL_RECONFIG.O_DPRIOOUT98dprioout[99] <= PLL_RECONFIG.O_DPRIOOUT99dprioout[100] <= PLL_RECONFIG.O_DPRIOOUT100dprioout[101] <= PLL_RECONFIG.O_DPRIOOUT101dprioout[102] <= PLL_RECONFIG.O_DPRIOOUT102dprioout[103] <= PLL_RECONFIG.O_DPRIOOUT103dprioout[104] <= PLL_RECONFIG.O_DPRIOOUT104dprioout[105] <= PLL_RECONFIG.O_DPRIOOUT105dprioout[106] <= PLL_RECONFIG.O_DPRIOOUT106dprioout[107] <= PLL_RECONFIG.O_DPRIOOUT107dprioout[108] <= PLL_RECONFIG.O_DPRIOOUT108dprioout[109] <= PLL_RECONFIG.O_DPRIOOUT109dprioout[110] <= PLL_RECONFIG.O_DPRIOOUT110dprioout[111] <= PLL_RECONFIG.O_DPRIOOUT111dprioout[112] <= PLL_RECONFIG.O_DPRIOOUT112dprioout[113] <= PLL_RECONFIG.O_DPRIOOUT113dprioout[114] <= PLL_RECONFIG.O_DPRIOOUT114dprioout[115] <= PLL_RECONFIG.O_DPRIOOUT115dprioout[116] <= PLL_RECONFIG.O_DPRIOOUT116dprioout[117] <= PLL_RECONFIG.O_DPRIOOUT117dprioout[118] <= PLL_RECONFIG.O_DPRIOOUT118dprioout[119] <= PLL_RECONFIG.O_DPRIOOUT119dprioout[120] <= PLL_RECONFIG.O_DPRIOOUT120dprioout[121] <= PLL_RECONFIG.O_DPRIOOUT121dprioout[122] <= PLL_RECONFIG.O_DPRIOOUT122dprioout[123] <= PLL_RECONFIG.O_DPRIOOUT123dprioout[124] <= PLL_RECONFIG.O_DPRIOOUT124dprioout[125] <= PLL_RECONFIG.O_DPRIOOUT125dprioout[126] <= PLL_RECONFIG.O_DPRIOOUT126dprioout[127] <= PLL_RECONFIG.O_DPRIOOUT127dprioout[128] <= PLL_RECONFIG.O_DPRIOOUT128dprioout[129] <= PLL_RECONFIG.O_DPRIOOUT129dprioout[130] <= PLL_RECONFIG.O_DPRIOOUT130dprioout[131] <= PLL_RECONFIG.O_DPRIOOUT131dprioout[132] <= PLL_RECONFIG.O_DPRIOOUT132dprioout[133] <= PLL_RECONFIG.O_DPRIOOUT133dprioout[134] <= PLL_RECONFIG.O_DPRIOOUT134dprioout[135] <= PLL_RECONFIG.O_DPRIOOUT135dprioout[136] <= PLL_RECONFIG.O_DPRIOOUT136dprioout[137] <= PLL_RECONFIG.O_DPRIOOUT137dprioout[138] <= PLL_RECONFIG.O_DPRIOOUT138dprioout[139] <= PLL_RECONFIG.O_DPRIOOUT139dprioout[140] <= PLL_RECONFIG.O_DPRIOOUT140dprioout[141] <= PLL_RECONFIG.O_DPRIOOUT141dprioout[142] <= PLL_RECONFIG.O_DPRIOOUT142dprioout[143] <= PLL_RECONFIG.O_DPRIOOUT143dprioout[144] <= PLL_RECONFIG.O_DPRIOOUT144dprioout[145] <= PLL_RECONFIG.O_DPRIOOUT145dprioout[146] <= PLL_RECONFIG.O_DPRIOOUT146dprioout[147] <= PLL_RECONFIG.O_DPRIOOUT147dprioout[148] <= PLL_RECONFIG.O_DPRIOOUT148dprioout[149] <= PLL_RECONFIG.O_DPRIOOUT149dprioout[150] <= PLL_RECONFIG.O_DPRIOOUT150dprioout[151] <= PLL_RECONFIG.O_DPRIOOUT151dprioout[152] <= PLL_RECONFIG.O_DPRIOOUT152dprioout[153] <= PLL_RECONFIG.O_DPRIOOUT153dprioout[154] <= PLL_RECONFIG.O_DPRIOOUT154dprioout[155] <= PLL_RECONFIG.O_DPRIOOUT155dprioout[156] <= PLL_RECONFIG.O_DPRIOOUT156dprioout[157] <= PLL_RECONFIG.O_DPRIOOUT157dprioout[158] <= PLL_RECONFIG.O_DPRIOOUT158dprioout[159] <= PLL_RECONFIG.O_DPRIOOUT159dprioout[160] <= PLL_RECONFIG.O_DPRIOOUT160dprioout[161] <= PLL_RECONFIG.O_DPRIOOUT161dprioout[162] <= PLL_RECONFIG.O_DPRIOOUT162dprioout[163] <= PLL_RECONFIG.O_DPRIOOUT163dprioout[164] <= PLL_RECONFIG.O_DPRIOOUT164dprioout[165] <= PLL_RECONFIG.O_DPRIOOUT165dprioout[166] <= PLL_RECONFIG.O_DPRIOOUT166dprioout[167] <= PLL_RECONFIG.O_DPRIOOUT167dprioout[168] <= PLL_RECONFIG.O_DPRIOOUT168dprioout[169] <= PLL_RECONFIG.O_DPRIOOUT169dprioout[170] <= PLL_RECONFIG.O_DPRIOOUT170dprioout[171] <= PLL_RECONFIG.O_DPRIOOUT171dprioout[172] <= PLL_RECONFIG.O_DPRIOOUT172dprioout[173] <= PLL_RECONFIG.O_DPRIOOUT173dprioout[174] <= PLL_RECONFIG.O_DPRIOOUT174dprioout[175] <= PLL_RECONFIG.O_DPRIOOUT175dprioout[176] <= PLL_RECONFIG.O_DPRIOOUT176dprioout[177] <= PLL_RECONFIG.O_DPRIOOUT177dprioout[178] <= PLL_RECONFIG.O_DPRIOOUT178dprioout[179] <= PLL_RECONFIG.O_DPRIOOUT179dprioout[180] <= PLL_RECONFIG.O_DPRIOOUT180dprioout[181] <= PLL_RECONFIG.O_DPRIOOUT181dprioout[182] <= PLL_RECONFIG.O_DPRIOOUT182dprioout[183] <= PLL_RECONFIG.O_DPRIOOUT183dprioout[184] <= PLL_RECONFIG.O_DPRIOOUT184dprioout[185] <= PLL_RECONFIG.O_DPRIOOUT185dprioout[186] <= PLL_RECONFIG.O_DPRIOOUT186dprioout[187] <= PLL_RECONFIG.O_DPRIOOUT187dprioout[188] <= PLL_RECONFIG.O_DPRIOOUT188dprioout[189] <= PLL_RECONFIG.O_DPRIOOUT189dprioout[190] <= PLL_RECONFIG.O_DPRIOOUT190dprioout[191] <= PLL_RECONFIG.O_DPRIOOUT191dprioout[192] <= PLL_RECONFIG.O_DPRIOOUT192dprioout[193] <= PLL_RECONFIG.O_DPRIOOUT193dprioout[194] <= PLL_RECONFIG.O_DPRIOOUT194dprioout[195] <= PLL_RECONFIG.O_DPRIOOUT195dprioout[196] <= PLL_RECONFIG.O_DPRIOOUT196dprioout[197] <= PLL_RECONFIG.O_DPRIOOUT197dprioout[198] <= PLL_RECONFIG.O_DPRIOOUT198dprioout[199] <= PLL_RECONFIG.O_DPRIOOUT199dprioout[200] <= PLL_RECONFIG.O_DPRIOOUT200dprioout[201] <= PLL_RECONFIG.O_DPRIOOUT201dprioout[202] <= PLL_RECONFIG.O_DPRIOOUT202dprioout[203] <= PLL_RECONFIG.O_DPRIOOUT203dprioout[204] <= PLL_RECONFIG.O_DPRIOOUT204dprioout[205] <= PLL_RECONFIG.O_DPRIOOUT205dprioout[206] <= PLL_RECONFIG.O_DPRIOOUT206dprioout[207] <= PLL_RECONFIG.O_DPRIOOUT207dprioout[208] <= PLL_RECONFIG.O_DPRIOOUT208dprioout[209] <= PLL_RECONFIG.O_DPRIOOUT209dprioout[210] <= PLL_RECONFIG.O_DPRIOOUT210dprioout[211] <= PLL_RECONFIG.O_DPRIOOUT211dprioout[212] <= PLL_RECONFIG.O_DPRIOOUT212dprioout[213] <= PLL_RECONFIG.O_DPRIOOUT213dprioout[214] <= PLL_RECONFIG.O_DPRIOOUT214dprioout[215] <= PLL_RECONFIG.O_DPRIOOUT215dprioout[216] <= PLL_RECONFIG.O_DPRIOOUT216dprioout[217] <= PLL_RECONFIG.O_DPRIOOUT217dprioout[218] <= PLL_RECONFIG.O_DPRIOOUT218dprioout[219] <= PLL_RECONFIG.O_DPRIOOUT219dprioout[220] <= PLL_RECONFIG.O_DPRIOOUT220dprioout[221] <= PLL_RECONFIG.O_DPRIOOUT221dprioout[222] <= PLL_RECONFIG.O_DPRIOOUT222dprioout[223] <= PLL_RECONFIG.O_DPRIOOUT223dprioout[224] <= PLL_RECONFIG.O_DPRIOOUT224dprioout[225] <= PLL_RECONFIG.O_DPRIOOUT225dprioout[226] <= PLL_RECONFIG.O_DPRIOOUT226dprioout[227] <= PLL_RECONFIG.O_DPRIOOUT227dprioout[228] <= PLL_RECONFIG.O_DPRIOOUT228dprioout[229] <= PLL_RECONFIG.O_DPRIOOUT229dprioout[230] <= PLL_RECONFIG.O_DPRIOOUT230dprioout[231] <= PLL_RECONFIG.O_DPRIOOUT231dprioout[232] <= PLL_RECONFIG.O_DPRIOOUT232dprioout[233] <= PLL_RECONFIG.O_DPRIOOUT233dprioout[234] <= PLL_RECONFIG.O_DPRIOOUT234dprioout[235] <= PLL_RECONFIG.O_DPRIOOUT235dprioout[236] <= PLL_RECONFIG.O_DPRIOOUT236dprioout[237] <= PLL_RECONFIG.O_DPRIOOUT237dprioout[238] <= PLL_RECONFIG.O_DPRIOOUT238dprioout[239] <= PLL_RECONFIG.O_DPRIOOUT239dprioout[240] <= PLL_RECONFIG.O_DPRIOOUT240dprioout[241] <= PLL_RECONFIG.O_DPRIOOUT241dprioout[242] <= PLL_RECONFIG.O_DPRIOOUT242dprioout[243] <= PLL_RECONFIG.O_DPRIOOUT243dprioout[244] <= PLL_RECONFIG.O_DPRIOOUT244dprioout[245] <= PLL_RECONFIG.O_DPRIOOUT245dprioout[246] <= PLL_RECONFIG.O_DPRIOOUT246dprioout[247] <= PLL_RECONFIG.O_DPRIOOUT247dprioout[248] <= PLL_RECONFIG.O_DPRIOOUT248dprioout[249] <= PLL_RECONFIG.O_DPRIOOUT249dprioout[250] <= PLL_RECONFIG.O_DPRIOOUT250dprioout[251] <= PLL_RECONFIG.O_DPRIOOUT251dprioout[252] <= PLL_RECONFIG.O_DPRIOOUT252dprioout[253] <= PLL_RECONFIG.O_DPRIOOUT253dprioout[254] <= PLL_RECONFIG.O_DPRIOOUT254dprioout[255] <= PLL_RECONFIG.O_DPRIOOUT255dprioout[256] <= PLL_RECONFIG.O_DPRIOOUT256dprioout[257] <= PLL_RECONFIG.O_DPRIOOUT257dprioout[258] <= PLL_RECONFIG.O_DPRIOOUT258dprioout[259] <= PLL_RECONFIG.O_DPRIOOUT259dprioout[260] <= PLL_RECONFIG.O_DPRIOOUT260dprioout[261] <= PLL_RECONFIG.O_DPRIOOUT261dprioout[262] <= PLL_RECONFIG.O_DPRIOOUT262dprioout[263] <= PLL_RECONFIG.O_DPRIOOUT263dprioout[264] <= PLL_RECONFIG.O_DPRIOOUT264dprioout[265] <= PLL_RECONFIG.O_DPRIOOUT265dprioout[266] <= PLL_RECONFIG.O_DPRIOOUT266dprioout[267] <= PLL_RECONFIG.O_DPRIOOUT267dprioout[268] <= PLL_RECONFIG.O_DPRIOOUT268dprioout[269] <= PLL_RECONFIG.O_DPRIOOUT269dprioout[270] <= PLL_RECONFIG.O_DPRIOOUT270dprioout[271] <= PLL_RECONFIG.O_DPRIOOUT271dprioout[272] <= PLL_RECONFIG.O_DPRIOOUT272dprioout[273] <= PLL_RECONFIG.O_DPRIOOUT273dprioout[274] <= PLL_RECONFIG.O_DPRIOOUT274dprioout[275] <= PLL_RECONFIG.O_DPRIOOUT275dprioout[276] <= PLL_RECONFIG.O_DPRIOOUT276dprioout[277] <= PLL_RECONFIG.O_DPRIOOUT277dprioout[278] <= PLL_RECONFIG.O_DPRIOOUT278dprioout[279] <= PLL_RECONFIG.O_DPRIOOUT279dprioout[280] <= PLL_RECONFIG.O_DPRIOOUT280dprioout[281] <= PLL_RECONFIG.O_DPRIOOUT281dprioout[282] <= PLL_RECONFIG.O_DPRIOOUT282dprioout[283] <= PLL_RECONFIG.O_DPRIOOUT283dprioout[284] <= PLL_RECONFIG.O_DPRIOOUT284dprioout[285] <= PLL_RECONFIG.O_DPRIOOUT285dprioout[286] <= PLL_RECONFIG.O_DPRIOOUT286dprioout[287] <= PLL_RECONFIG.O_DPRIOOUT287dprioout[288] <= PLL_RECONFIG.O_DPRIOOUT288dprioout[289] <= PLL_RECONFIG.O_DPRIOOUT289dprioout[290] <= PLL_RECONFIG.O_DPRIOOUT290dprioout[291] <= PLL_RECONFIG.O_DPRIOOUT291dprioout[292] <= PLL_RECONFIG.O_DPRIOOUT292dprioout[293] <= PLL_RECONFIG.O_DPRIOOUT293dprioout[294] <= PLL_RECONFIG.O_DPRIOOUT294dprioout[295] <= PLL_RECONFIG.O_DPRIOOUT295dprioout[296] <= PLL_RECONFIG.O_DPRIOOUT296dprioout[297] <= PLL_RECONFIG.O_DPRIOOUT297dprioout[298] <= PLL_RECONFIG.O_DPRIOOUT298dprioout[299] <= PLL_RECONFIG.O_DPRIOOUT299dprioout[300] <= PLL_RECONFIG.O_DPRIOOUT300dprioout[301] <= PLL_RECONFIG.O_DPRIOOUT301dprioout[302] <= PLL_RECONFIG.O_DPRIOOUT302dprioout[303] <= PLL_RECONFIG.O_DPRIOOUT303dprioout[304] <= PLL_RECONFIG.O_DPRIOOUT304dprioout[305] <= PLL_RECONFIG.O_DPRIOOUT305dprioout[306] <= PLL_RECONFIG.O_DPRIOOUT306dprioout[307] <= PLL_RECONFIG.O_DPRIOOUT307dprioout[308] <= PLL_RECONFIG.O_DPRIOOUT308dprioout[309] <= PLL_RECONFIG.O_DPRIOOUT309dprioout[310] <= PLL_RECONFIG.O_DPRIOOUT310dprioout[311] <= PLL_RECONFIG.O_DPRIOOUT311dprioout[312] <= PLL_RECONFIG.O_DPRIOOUT312dprioout[313] <= PLL_RECONFIG.O_DPRIOOUT313dprioout[314] <= PLL_RECONFIG.O_DPRIOOUT314dprioout[315] <= PLL_RECONFIG.O_DPRIOOUT315dprioout[316] <= PLL_RECONFIG.O_DPRIOOUT316dprioout[317] <= PLL_RECONFIG.O_DPRIOOUT317dprioout[318] <= PLL_RECONFIG.O_DPRIOOUT318dprioout[319] <= PLL_RECONFIG.O_DPRIOOUT319dprioout[320] <= PLL_RECONFIG.O_DPRIOOUT320dprioout[321] <= PLL_RECONFIG.O_DPRIOOUT321dprioout[322] <= PLL_RECONFIG.O_DPRIOOUT322dprioout[323] <= PLL_RECONFIG.O_DPRIOOUT323dprioout[324] <= PLL_RECONFIG.O_DPRIOOUT324dprioout[325] <= PLL_RECONFIG.O_DPRIOOUT325dprioout[326] <= PLL_RECONFIG.O_DPRIOOUT326dprioout[327] <= PLL_RECONFIG.O_DPRIOOUT327dprioout[328] <= PLL_RECONFIG.O_DPRIOOUT328dprioout[329] <= PLL_RECONFIG.O_DPRIOOUT329dprioout[330] <= PLL_RECONFIG.O_DPRIOOUT330dprioout[331] <= PLL_RECONFIG.O_DPRIOOUT331dprioout[332] <= PLL_RECONFIG.O_DPRIOOUT332dprioout[333] <= PLL_RECONFIG.O_DPRIOOUT333dprioout[334] <= PLL_RECONFIG.O_DPRIOOUT334dprioout[335] <= PLL_RECONFIG.O_DPRIOOUT335dprioout[336] <= PLL_RECONFIG.O_DPRIOOUT336dprioout[337] <= PLL_RECONFIG.O_DPRIOOUT337dprioout[338] <= PLL_RECONFIG.O_DPRIOOUT338dprioout[339] <= PLL_RECONFIG.O_DPRIOOUT339dprioout[340] <= PLL_RECONFIG.O_DPRIOOUT340dprioout[341] <= PLL_RECONFIG.O_DPRIOOUT341dprioout[342] <= PLL_RECONFIG.O_DPRIOOUT342dprioout[343] <= PLL_RECONFIG.O_DPRIOOUT343dprioout[344] <= PLL_RECONFIG.O_DPRIOOUT344dprioout[345] <= PLL_RECONFIG.O_DPRIOOUT345dprioout[346] <= PLL_RECONFIG.O_DPRIOOUT346dprioout[347] <= PLL_RECONFIG.O_DPRIOOUT347dprioout[348] <= PLL_RECONFIG.O_DPRIOOUT348dprioout[349] <= PLL_RECONFIG.O_DPRIOOUT349dprioout[350] <= PLL_RECONFIG.O_DPRIOOUT350dprioout[351] <= PLL_RECONFIG.O_DPRIOOUT351dprioout[352] <= PLL_RECONFIG.O_DPRIOOUT352dprioout[353] <= PLL_RECONFIG.O_DPRIOOUT353dprioout[354] <= PLL_RECONFIG.O_DPRIOOUT354dprioout[355] <= PLL_RECONFIG.O_DPRIOOUT355dprioout[356] <= PLL_RECONFIG.O_DPRIOOUT356dprioout[357] <= PLL_RECONFIG.O_DPRIOOUT357dprioout[358] <= PLL_RECONFIG.O_DPRIOOUT358dprioout[359] <= PLL_RECONFIG.O_DPRIOOUT359dprioout[360] <= PLL_RECONFIG.O_DPRIOOUT360dprioout[361] <= PLL_RECONFIG.O_DPRIOOUT361dprioout[362] <= PLL_RECONFIG.O_DPRIOOUT362dprioout[363] <= PLL_RECONFIG.O_DPRIOOUT363dprioout[364] <= PLL_RECONFIG.O_DPRIOOUT364dprioout[365] <= PLL_RECONFIG.O_DPRIOOUT365dprioout[366] <= PLL_RECONFIG.O_DPRIOOUT366dprioout[367] <= PLL_RECONFIG.O_DPRIOOUT367dprioout[368] <= PLL_RECONFIG.O_DPRIOOUT368dprioout[369] <= PLL_RECONFIG.O_DPRIOOUT369dprioout[370] <= PLL_RECONFIG.O_DPRIOOUT370dprioout[371] <= PLL_RECONFIG.O_DPRIOOUT371dprioout[372] <= PLL_RECONFIG.O_DPRIOOUT372dprioout[373] <= PLL_RECONFIG.O_DPRIOOUT373dprioout[374] <= PLL_RECONFIG.O_DPRIOOUT374dprioout[375] <= PLL_RECONFIG.O_DPRIOOUT375dprioout[376] <= PLL_RECONFIG.O_DPRIOOUT376dprioout[377] <= PLL_RECONFIG.O_DPRIOOUT377dprioout[378] <= PLL_RECONFIG.O_DPRIOOUT378dprioout[379] <= PLL_RECONFIG.O_DPRIOOUT379dprioout[380] <= PLL_RECONFIG.O_DPRIOOUT380dprioout[381] <= PLL_RECONFIG.O_DPRIOOUT381dprioout[382] <= PLL_RECONFIG.O_DPRIOOUT382dprioout[383] <= PLL_RECONFIG.O_DPRIOOUT383dprioout[384] <= PLL_RECONFIG.O_DPRIOOUT384dprioout[385] <= PLL_RECONFIG.O_DPRIOOUT385dprioout[386] <= PLL_RECONFIG.O_DPRIOOUT386dprioout[387] <= PLL_RECONFIG.O_DPRIOOUT387dprioout[388] <= PLL_RECONFIG.O_DPRIOOUT388dprioout[389] <= PLL_RECONFIG.O_DPRIOOUT389dprioout[390] <= PLL_RECONFIG.O_DPRIOOUT390dprioout[391] <= PLL_RECONFIG.O_DPRIOOUT391dprioout[392] <= PLL_RECONFIG.O_DPRIOOUT392dprioout[393] <= PLL_RECONFIG.O_DPRIOOUT393dprioout[394] <= PLL_RECONFIG.O_DPRIOOUT394dprioout[395] <= PLL_RECONFIG.O_DPRIOOUT395dprioout[396] <= PLL_RECONFIG.O_DPRIOOUT396dprioout[397] <= PLL_RECONFIG.O_DPRIOOUT397dprioout[398] <= PLL_RECONFIG.O_DPRIOOUT398dprioout[399] <= PLL_RECONFIG.O_DPRIOOUT399dprioout[400] <= PLL_RECONFIG.O_DPRIOOUT400dprioout[401] <= PLL_RECONFIG.O_DPRIOOUT401dprioout[402] <= PLL_RECONFIG.O_DPRIOOUT402dprioout[403] <= PLL_RECONFIG.O_DPRIOOUT403dprioout[404] <= PLL_RECONFIG.O_DPRIOOUT404dprioout[405] <= PLL_RECONFIG.O_DPRIOOUT405dprioout[406] <= PLL_RECONFIG.O_DPRIOOUT406dprioout[407] <= PLL_RECONFIG.O_DPRIOOUT407dprioout[408] <= PLL_RECONFIG.O_DPRIOOUT408dprioout[409] <= PLL_RECONFIG.O_DPRIOOUT409dprioout[410] <= PLL_RECONFIG.O_DPRIOOUT410dprioout[411] <= PLL_RECONFIG.O_DPRIOOUT411dprioout[412] <= PLL_RECONFIG.O_DPRIOOUT412dprioout[413] <= PLL_RECONFIG.O_DPRIOOUT413dprioout[414] <= PLL_RECONFIG.O_DPRIOOUT414dprioout[415] <= PLL_RECONFIG.O_DPRIOOUT415dprioout[416] <= PLL_RECONFIG.O_DPRIOOUT416dprioout[417] <= PLL_RECONFIG.O_DPRIOOUT417dprioout[418] <= PLL_RECONFIG.O_DPRIOOUT418dprioout[419] <= PLL_RECONFIG.O_DPRIOOUT419dprioout[420] <= PLL_RECONFIG.O_DPRIOOUT420dprioout[421] <= PLL_RECONFIG.O_DPRIOOUT421dprioout[422] <= PLL_RECONFIG.O_DPRIOOUT422dprioout[423] <= PLL_RECONFIG.O_DPRIOOUT423dprioout[424] <= PLL_RECONFIG.O_DPRIOOUT424dprioout[425] <= PLL_RECONFIG.O_DPRIOOUT425dprioout[426] <= PLL_RECONFIG.O_DPRIOOUT426dprioout[427] <= PLL_RECONFIG.O_DPRIOOUT427dprioout[428] <= PLL_RECONFIG.O_DPRIOOUT428dprioout[429] <= PLL_RECONFIG.O_DPRIOOUT429dprioout[430] <= PLL_RECONFIG.O_DPRIOOUT430dprioout[431] <= PLL_RECONFIG.O_DPRIOOUT431dprioout[432] <= PLL_RECONFIG.O_DPRIOOUT432dprioout[433] <= PLL_RECONFIG.O_DPRIOOUT433dprioout[434] <= PLL_RECONFIG.O_DPRIOOUT434dprioout[435] <= PLL_RECONFIG.O_DPRIOOUT435dprioout[436] <= PLL_RECONFIG.O_DPRIOOUT436dprioout[437] <= PLL_RECONFIG.O_DPRIOOUT437dprioout[438] <= PLL_RECONFIG.O_DPRIOOUT438dprioout[439] <= PLL_RECONFIG.O_DPRIOOUT439dprioout[440] <= PLL_RECONFIG.O_DPRIOOUT440dprioout[441] <= PLL_RECONFIG.O_DPRIOOUT441dprioout[442] <= PLL_RECONFIG.O_DPRIOOUT442dprioout[443] <= PLL_RECONFIG.O_DPRIOOUT443dprioout[444] <= PLL_RECONFIG.O_DPRIOOUT444dprioout[445] <= PLL_RECONFIG.O_DPRIOOUT445dprioout[446] <= PLL_RECONFIG.O_DPRIOOUT446dprioout[447] <= PLL_RECONFIG.O_DPRIOOUT447dprioout[448] <= PLL_RECONFIG.O_DPRIOOUT448dprioout[449] <= PLL_RECONFIG.O_DPRIOOUT449dprioout[450] <= PLL_RECONFIG.O_DPRIOOUT450dprioout[451] <= PLL_RECONFIG.O_DPRIOOUT451dprioout[452] <= PLL_RECONFIG.O_DPRIOOUT452dprioout[453] <= PLL_RECONFIG.O_DPRIOOUT453dprioout[454] <= PLL_RECONFIG.O_DPRIOOUT454dprioout[455] <= PLL_RECONFIG.O_DPRIOOUT455dprioout[456] <= PLL_RECONFIG.O_DPRIOOUT456dprioout[457] <= PLL_RECONFIG.O_DPRIOOUT457dprioout[458] <= PLL_RECONFIG.O_DPRIOOUT458dprioout[459] <= PLL_RECONFIG.O_DPRIOOUT459dprioout[460] <= PLL_RECONFIG.O_DPRIOOUT460dprioout[461] <= PLL_RECONFIG.O_DPRIOOUT461dprioout[462] <= PLL_RECONFIG.O_DPRIOOUT462dprioout[463] <= PLL_RECONFIG.O_DPRIOOUT463dprioout[464] <= PLL_RECONFIG.O_DPRIOOUT464dprioout[465] <= PLL_RECONFIG.O_DPRIOOUT465dprioout[466] <= PLL_RECONFIG.O_DPRIOOUT466dprioout[467] <= PLL_RECONFIG.O_DPRIOOUT467dprioout[468] <= PLL_RECONFIG.O_DPRIOOUT468dprioout[469] <= PLL_RECONFIG.O_DPRIOOUT469dprioout[470] <= PLL_RECONFIG.O_DPRIOOUT470dprioout[471] <= PLL_RECONFIG.O_DPRIOOUT471dprioout[472] <= PLL_RECONFIG.O_DPRIOOUT472dprioout[473] <= PLL_RECONFIG.O_DPRIOOUT473dprioout[474] <= PLL_RECONFIG.O_DPRIOOUT474dprioout[475] <= PLL_RECONFIG.O_DPRIOOUT475dprioout[476] <= PLL_RECONFIG.O_DPRIOOUT476dprioout[477] <= PLL_RECONFIG.O_DPRIOOUT477dprioout[478] <= PLL_RECONFIG.O_DPRIOOUT478dprioout[479] <= PLL_RECONFIG.O_DPRIOOUT479dprioout[480] <= PLL_RECONFIG.O_DPRIOOUT480dprioout[481] <= PLL_RECONFIG.O_DPRIOOUT481dprioout[482] <= PLL_RECONFIG.O_DPRIOOUT482dprioout[483] <= PLL_RECONFIG.O_DPRIOOUT483dprioout[484] <= PLL_RECONFIG.O_DPRIOOUT484dprioout[485] <= PLL_RECONFIG.O_DPRIOOUT485dprioout[486] <= PLL_RECONFIG.O_DPRIOOUT486dprioout[487] <= PLL_RECONFIG.O_DPRIOOUT487dprioout[488] <= PLL_RECONFIG.O_DPRIOOUT488dprioout[489] <= PLL_RECONFIG.O_DPRIOOUT489dprioout[490] <= PLL_RECONFIG.O_DPRIOOUT490dprioout[491] <= PLL_RECONFIG.O_DPRIOOUT491dprioout[492] <= PLL_RECONFIG.O_DPRIOOUT492dprioout[493] <= PLL_RECONFIG.O_DPRIOOUT493dprioout[494] <= PLL_RECONFIG.O_DPRIOOUT494dprioout[495] <= PLL_RECONFIG.O_DPRIOOUT495dprioout[496] <= PLL_RECONFIG.O_DPRIOOUT496dprioout[497] <= PLL_RECONFIG.O_DPRIOOUT497dprioout[498] <= PLL_RECONFIG.O_DPRIOOUT498dprioout[499] <= PLL_RECONFIG.O_DPRIOOUT499dprioout[500] <= PLL_RECONFIG.O_DPRIOOUT500dprioout[501] <= PLL_RECONFIG.O_DPRIOOUT501dprioout[502] <= PLL_RECONFIG.O_DPRIOOUT502dprioout[503] <= PLL_RECONFIG.O_DPRIOOUT503dprioout[504] <= PLL_RECONFIG.O_DPRIOOUT504dprioout[505] <= PLL_RECONFIG.O_DPRIOOUT505dprioout[506] <= PLL_RECONFIG.O_DPRIOOUT506dprioout[507] <= PLL_RECONFIG.O_DPRIOOUT507dprioout[508] <= PLL_RECONFIG.O_DPRIOOUT508dprioout[509] <= PLL_RECONFIG.O_DPRIOOUT509dprioout[510] <= PLL_RECONFIG.O_DPRIOOUT510dprioout[511] <= PLL_RECONFIG.O_DPRIOOUT511dprioout[512] <= PLL_RECONFIG.O_DPRIOOUT512dprioout[513] <= PLL_RECONFIG.O_DPRIOOUT513dprioout[514] <= PLL_RECONFIG.O_DPRIOOUT514dprioout[515] <= PLL_RECONFIG.O_DPRIOOUT515dprioout[516] <= PLL_RECONFIG.O_DPRIOOUT516dprioout[517] <= PLL_RECONFIG.O_DPRIOOUT517dprioout[518] <= PLL_RECONFIG.O_DPRIOOUT518dprioout[519] <= PLL_RECONFIG.O_DPRIOOUT519dprioout[520] <= PLL_RECONFIG.O_DPRIOOUT520dprioout[521] <= PLL_RECONFIG.O_DPRIOOUT521dprioout[522] <= PLL_RECONFIG.O_DPRIOOUT522dprioout[523] <= PLL_RECONFIG.O_DPRIOOUT523dprioout[524] <= PLL_RECONFIG.O_DPRIOOUT524dprioout[525] <= PLL_RECONFIG.O_DPRIOOUT525dprioout[526] <= PLL_RECONFIG.O_DPRIOOUT526dprioout[527] <= PLL_RECONFIG.O_DPRIOOUT527dprioout[528] <= PLL_RECONFIG.O_DPRIOOUT528dprioout[529] <= PLL_RECONFIG.O_DPRIOOUT529dprioout[530] <= PLL_RECONFIG.O_DPRIOOUT530dprioout[531] <= PLL_RECONFIG.O_DPRIOOUT531dprioout[532] <= PLL_RECONFIG.O_DPRIOOUT532dprioout[533] <= PLL_RECONFIG.O_DPRIOOUT533dprioout[534] <= PLL_RECONFIG.O_DPRIOOUT534dprioout[535] <= PLL_RECONFIG.O_DPRIOOUT535dprioout[536] <= PLL_RECONFIG.O_DPRIOOUT536dprioout[537] <= PLL_RECONFIG.O_DPRIOOUT537dprioout[538] <= PLL_RECONFIG.O_DPRIOOUT538dprioout[539] <= PLL_RECONFIG.O_DPRIOOUT539dprioout[540] <= PLL_RECONFIG.O_DPRIOOUT540dprioout[541] <= PLL_RECONFIG.O_DPRIOOUT541dprioout[542] <= PLL_RECONFIG.O_DPRIOOUT542dprioout[543] <= PLL_RECONFIG.O_DPRIOOUT543dprioout[544] <= PLL_RECONFIG.O_DPRIOOUT544dprioout[545] <= PLL_RECONFIG.O_DPRIOOUT545dprioout[546] <= PLL_RECONFIG.O_DPRIOOUT546dprioout[547] <= PLL_RECONFIG.O_DPRIOOUT547dprioout[548] <= PLL_RECONFIG.O_DPRIOOUT548dprioout[549] <= PLL_RECONFIG.O_DPRIOOUT549dprioout[550] <= PLL_RECONFIG.O_DPRIOOUT550dprioout[551] <= PLL_RECONFIG.O_DPRIOOUT551dprioout[552] <= PLL_RECONFIG.O_DPRIOOUT552dprioout[553] <= PLL_RECONFIG.O_DPRIOOUT553dprioout[554] <= PLL_RECONFIG.O_DPRIOOUT554dprioout[555] <= PLL_RECONFIG.O_DPRIOOUT555dprioout[556] <= PLL_RECONFIG.O_DPRIOOUT556dprioout[557] <= PLL_RECONFIG.O_DPRIOOUT557dprioout[558] <= PLL_RECONFIG.O_DPRIOOUT558dprioout[559] <= PLL_RECONFIG.O_DPRIOOUT559dprioout[560] <= PLL_RECONFIG.O_DPRIOOUT560dprioout[561] <= PLL_RECONFIG.O_DPRIOOUT561dprioout[562] <= PLL_RECONFIG.O_DPRIOOUT562dprioout[563] <= PLL_RECONFIG.O_DPRIOOUT563dprioout[564] <= PLL_RECONFIG.O_DPRIOOUT564dprioout[565] <= PLL_RECONFIG.O_DPRIOOUT565dprioout[566] <= PLL_RECONFIG.O_DPRIOOUT566dprioout[567] <= PLL_RECONFIG.O_DPRIOOUT567dprioout[568] <= PLL_RECONFIG.O_DPRIOOUT568dprioout[569] <= PLL_RECONFIG.O_DPRIOOUT569dprioout[570] <= PLL_RECONFIG.O_DPRIOOUT570dprioout[571] <= PLL_RECONFIG.O_DPRIOOUT571dprioout[572] <= PLL_RECONFIG.O_DPRIOOUT572dprioout[573] <= PLL_RECONFIG.O_DPRIOOUT573dprioout[574] <= PLL_RECONFIG.O_DPRIOOUT574dprioout[575] <= PLL_RECONFIG.O_DPRIOOUT575dprioout[576] <= PLL_RECONFIG.O_DPRIOOUT576dprioout[577] <= PLL_RECONFIG.O_DPRIOOUT577dprioout[578] <= PLL_RECONFIG.O_DPRIOOUT578dprioout[579] <= PLL_RECONFIG.O_DPRIOOUT579dprioout[580] <= PLL_RECONFIG.O_DPRIOOUT580dprioout[581] <= PLL_RECONFIG.O_DPRIOOUT581dprioout[582] <= PLL_RECONFIG.O_DPRIOOUT582dprioout[583] <= PLL_RECONFIG.O_DPRIOOUT583dprioout[584] <= PLL_RECONFIG.O_DPRIOOUT584dprioout[585] <= PLL_RECONFIG.O_DPRIOOUT585dprioout[586] <= PLL_RECONFIG.O_DPRIOOUT586dprioout[587] <= PLL_RECONFIG.O_DPRIOOUT587dprioout[588] <= PLL_RECONFIG.O_DPRIOOUT588dprioout[589] <= PLL_RECONFIG.O_DPRIOOUT589dprioout[590] <= PLL_RECONFIG.O_DPRIOOUT590dprioout[591] <= PLL_RECONFIG.O_DPRIOOUT591dprioout[592] <= PLL_RECONFIG.O_DPRIOOUT592dprioout[593] <= PLL_RECONFIG.O_DPRIOOUT593dprioout[594] <= PLL_RECONFIG.O_DPRIOOUT594dprioout[595] <= PLL_RECONFIG.O_DPRIOOUT595dprioout[596] <= PLL_RECONFIG.O_DPRIOOUT596dprioout[597] <= PLL_RECONFIG.O_DPRIOOUT597dprioout[598] <= PLL_RECONFIG.O_DPRIOOUT598dprioout[599] <= PLL_RECONFIG.O_DPRIOOUT599dprioout[600] <= PLL_RECONFIG.O_DPRIOOUT600dprioout[601] <= PLL_RECONFIG.O_DPRIOOUT601dprioout[602] <= PLL_RECONFIG.O_DPRIOOUT602dprioout[603] <= PLL_RECONFIG.O_DPRIOOUT603dprioout[604] <= PLL_RECONFIG.O_DPRIOOUT604dprioout[605] <= PLL_RECONFIG.O_DPRIOOUT605dprioout[606] <= PLL_RECONFIG.O_DPRIOOUT606dprioout[607] <= PLL_RECONFIG.O_DPRIOOUT607dprioout[608] <= PLL_RECONFIG.O_DPRIOOUT608dprioout[609] <= PLL_RECONFIG.O_DPRIOOUT609dprioout[610] <= PLL_RECONFIG.O_DPRIOOUT610dprioout[611] <= PLL_RECONFIG.O_DPRIOOUT611dprioout[612] <= PLL_RECONFIG.O_DPRIOOUT612dprioout[613] <= PLL_RECONFIG.O_DPRIOOUT613dprioout[614] <= PLL_RECONFIG.O_DPRIOOUT614dprioout[615] <= PLL_RECONFIG.O_DPRIOOUT615dprioout[616] <= PLL_RECONFIG.O_DPRIOOUT616dprioout[617] <= PLL_RECONFIG.O_DPRIOOUT617dprioout[618] <= PLL_RECONFIG.O_DPRIOOUT618dprioout[619] <= PLL_RECONFIG.O_DPRIOOUT619dprioout[620] <= PLL_RECONFIG.O_DPRIOOUT620dprioout[621] <= PLL_RECONFIG.O_DPRIOOUT621dprioout[622] <= PLL_RECONFIG.O_DPRIOOUT622dprioout[623] <= PLL_RECONFIG.O_DPRIOOUT623dprioout[624] <= PLL_RECONFIG.O_DPRIOOUT624dprioout[625] <= PLL_RECONFIG.O_DPRIOOUT625dprioout[626] <= PLL_RECONFIG.O_DPRIOOUT626dprioout[627] <= PLL_RECONFIG.O_DPRIOOUT627dprioout[628] <= PLL_RECONFIG.O_DPRIOOUT628dprioout[629] <= PLL_RECONFIG.O_DPRIOOUT629dprioout[630] <= PLL_RECONFIG.O_DPRIOOUT630dprioout[631] <= PLL_RECONFIG.O_DPRIOOUT631dprioout[632] <= PLL_RECONFIG.O_DPRIOOUT632dprioout[633] <= PLL_RECONFIG.O_DPRIOOUT633dprioout[634] <= PLL_RECONFIG.O_DPRIOOUT634dprioout[635] <= PLL_RECONFIG.O_DPRIOOUT635dprioout[636] <= PLL_RECONFIG.O_DPRIOOUT636dprioout[637] <= PLL_RECONFIG.O_DPRIOOUT637dprioout[638] <= PLL_RECONFIG.O_DPRIOOUT638dprioout[639] <= PLL_RECONFIG.O_DPRIOOUT639dprioout[640] <= PLL_RECONFIG.O_DPRIOOUT640dprioout[641] <= PLL_RECONFIG.O_DPRIOOUT641dprioout[642] <= PLL_RECONFIG.O_DPRIOOUT642dprioout[643] <= PLL_RECONFIG.O_DPRIOOUT643dprioout[644] <= PLL_RECONFIG.O_DPRIOOUT644dprioout[645] <= PLL_RECONFIG.O_DPRIOOUT645dprioout[646] <= PLL_RECONFIG.O_DPRIOOUT646dprioout[647] <= PLL_RECONFIG.O_DPRIOOUT647dprioout[648] <= PLL_RECONFIG.O_DPRIOOUT648dprioout[649] <= PLL_RECONFIG.O_DPRIOOUT649dprioout[650] <= PLL_RECONFIG.O_DPRIOOUT650dprioout[651] <= PLL_RECONFIG.O_DPRIOOUT651dprioout[652] <= PLL_RECONFIG.O_DPRIOOUT652dprioout[653] <= PLL_RECONFIG.O_DPRIOOUT653dprioout[654] <= PLL_RECONFIG.O_DPRIOOUT654dprioout[655] <= PLL_RECONFIG.O_DPRIOOUT655dprioout[656] <= PLL_RECONFIG.O_DPRIOOUT656dprioout[657] <= PLL_RECONFIG.O_DPRIOOUT657dprioout[658] <= PLL_RECONFIG.O_DPRIOOUT658dprioout[659] <= PLL_RECONFIG.O_DPRIOOUT659dprioout[660] <= PLL_RECONFIG.O_DPRIOOUT660dprioout[661] <= PLL_RECONFIG.O_DPRIOOUT661dprioout[662] <= PLL_RECONFIG.O_DPRIOOUT662dprioout[663] <= PLL_RECONFIG.O_DPRIOOUT663dprioout[664] <= PLL_RECONFIG.O_DPRIOOUT664dprioout[665] <= PLL_RECONFIG.O_DPRIOOUT665dprioout[666] <= PLL_RECONFIG.O_DPRIOOUT666dprioout[667] <= PLL_RECONFIG.O_DPRIOOUT667dprioout[668] <= PLL_RECONFIG.O_DPRIOOUT668dprioout[669] <= PLL_RECONFIG.O_DPRIOOUT669dprioout[670] <= PLL_RECONFIG.O_DPRIOOUT670dprioout[671] <= PLL_RECONFIG.O_DPRIOOUT671dprioout[672] <= PLL_RECONFIG.O_DPRIOOUT672dprioout[673] <= PLL_RECONFIG.O_DPRIOOUT673dprioout[674] <= PLL_RECONFIG.O_DPRIOOUT674dprioout[675] <= PLL_RECONFIG.O_DPRIOOUT675dprioout[676] <= PLL_RECONFIG.O_DPRIOOUT676dprioout[677] <= PLL_RECONFIG.O_DPRIOOUT677dprioout[678] <= PLL_RECONFIG.O_DPRIOOUT678dprioout[679] <= PLL_RECONFIG.O_DPRIOOUT679dprioout[680] <= PLL_RECONFIG.O_DPRIOOUT680dprioout[681] <= PLL_RECONFIG.O_DPRIOOUT681dprioout[682] <= PLL_RECONFIG.O_DPRIOOUT682dprioout[683] <= PLL_RECONFIG.O_DPRIOOUT683dprioout[684] <= PLL_RECONFIG.O_DPRIOOUT684dprioout[685] <= PLL_RECONFIG.O_DPRIOOUT685dprioout[686] <= PLL_RECONFIG.O_DPRIOOUT686dprioout[687] <= PLL_RECONFIG.O_DPRIOOUT687dprioout[688] <= PLL_RECONFIG.O_DPRIOOUT688dprioout[689] <= PLL_RECONFIG.O_DPRIOOUT689dprioout[690] <= PLL_RECONFIG.O_DPRIOOUT690dprioout[691] <= PLL_RECONFIG.O_DPRIOOUT691dprioout[692] <= PLL_RECONFIG.O_DPRIOOUT692dprioout[693] <= PLL_RECONFIG.O_DPRIOOUT693dprioout[694] <= PLL_RECONFIG.O_DPRIOOUT694dprioout[695] <= PLL_RECONFIG.O_DPRIOOUT695dprioout[696] <= PLL_RECONFIG.O_DPRIOOUT696dprioout[697] <= PLL_RECONFIG.O_DPRIOOUT697dprioout[698] <= PLL_RECONFIG.O_DPRIOOUT698dprioout[699] <= PLL_RECONFIG.O_DPRIOOUT699dprioout[700] <= PLL_RECONFIG.O_DPRIOOUT700dprioout[701] <= PLL_RECONFIG.O_DPRIOOUT701dprioout[702] <= PLL_RECONFIG.O_DPRIOOUT702dprioout[703] <= PLL_RECONFIG.O_DPRIOOUT703dprioout[704] <= PLL_RECONFIG.O_DPRIOOUT704dprioout[705] <= PLL_RECONFIG.O_DPRIOOUT705dprioout[706] <= PLL_RECONFIG.O_DPRIOOUT706dprioout[707] <= PLL_RECONFIG.O_DPRIOOUT707dprioout[708] <= PLL_RECONFIG.O_DPRIOOUT708dprioout[709] <= PLL_RECONFIG.O_DPRIOOUT709dprioout[710] <= PLL_RECONFIG.O_DPRIOOUT710dprioout[711] <= PLL_RECONFIG.O_DPRIOOUT711dprioout[712] <= PLL_RECONFIG.O_DPRIOOUT712dprioout[713] <= PLL_RECONFIG.O_DPRIOOUT713dprioout[714] <= PLL_RECONFIG.O_DPRIOOUT714dprioout[715] <= PLL_RECONFIG.O_DPRIOOUT715dprioout[716] <= PLL_RECONFIG.O_DPRIOOUT716dprioout[717] <= PLL_RECONFIG.O_DPRIOOUT717dprioout[718] <= PLL_RECONFIG.O_DPRIOOUT718dprioout[719] <= PLL_RECONFIG.O_DPRIOOUT719dprioout[720] <= PLL_RECONFIG.O_DPRIOOUT720dprioout[721] <= PLL_RECONFIG.O_DPRIOOUT721dprioout[722] <= PLL_RECONFIG.O_DPRIOOUT722dprioout[723] <= PLL_RECONFIG.O_DPRIOOUT723dprioout[724] <= PLL_RECONFIG.O_DPRIOOUT724dprioout[725] <= PLL_RECONFIG.O_DPRIOOUT725dprioout[726] <= PLL_RECONFIG.O_DPRIOOUT726dprioout[727] <= PLL_RECONFIG.O_DPRIOOUT727dprioout[728] <= PLL_RECONFIG.O_DPRIOOUT728dprioout[729] <= PLL_RECONFIG.O_DPRIOOUT729dprioout[730] <= PLL_RECONFIG.O_DPRIOOUT730dprioout[731] <= PLL_RECONFIG.O_DPRIOOUT731dprioout[732] <= PLL_RECONFIG.O_DPRIOOUT732dprioout[733] <= PLL_RECONFIG.O_DPRIOOUT733dprioout[734] <= PLL_RECONFIG.O_DPRIOOUT734dprioout[735] <= PLL_RECONFIG.O_DPRIOOUT735dprioout[736] <= PLL_RECONFIG.O_DPRIOOUT736dprioout[737] <= PLL_RECONFIG.O_DPRIOOUT737dprioout[738] <= PLL_RECONFIG.O_DPRIOOUT738dprioout[739] <= PLL_RECONFIG.O_DPRIOOUT739dprioout[740] <= PLL_RECONFIG.O_DPRIOOUT740dprioout[741] <= PLL_RECONFIG.O_DPRIOOUT741dprioout[742] <= PLL_RECONFIG.O_DPRIOOUT742dprioout[743] <= PLL_RECONFIG.O_DPRIOOUT743dprioout[744] <= PLL_RECONFIG.O_DPRIOOUT744dprioout[745] <= PLL_RECONFIG.O_DPRIOOUT745dprioout[746] <= PLL_RECONFIG.O_DPRIOOUT746dprioout[747] <= PLL_RECONFIG.O_DPRIOOUT747dprioout[748] <= PLL_RECONFIG.O_DPRIOOUT748dprioout[749] <= PLL_RECONFIG.O_DPRIOOUT749dprioout[750] <= PLL_RECONFIG.O_DPRIOOUT750dprioout[751] <= PLL_RECONFIG.O_DPRIOOUT751dprioout[752] <= PLL_RECONFIG.O_DPRIOOUT752dprioout[753] <= PLL_RECONFIG.O_DPRIOOUT753dprioout[754] <= PLL_RECONFIG.O_DPRIOOUT754dprioout[755] <= PLL_RECONFIG.O_DPRIOOUT755dprioout[756] <= PLL_RECONFIG.O_DPRIOOUT756dprioout[757] <= PLL_RECONFIG.O_DPRIOOUT757dprioout[758] <= PLL_RECONFIG.O_DPRIOOUT758dprioout[759] <= PLL_RECONFIG.O_DPRIOOUT759dprioout[760] <= PLL_RECONFIG.O_DPRIOOUT760dprioout[761] <= PLL_RECONFIG.O_DPRIOOUT761dprioout[762] <= PLL_RECONFIG.O_DPRIOOUT762dprioout[763] <= PLL_RECONFIG.O_DPRIOOUT763dprioout[764] <= PLL_RECONFIG.O_DPRIOOUT764dprioout[765] <= PLL_RECONFIG.O_DPRIOOUT765dprioout[766] <= PLL_RECONFIG.O_DPRIOOUT766dprioout[767] <= PLL_RECONFIG.O_DPRIOOUT767dprioout[768] <= PLL_RECONFIG.O_DPRIOOUT768dprioout[769] <= PLL_RECONFIG.O_DPRIOOUT769dprioout[770] <= PLL_RECONFIG.O_DPRIOOUT770dprioout[771] <= PLL_RECONFIG.O_DPRIOOUT771dprioout[772] <= PLL_RECONFIG.O_DPRIOOUT772dprioout[773] <= PLL_RECONFIG.O_DPRIOOUT773dprioout[774] <= PLL_RECONFIG.O_DPRIOOUT774dprioout[775] <= PLL_RECONFIG.O_DPRIOOUT775dprioout[776] <= PLL_RECONFIG.O_DPRIOOUT776dprioout[777] <= PLL_RECONFIG.O_DPRIOOUT777dprioout[778] <= PLL_RECONFIG.O_DPRIOOUT778dprioout[779] <= PLL_RECONFIG.O_DPRIOOUT779dprioout[780] <= PLL_RECONFIG.O_DPRIOOUT780dprioout[781] <= PLL_RECONFIG.O_DPRIOOUT781dprioout[782] <= PLL_RECONFIG.O_DPRIOOUT782dprioout[783] <= PLL_RECONFIG.O_DPRIOOUT783dprioout[784] <= PLL_RECONFIG.O_DPRIOOUT784dprioout[785] <= PLL_RECONFIG.O_DPRIOOUT785dprioout[786] <= PLL_RECONFIG.O_DPRIOOUT786dprioout[787] <= PLL_RECONFIG.O_DPRIOOUT787dprioout[788] <= PLL_RECONFIG.O_DPRIOOUT788dprioout[789] <= PLL_RECONFIG.O_DPRIOOUT789dprioout[790] <= PLL_RECONFIG.O_DPRIOOUT790dprioout[791] <= PLL_RECONFIG.O_DPRIOOUT791dprioout[792] <= PLL_RECONFIG.O_DPRIOOUT792dprioout[793] <= PLL_RECONFIG.O_DPRIOOUT793dprioout[794] <= PLL_RECONFIG.O_DPRIOOUT794dprioout[795] <= PLL_RECONFIG.O_DPRIOOUT795dprioout[796] <= PLL_RECONFIG.O_DPRIOOUT796dprioout[797] <= PLL_RECONFIG.O_DPRIOOUT797dprioout[798] <= PLL_RECONFIG.O_DPRIOOUT798dprioout[799] <= PLL_RECONFIG.O_DPRIOOUT799dprioout[800] <= PLL_RECONFIG.O_DPRIOOUT800dprioout[801] <= PLL_RECONFIG.O_DPRIOOUT801dprioout[802] <= PLL_RECONFIG.O_DPRIOOUT802dprioout[803] <= PLL_RECONFIG.O_DPRIOOUT803dprioout[804] <= PLL_RECONFIG.O_DPRIOOUT804dprioout[805] <= PLL_RECONFIG.O_DPRIOOUT805dprioout[806] <= PLL_RECONFIG.O_DPRIOOUT806dprioout[807] <= PLL_RECONFIG.O_DPRIOOUT807dprioout[808] <= PLL_RECONFIG.O_DPRIOOUT808dprioout[809] <= PLL_RECONFIG.O_DPRIOOUT809dprioout[810] <= PLL_RECONFIG.O_DPRIOOUT810dprioout[811] <= PLL_RECONFIG.O_DPRIOOUT811dprioout[812] <= PLL_RECONFIG.O_DPRIOOUT812dprioout[813] <= PLL_RECONFIG.O_DPRIOOUT813dprioout[814] <= PLL_RECONFIG.O_DPRIOOUT814dprioout[815] <= PLL_RECONFIG.O_DPRIOOUT815shiften[0] <= PLL_RECONFIG.O_SHIFTENshiften[1] <= PLL_RECONFIG.O_SHIFTEN1shiften[2] <= PLL_RECONFIG.O_SHIFTEN2shiften[3] <= PLL_RECONFIG.O_SHIFTEN3shiften[4] <= PLL_RECONFIG.O_SHIFTEN4shiften[5] <= PLL_RECONFIG.O_SHIFTEN5shiften[6] <= PLL_RECONFIG.O_SHIFTEN6shiften[7] <= PLL_RECONFIG.O_SHIFTEN7shiften[8] <= PLL_RECONFIG.O_SHIFTEN8fbclkfpll => fpll.I_FBCLKFPLLlvdfbin => fpll.I_LVDSFBINnresync => fpll.I_NRESYNCpfden => fpll.I_PFDENshiften_input_port => ~NO_FANOUT~zdb => fpll.I_ZDBcntnen <= fpll.O_CNTNENfbout_clk <= fpll.O_FBCLKfblvdsout <= fpll.O_FBLVDSOUTlock <= fpll.O_LOCKmcntout <= fpll.O_MCNTOUTplniotribuf <= fpll.O_PLNIOTRIBUFshiftdoneout <= fpll.O_SHIFTDONEOUTtclk <= fpll.O_TCLKvcoph[0] <= fpll.O_VCOPHvcoph[1] <= fpll.O_VCOPH1vcoph[2] <= fpll.O_VCOPH2vcoph[3] <= fpll.O_VCOPH3vcoph[4] <= fpll.O_VCOPH4vcoph[5] <= fpll.O_VCOPH5vcoph[6] <= fpll.O_VCOPH6vcoph[7] <= fpll.O_VCOPH7|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:timecode_ready_rxaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_timecode_rx:timecode_rxaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port[0] => read_mux_out[0].IN1in_port[1] => read_mux_out[1].IN1in_port[2] => read_mux_out[2].IN1in_port[3] => read_mux_out[3].IN1in_port[4] => read_mux_out[4].IN1in_port[5] => read_mux_out[5].IN1in_port[6] => read_mux_out[6].IN1in_port[7] => read_mux_out[7].IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_timecode_tx_data:timecode_tx_dataaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out[0].CLKclk => data_out[1].CLKclk => data_out[2].CLKclk => data_out[3].CLKclk => data_out[4].CLKclk => data_out[5].CLKclk => data_out[6].CLKclk => data_out[7].CLKreset_n => data_out[0].ACLRreset_n => data_out[1].ACLRreset_n => data_out[2].ACLRreset_n => data_out[3].ACLRreset_n => data_out[4].ACLRreset_n => data_out[5].ACLRreset_n => data_out[6].ACLRreset_n => data_out[7].ACLRwrite_n => always0.IN1writedata[0] => data_out[0].DATAINwritedata[1] => data_out[1].DATAINwritedata[2] => data_out[2].DATAINwritedata[3] => data_out[3].DATAINwritedata[4] => data_out[4].DATAINwritedata[5] => data_out[5].DATAINwritedata[6] => data_out[6].DATAINwritedata[7] => data_out[7].DATAINwritedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port[0] <= data_out[0].DB_MAX_OUTPUT_PORT_TYPEout_port[1] <= data_out[1].DB_MAX_OUTPUT_PORT_TYPEout_port[2] <= data_out[2].DB_MAX_OUTPUT_PORT_TYPEout_port[3] <= data_out[3].DB_MAX_OUTPUT_PORT_TYPEout_port[4] <= data_out[4].DB_MAX_OUTPUT_PORT_TYPEout_port[5] <= data_out[5].DB_MAX_OUTPUT_PORT_TYPEout_port[6] <= data_out[6].DB_MAX_OUTPUT_PORT_TYPEout_port[7] <= data_out[7].DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:timecode_tx_enableaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_fifo_empty_rx_status:timecode_tx_readyaddress[0] => Equal0.IN31address[1] => Equal0.IN30clk => readdata[0]~reg0.CLKclk => readdata[1]~reg0.CLKclk => readdata[2]~reg0.CLKclk => readdata[3]~reg0.CLKclk => readdata[4]~reg0.CLKclk => readdata[5]~reg0.CLKclk => readdata[6]~reg0.CLKclk => readdata[7]~reg0.CLKclk => readdata[8]~reg0.CLKclk => readdata[9]~reg0.CLKclk => readdata[10]~reg0.CLKclk => readdata[11]~reg0.CLKclk => readdata[12]~reg0.CLKclk => readdata[13]~reg0.CLKclk => readdata[14]~reg0.CLKclk => readdata[15]~reg0.CLKclk => readdata[16]~reg0.CLKclk => readdata[17]~reg0.CLKclk => readdata[18]~reg0.CLKclk => readdata[19]~reg0.CLKclk => readdata[20]~reg0.CLKclk => readdata[21]~reg0.CLKclk => readdata[22]~reg0.CLKclk => readdata[23]~reg0.CLKclk => readdata[24]~reg0.CLKclk => readdata[25]~reg0.CLKclk => readdata[26]~reg0.CLKclk => readdata[27]~reg0.CLKclk => readdata[28]~reg0.CLKclk => readdata[29]~reg0.CLKclk => readdata[30]~reg0.CLKclk => readdata[31]~reg0.CLKin_port => read_mux_out.IN1reset_n => readdata[0]~reg0.ACLRreset_n => readdata[1]~reg0.ACLRreset_n => readdata[2]~reg0.ACLRreset_n => readdata[3]~reg0.ACLRreset_n => readdata[4]~reg0.ACLRreset_n => readdata[5]~reg0.ACLRreset_n => readdata[6]~reg0.ACLRreset_n => readdata[7]~reg0.ACLRreset_n => readdata[8]~reg0.ACLRreset_n => readdata[9]~reg0.ACLRreset_n => readdata[10]~reg0.ACLRreset_n => readdata[11]~reg0.ACLRreset_n => readdata[12]~reg0.ACLRreset_n => readdata[13]~reg0.ACLRreset_n => readdata[14]~reg0.ACLRreset_n => readdata[15]~reg0.ACLRreset_n => readdata[16]~reg0.ACLRreset_n => readdata[17]~reg0.ACLRreset_n => readdata[18]~reg0.ACLRreset_n => readdata[19]~reg0.ACLRreset_n => readdata[20]~reg0.ACLRreset_n => readdata[21]~reg0.ACLRreset_n => readdata[22]~reg0.ACLRreset_n => readdata[23]~reg0.ACLRreset_n => readdata[24]~reg0.ACLRreset_n => readdata[25]~reg0.ACLRreset_n => readdata[26]~reg0.ACLRreset_n => readdata[27]~reg0.ACLRreset_n => readdata[28]~reg0.ACLRreset_n => readdata[29]~reg0.ACLRreset_n => readdata[30]~reg0.ACLRreset_n => readdata[31]~reg0.ACLRreaddata[0] <= readdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= readdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= readdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= readdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= readdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= readdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= readdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= readdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= readdata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= readdata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[10] <= readdata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[11] <= readdata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[12] <= readdata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[13] <= readdata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[14] <= readdata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[15] <= readdata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[16] <= readdata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[17] <= readdata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[18] <= readdata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[19] <= readdata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[20] <= readdata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[21] <= readdata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[22] <= readdata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[23] <= readdata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[24] <= readdata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[25] <= readdata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[26] <= readdata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[27] <= readdata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[28] <= readdata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[29] <= readdata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[30] <= readdata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPEreaddata[31] <= readdata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_write_data_fifo_tx:write_data_fifo_txaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out[0].CLKclk => data_out[1].CLKclk => data_out[2].CLKclk => data_out[3].CLKclk => data_out[4].CLKclk => data_out[5].CLKclk => data_out[6].CLKclk => data_out[7].CLKclk => data_out[8].CLKreset_n => data_out[0].ACLRreset_n => data_out[1].ACLRreset_n => data_out[2].ACLRreset_n => data_out[3].ACLRreset_n => data_out[4].ACLRreset_n => data_out[5].ACLRreset_n => data_out[6].ACLRreset_n => data_out[7].ACLRreset_n => data_out[8].ACLRwrite_n => always0.IN1writedata[0] => data_out[0].DATAINwritedata[1] => data_out[1].DATAINwritedata[2] => data_out[2].DATAINwritedata[3] => data_out[3].DATAINwritedata[4] => data_out[4].DATAINwritedata[5] => data_out[5].DATAINwritedata[6] => data_out[6].DATAINwritedata[7] => data_out[7].DATAINwritedata[8] => data_out[8].DATAINwritedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port[0] <= data_out[0].DB_MAX_OUTPUT_PORT_TYPEout_port[1] <= data_out[1].DB_MAX_OUTPUT_PORT_TYPEout_port[2] <= data_out[2].DB_MAX_OUTPUT_PORT_TYPEout_port[3] <= data_out[3].DB_MAX_OUTPUT_PORT_TYPEout_port[4] <= data_out[4].DB_MAX_OUTPUT_PORT_TYPEout_port[5] <= data_out[5].DB_MAX_OUTPUT_PORT_TYPEout_port[6] <= data_out[6].DB_MAX_OUTPUT_PORT_TYPEout_port[7] <= data_out[7].DB_MAX_OUTPUT_PORT_TYPEout_port[8] <= data_out[8].DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[2] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[3] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[4] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[5] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[6] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[7] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[8] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_auto_start:write_en_txaddress[0] => Equal0.IN31address[1] => Equal0.IN30chipselect => always0.IN0clk => data_out.CLKreset_n => data_out.ACLRwrite_n => always0.IN1writedata[0] => data_out.DATAINwritedata[1] => ~NO_FANOUT~writedata[2] => ~NO_FANOUT~writedata[3] => ~NO_FANOUT~writedata[4] => ~NO_FANOUT~writedata[5] => ~NO_FANOUT~writedata[6] => ~NO_FANOUT~writedata[7] => ~NO_FANOUT~writedata[8] => ~NO_FANOUT~writedata[9] => ~NO_FANOUT~writedata[10] => ~NO_FANOUT~writedata[11] => ~NO_FANOUT~writedata[12] => ~NO_FANOUT~writedata[13] => ~NO_FANOUT~writedata[14] => ~NO_FANOUT~writedata[15] => ~NO_FANOUT~writedata[16] => ~NO_FANOUT~writedata[17] => ~NO_FANOUT~writedata[18] => ~NO_FANOUT~writedata[19] => ~NO_FANOUT~writedata[20] => ~NO_FANOUT~writedata[21] => ~NO_FANOUT~writedata[22] => ~NO_FANOUT~writedata[23] => ~NO_FANOUT~writedata[24] => ~NO_FANOUT~writedata[25] => ~NO_FANOUT~writedata[26] => ~NO_FANOUT~writedata[27] => ~NO_FANOUT~writedata[28] => ~NO_FANOUT~writedata[29] => ~NO_FANOUT~writedata[30] => ~NO_FANOUT~writedata[31] => ~NO_FANOUT~out_port <= data_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[0] <= read_mux_out.DB_MAX_OUTPUT_PORT_TYPEreaddata[1] <= <GND>readdata[2] <= <GND>readdata[3] <= <GND>readdata[4] <= <GND>readdata[5] <= <GND>readdata[6] <= <GND>readdata[7] <= <GND>readdata[8] <= <GND>readdata[9] <= <GND>readdata[10] <= <GND>readdata[11] <= <GND>readdata[12] <= <GND>readdata[13] <= <GND>readdata[14] <= <GND>readdata[15] <= <GND>readdata[16] <= <GND>readdata[17] <= <GND>readdata[18] <= <GND>readdata[19] <= <GND>readdata[20] <= <GND>readdata[21] <= <GND>readdata[22] <= <GND>readdata[23] <= <GND>readdata[24] <= <GND>readdata[25] <= <GND>readdata[26] <= <GND>readdata[27] <= <GND>readdata[28] <= <GND>readdata[29] <= <GND>readdata[30] <= <GND>readdata[31] <= <GND>|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0hps_0_h2f_axi_master_awid[0] => hps_0_h2f_axi_master_awid[0].IN1hps_0_h2f_axi_master_awid[1] => hps_0_h2f_axi_master_awid[1].IN1hps_0_h2f_axi_master_awid[2] => hps_0_h2f_axi_master_awid[2].IN1hps_0_h2f_axi_master_awid[3] => hps_0_h2f_axi_master_awid[3].IN1hps_0_h2f_axi_master_awid[4] => hps_0_h2f_axi_master_awid[4].IN1hps_0_h2f_axi_master_awid[5] => hps_0_h2f_axi_master_awid[5].IN1hps_0_h2f_axi_master_awid[6] => hps_0_h2f_axi_master_awid[6].IN1hps_0_h2f_axi_master_awid[7] => hps_0_h2f_axi_master_awid[7].IN1hps_0_h2f_axi_master_awid[8] => hps_0_h2f_axi_master_awid[8].IN1hps_0_h2f_axi_master_awid[9] => hps_0_h2f_axi_master_awid[9].IN1hps_0_h2f_axi_master_awid[10] => hps_0_h2f_axi_master_awid[10].IN1hps_0_h2f_axi_master_awid[11] => hps_0_h2f_axi_master_awid[11].IN1hps_0_h2f_axi_master_awaddr[0] => hps_0_h2f_axi_master_awaddr[0].IN1hps_0_h2f_axi_master_awaddr[1] => hps_0_h2f_axi_master_awaddr[1].IN1hps_0_h2f_axi_master_awaddr[2] => hps_0_h2f_axi_master_awaddr[2].IN1hps_0_h2f_axi_master_awaddr[3] => hps_0_h2f_axi_master_awaddr[3].IN1hps_0_h2f_axi_master_awaddr[4] => hps_0_h2f_axi_master_awaddr[4].IN1hps_0_h2f_axi_master_awaddr[5] => hps_0_h2f_axi_master_awaddr[5].IN1hps_0_h2f_axi_master_awaddr[6] => hps_0_h2f_axi_master_awaddr[6].IN1hps_0_h2f_axi_master_awaddr[7] => hps_0_h2f_axi_master_awaddr[7].IN1hps_0_h2f_axi_master_awaddr[8] => hps_0_h2f_axi_master_awaddr[8].IN1hps_0_h2f_axi_master_awaddr[9] => hps_0_h2f_axi_master_awaddr[9].IN1hps_0_h2f_axi_master_awaddr[10] => hps_0_h2f_axi_master_awaddr[10].IN1hps_0_h2f_axi_master_awaddr[11] => hps_0_h2f_axi_master_awaddr[11].IN1hps_0_h2f_axi_master_awaddr[12] => hps_0_h2f_axi_master_awaddr[12].IN1hps_0_h2f_axi_master_awaddr[13] => hps_0_h2f_axi_master_awaddr[13].IN1hps_0_h2f_axi_master_awaddr[14] => hps_0_h2f_axi_master_awaddr[14].IN1hps_0_h2f_axi_master_awaddr[15] => hps_0_h2f_axi_master_awaddr[15].IN1hps_0_h2f_axi_master_awaddr[16] => hps_0_h2f_axi_master_awaddr[16].IN1hps_0_h2f_axi_master_awaddr[17] => hps_0_h2f_axi_master_awaddr[17].IN1hps_0_h2f_axi_master_awaddr[18] => hps_0_h2f_axi_master_awaddr[18].IN1hps_0_h2f_axi_master_awaddr[19] => hps_0_h2f_axi_master_awaddr[19].IN1hps_0_h2f_axi_master_awaddr[20] => hps_0_h2f_axi_master_awaddr[20].IN1hps_0_h2f_axi_master_awaddr[21] => hps_0_h2f_axi_master_awaddr[21].IN1hps_0_h2f_axi_master_awaddr[22] => hps_0_h2f_axi_master_awaddr[22].IN1hps_0_h2f_axi_master_awaddr[23] => hps_0_h2f_axi_master_awaddr[23].IN1hps_0_h2f_axi_master_awaddr[24] => hps_0_h2f_axi_master_awaddr[24].IN1hps_0_h2f_axi_master_awaddr[25] => hps_0_h2f_axi_master_awaddr[25].IN1hps_0_h2f_axi_master_awaddr[26] => hps_0_h2f_axi_master_awaddr[26].IN1hps_0_h2f_axi_master_awaddr[27] => hps_0_h2f_axi_master_awaddr[27].IN1hps_0_h2f_axi_master_awaddr[28] => hps_0_h2f_axi_master_awaddr[28].IN1hps_0_h2f_axi_master_awaddr[29] => hps_0_h2f_axi_master_awaddr[29].IN1hps_0_h2f_axi_master_awlen[0] => hps_0_h2f_axi_master_awlen[0].IN1hps_0_h2f_axi_master_awlen[1] => hps_0_h2f_axi_master_awlen[1].IN1hps_0_h2f_axi_master_awlen[2] => hps_0_h2f_axi_master_awlen[2].IN1hps_0_h2f_axi_master_awlen[3] => hps_0_h2f_axi_master_awlen[3].IN1hps_0_h2f_axi_master_awsize[0] => hps_0_h2f_axi_master_awsize[0].IN1hps_0_h2f_axi_master_awsize[1] => hps_0_h2f_axi_master_awsize[1].IN1hps_0_h2f_axi_master_awsize[2] => hps_0_h2f_axi_master_awsize[2].IN1hps_0_h2f_axi_master_awburst[0] => hps_0_h2f_axi_master_awburst[0].IN1hps_0_h2f_axi_master_awburst[1] => hps_0_h2f_axi_master_awburst[1].IN1hps_0_h2f_axi_master_awlock[0] => hps_0_h2f_axi_master_awlock[0].IN1hps_0_h2f_axi_master_awlock[1] => hps_0_h2f_axi_master_awlock[1].IN1hps_0_h2f_axi_master_awcache[0] => hps_0_h2f_axi_master_awcache[0].IN1hps_0_h2f_axi_master_awcache[1] => hps_0_h2f_axi_master_awcache[1].IN1hps_0_h2f_axi_master_awcache[2] => hps_0_h2f_axi_master_awcache[2].IN1hps_0_h2f_axi_master_awcache[3] => hps_0_h2f_axi_master_awcache[3].IN1hps_0_h2f_axi_master_awprot[0] => hps_0_h2f_axi_master_awprot[0].IN1hps_0_h2f_axi_master_awprot[1] => hps_0_h2f_axi_master_awprot[1].IN1hps_0_h2f_axi_master_awprot[2] => hps_0_h2f_axi_master_awprot[2].IN1hps_0_h2f_axi_master_awvalid => hps_0_h2f_axi_master_awvalid.IN1hps_0_h2f_axi_master_awready <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.awreadyhps_0_h2f_axi_master_wid[0] => hps_0_h2f_axi_master_wid[0].IN1hps_0_h2f_axi_master_wid[1] => hps_0_h2f_axi_master_wid[1].IN1hps_0_h2f_axi_master_wid[2] => hps_0_h2f_axi_master_wid[2].IN1hps_0_h2f_axi_master_wid[3] => hps_0_h2f_axi_master_wid[3].IN1hps_0_h2f_axi_master_wid[4] => hps_0_h2f_axi_master_wid[4].IN1hps_0_h2f_axi_master_wid[5] => hps_0_h2f_axi_master_wid[5].IN1hps_0_h2f_axi_master_wid[6] => hps_0_h2f_axi_master_wid[6].IN1hps_0_h2f_axi_master_wid[7] => hps_0_h2f_axi_master_wid[7].IN1hps_0_h2f_axi_master_wid[8] => hps_0_h2f_axi_master_wid[8].IN1hps_0_h2f_axi_master_wid[9] => hps_0_h2f_axi_master_wid[9].IN1hps_0_h2f_axi_master_wid[10] => hps_0_h2f_axi_master_wid[10].IN1hps_0_h2f_axi_master_wid[11] => hps_0_h2f_axi_master_wid[11].IN1hps_0_h2f_axi_master_wdata[0] => hps_0_h2f_axi_master_wdata[0].IN1hps_0_h2f_axi_master_wdata[1] => hps_0_h2f_axi_master_wdata[1].IN1hps_0_h2f_axi_master_wdata[2] => hps_0_h2f_axi_master_wdata[2].IN1hps_0_h2f_axi_master_wdata[3] => hps_0_h2f_axi_master_wdata[3].IN1hps_0_h2f_axi_master_wdata[4] => hps_0_h2f_axi_master_wdata[4].IN1hps_0_h2f_axi_master_wdata[5] => hps_0_h2f_axi_master_wdata[5].IN1hps_0_h2f_axi_master_wdata[6] => hps_0_h2f_axi_master_wdata[6].IN1hps_0_h2f_axi_master_wdata[7] => hps_0_h2f_axi_master_wdata[7].IN1hps_0_h2f_axi_master_wdata[8] => hps_0_h2f_axi_master_wdata[8].IN1hps_0_h2f_axi_master_wdata[9] => hps_0_h2f_axi_master_wdata[9].IN1hps_0_h2f_axi_master_wdata[10] => hps_0_h2f_axi_master_wdata[10].IN1hps_0_h2f_axi_master_wdata[11] => hps_0_h2f_axi_master_wdata[11].IN1hps_0_h2f_axi_master_wdata[12] => hps_0_h2f_axi_master_wdata[12].IN1hps_0_h2f_axi_master_wdata[13] => hps_0_h2f_axi_master_wdata[13].IN1hps_0_h2f_axi_master_wdata[14] => hps_0_h2f_axi_master_wdata[14].IN1hps_0_h2f_axi_master_wdata[15] => hps_0_h2f_axi_master_wdata[15].IN1hps_0_h2f_axi_master_wdata[16] => hps_0_h2f_axi_master_wdata[16].IN1hps_0_h2f_axi_master_wdata[17] => hps_0_h2f_axi_master_wdata[17].IN1hps_0_h2f_axi_master_wdata[18] => hps_0_h2f_axi_master_wdata[18].IN1hps_0_h2f_axi_master_wdata[19] => hps_0_h2f_axi_master_wdata[19].IN1hps_0_h2f_axi_master_wdata[20] => hps_0_h2f_axi_master_wdata[20].IN1hps_0_h2f_axi_master_wdata[21] => hps_0_h2f_axi_master_wdata[21].IN1hps_0_h2f_axi_master_wdata[22] => hps_0_h2f_axi_master_wdata[22].IN1hps_0_h2f_axi_master_wdata[23] => hps_0_h2f_axi_master_wdata[23].IN1hps_0_h2f_axi_master_wdata[24] => hps_0_h2f_axi_master_wdata[24].IN1hps_0_h2f_axi_master_wdata[25] => hps_0_h2f_axi_master_wdata[25].IN1hps_0_h2f_axi_master_wdata[26] => hps_0_h2f_axi_master_wdata[26].IN1hps_0_h2f_axi_master_wdata[27] => hps_0_h2f_axi_master_wdata[27].IN1hps_0_h2f_axi_master_wdata[28] => hps_0_h2f_axi_master_wdata[28].IN1hps_0_h2f_axi_master_wdata[29] => hps_0_h2f_axi_master_wdata[29].IN1hps_0_h2f_axi_master_wdata[30] => hps_0_h2f_axi_master_wdata[30].IN1hps_0_h2f_axi_master_wdata[31] => hps_0_h2f_axi_master_wdata[31].IN1hps_0_h2f_axi_master_wstrb[0] => hps_0_h2f_axi_master_wstrb[0].IN1hps_0_h2f_axi_master_wstrb[1] => hps_0_h2f_axi_master_wstrb[1].IN1hps_0_h2f_axi_master_wstrb[2] => hps_0_h2f_axi_master_wstrb[2].IN1hps_0_h2f_axi_master_wstrb[3] => hps_0_h2f_axi_master_wstrb[3].IN1hps_0_h2f_axi_master_wlast => hps_0_h2f_axi_master_wlast.IN1hps_0_h2f_axi_master_wvalid => hps_0_h2f_axi_master_wvalid.IN1hps_0_h2f_axi_master_wready <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.wreadyhps_0_h2f_axi_master_bid[0] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[1] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[2] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[3] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[4] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[5] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[6] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[7] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[8] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[9] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[10] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bid[11] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bidhps_0_h2f_axi_master_bresp[0] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bresphps_0_h2f_axi_master_bresp[1] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bresphps_0_h2f_axi_master_bvalid <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.bvalidhps_0_h2f_axi_master_bready => hps_0_h2f_axi_master_bready.IN1hps_0_h2f_axi_master_arid[0] => hps_0_h2f_axi_master_arid[0].IN1hps_0_h2f_axi_master_arid[1] => hps_0_h2f_axi_master_arid[1].IN1hps_0_h2f_axi_master_arid[2] => hps_0_h2f_axi_master_arid[2].IN1hps_0_h2f_axi_master_arid[3] => hps_0_h2f_axi_master_arid[3].IN1hps_0_h2f_axi_master_arid[4] => hps_0_h2f_axi_master_arid[4].IN1hps_0_h2f_axi_master_arid[5] => hps_0_h2f_axi_master_arid[5].IN1hps_0_h2f_axi_master_arid[6] => hps_0_h2f_axi_master_arid[6].IN1hps_0_h2f_axi_master_arid[7] => hps_0_h2f_axi_master_arid[7].IN1hps_0_h2f_axi_master_arid[8] => hps_0_h2f_axi_master_arid[8].IN1hps_0_h2f_axi_master_arid[9] => hps_0_h2f_axi_master_arid[9].IN1hps_0_h2f_axi_master_arid[10] => hps_0_h2f_axi_master_arid[10].IN1hps_0_h2f_axi_master_arid[11] => hps_0_h2f_axi_master_arid[11].IN1hps_0_h2f_axi_master_araddr[0] => hps_0_h2f_axi_master_araddr[0].IN1hps_0_h2f_axi_master_araddr[1] => hps_0_h2f_axi_master_araddr[1].IN1hps_0_h2f_axi_master_araddr[2] => hps_0_h2f_axi_master_araddr[2].IN1hps_0_h2f_axi_master_araddr[3] => hps_0_h2f_axi_master_araddr[3].IN1hps_0_h2f_axi_master_araddr[4] => hps_0_h2f_axi_master_araddr[4].IN1hps_0_h2f_axi_master_araddr[5] => hps_0_h2f_axi_master_araddr[5].IN1hps_0_h2f_axi_master_araddr[6] => hps_0_h2f_axi_master_araddr[6].IN1hps_0_h2f_axi_master_araddr[7] => hps_0_h2f_axi_master_araddr[7].IN1hps_0_h2f_axi_master_araddr[8] => hps_0_h2f_axi_master_araddr[8].IN1hps_0_h2f_axi_master_araddr[9] => hps_0_h2f_axi_master_araddr[9].IN1hps_0_h2f_axi_master_araddr[10] => hps_0_h2f_axi_master_araddr[10].IN1hps_0_h2f_axi_master_araddr[11] => hps_0_h2f_axi_master_araddr[11].IN1hps_0_h2f_axi_master_araddr[12] => hps_0_h2f_axi_master_araddr[12].IN1hps_0_h2f_axi_master_araddr[13] => hps_0_h2f_axi_master_araddr[13].IN1hps_0_h2f_axi_master_araddr[14] => hps_0_h2f_axi_master_araddr[14].IN1hps_0_h2f_axi_master_araddr[15] => hps_0_h2f_axi_master_araddr[15].IN1hps_0_h2f_axi_master_araddr[16] => hps_0_h2f_axi_master_araddr[16].IN1hps_0_h2f_axi_master_araddr[17] => hps_0_h2f_axi_master_araddr[17].IN1hps_0_h2f_axi_master_araddr[18] => hps_0_h2f_axi_master_araddr[18].IN1hps_0_h2f_axi_master_araddr[19] => hps_0_h2f_axi_master_araddr[19].IN1hps_0_h2f_axi_master_araddr[20] => hps_0_h2f_axi_master_araddr[20].IN1hps_0_h2f_axi_master_araddr[21] => hps_0_h2f_axi_master_araddr[21].IN1hps_0_h2f_axi_master_araddr[22] => hps_0_h2f_axi_master_araddr[22].IN1hps_0_h2f_axi_master_araddr[23] => hps_0_h2f_axi_master_araddr[23].IN1hps_0_h2f_axi_master_araddr[24] => hps_0_h2f_axi_master_araddr[24].IN1hps_0_h2f_axi_master_araddr[25] => hps_0_h2f_axi_master_araddr[25].IN1hps_0_h2f_axi_master_araddr[26] => hps_0_h2f_axi_master_araddr[26].IN1hps_0_h2f_axi_master_araddr[27] => hps_0_h2f_axi_master_araddr[27].IN1hps_0_h2f_axi_master_araddr[28] => hps_0_h2f_axi_master_araddr[28].IN1hps_0_h2f_axi_master_araddr[29] => hps_0_h2f_axi_master_araddr[29].IN1hps_0_h2f_axi_master_arlen[0] => hps_0_h2f_axi_master_arlen[0].IN1hps_0_h2f_axi_master_arlen[1] => hps_0_h2f_axi_master_arlen[1].IN1hps_0_h2f_axi_master_arlen[2] => hps_0_h2f_axi_master_arlen[2].IN1hps_0_h2f_axi_master_arlen[3] => hps_0_h2f_axi_master_arlen[3].IN1hps_0_h2f_axi_master_arsize[0] => hps_0_h2f_axi_master_arsize[0].IN1hps_0_h2f_axi_master_arsize[1] => hps_0_h2f_axi_master_arsize[1].IN1hps_0_h2f_axi_master_arsize[2] => hps_0_h2f_axi_master_arsize[2].IN1hps_0_h2f_axi_master_arburst[0] => hps_0_h2f_axi_master_arburst[0].IN1hps_0_h2f_axi_master_arburst[1] => hps_0_h2f_axi_master_arburst[1].IN1hps_0_h2f_axi_master_arlock[0] => hps_0_h2f_axi_master_arlock[0].IN1hps_0_h2f_axi_master_arlock[1] => hps_0_h2f_axi_master_arlock[1].IN1hps_0_h2f_axi_master_arcache[0] => hps_0_h2f_axi_master_arcache[0].IN1hps_0_h2f_axi_master_arcache[1] => hps_0_h2f_axi_master_arcache[1].IN1hps_0_h2f_axi_master_arcache[2] => hps_0_h2f_axi_master_arcache[2].IN1hps_0_h2f_axi_master_arcache[3] => hps_0_h2f_axi_master_arcache[3].IN1hps_0_h2f_axi_master_arprot[0] => hps_0_h2f_axi_master_arprot[0].IN1hps_0_h2f_axi_master_arprot[1] => hps_0_h2f_axi_master_arprot[1].IN1hps_0_h2f_axi_master_arprot[2] => hps_0_h2f_axi_master_arprot[2].IN1hps_0_h2f_axi_master_arvalid => hps_0_h2f_axi_master_arvalid.IN1hps_0_h2f_axi_master_arready <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.arreadyhps_0_h2f_axi_master_rid[0] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[1] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[2] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[3] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[4] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[5] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[6] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[7] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[8] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[9] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[10] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rid[11] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.ridhps_0_h2f_axi_master_rdata[0] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[1] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[2] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[3] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[4] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[5] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[6] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[7] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[8] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[9] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[10] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[11] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[12] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[13] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[14] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[15] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[16] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[17] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[18] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[19] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[20] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[21] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[22] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[23] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[24] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[25] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[26] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[27] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[28] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[29] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[30] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rdata[31] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rdatahps_0_h2f_axi_master_rresp[0] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rresphps_0_h2f_axi_master_rresp[1] <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rresphps_0_h2f_axi_master_rlast <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rlasthps_0_h2f_axi_master_rvalid <= altera_merlin_axi_master_ni:hps_0_h2f_axi_master_agent.rvalidhps_0_h2f_axi_master_rready => hps_0_h2f_axi_master_rready.IN1clk_0_clk_clk => clk_0_clk_clk.IN207hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset => hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset.IN8led_pio_test_reset_reset_bridge_in_reset_reset => led_pio_test_reset_reset_bridge_in_reset_reset.IN198auto_start_s1_address[0] <= altera_merlin_slave_translator:auto_start_s1_translator.av_addressauto_start_s1_address[1] <= altera_merlin_slave_translator:auto_start_s1_translator.av_addressauto_start_s1_write <= altera_merlin_slave_translator:auto_start_s1_translator.av_writeauto_start_s1_readdata[0] => auto_start_s1_readdata[0].IN1auto_start_s1_readdata[1] => auto_start_s1_readdata[1].IN1auto_start_s1_readdata[2] => auto_start_s1_readdata[2].IN1auto_start_s1_readdata[3] => auto_start_s1_readdata[3].IN1auto_start_s1_readdata[4] => auto_start_s1_readdata[4].IN1auto_start_s1_readdata[5] => auto_start_s1_readdata[5].IN1auto_start_s1_readdata[6] => auto_start_s1_readdata[6].IN1auto_start_s1_readdata[7] => auto_start_s1_readdata[7].IN1auto_start_s1_readdata[8] => auto_start_s1_readdata[8].IN1auto_start_s1_readdata[9] => auto_start_s1_readdata[9].IN1auto_start_s1_readdata[10] => auto_start_s1_readdata[10].IN1auto_start_s1_readdata[11] => auto_start_s1_readdata[11].IN1auto_start_s1_readdata[12] => auto_start_s1_readdata[12].IN1auto_start_s1_readdata[13] => auto_start_s1_readdata[13].IN1auto_start_s1_readdata[14] => auto_start_s1_readdata[14].IN1auto_start_s1_readdata[15] => auto_start_s1_readdata[15].IN1auto_start_s1_readdata[16] => auto_start_s1_readdata[16].IN1auto_start_s1_readdata[17] => auto_start_s1_readdata[17].IN1auto_start_s1_readdata[18] => auto_start_s1_readdata[18].IN1auto_start_s1_readdata[19] => auto_start_s1_readdata[19].IN1auto_start_s1_readdata[20] => auto_start_s1_readdata[20].IN1auto_start_s1_readdata[21] => auto_start_s1_readdata[21].IN1auto_start_s1_readdata[22] => auto_start_s1_readdata[22].IN1auto_start_s1_readdata[23] => auto_start_s1_readdata[23].IN1auto_start_s1_readdata[24] => auto_start_s1_readdata[24].IN1auto_start_s1_readdata[25] => auto_start_s1_readdata[25].IN1auto_start_s1_readdata[26] => auto_start_s1_readdata[26].IN1auto_start_s1_readdata[27] => auto_start_s1_readdata[27].IN1auto_start_s1_readdata[28] => auto_start_s1_readdata[28].IN1auto_start_s1_readdata[29] => auto_start_s1_readdata[29].IN1auto_start_s1_readdata[30] => auto_start_s1_readdata[30].IN1auto_start_s1_readdata[31] => auto_start_s1_readdata[31].IN1auto_start_s1_writedata[0] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[1] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[2] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[3] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[4] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[5] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[6] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[7] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[8] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[9] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[10] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[11] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[12] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[13] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[14] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[15] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[16] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[17] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[18] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[19] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[20] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[21] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[22] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[23] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[24] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[25] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[26] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[27] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[28] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[29] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[30] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_writedata[31] <= altera_merlin_slave_translator:auto_start_s1_translator.av_writedataauto_start_s1_chipselect <= altera_merlin_slave_translator:auto_start_s1_translator.av_chipselectclock_sel_s1_address[0] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_addressclock_sel_s1_address[1] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_addressclock_sel_s1_write <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writeclock_sel_s1_readdata[0] => clock_sel_s1_readdata[0].IN1clock_sel_s1_readdata[1] => clock_sel_s1_readdata[1].IN1clock_sel_s1_readdata[2] => clock_sel_s1_readdata[2].IN1clock_sel_s1_readdata[3] => clock_sel_s1_readdata[3].IN1clock_sel_s1_readdata[4] => clock_sel_s1_readdata[4].IN1clock_sel_s1_readdata[5] => clock_sel_s1_readdata[5].IN1clock_sel_s1_readdata[6] => clock_sel_s1_readdata[6].IN1clock_sel_s1_readdata[7] => clock_sel_s1_readdata[7].IN1clock_sel_s1_readdata[8] => clock_sel_s1_readdata[8].IN1clock_sel_s1_readdata[9] => clock_sel_s1_readdata[9].IN1clock_sel_s1_readdata[10] => clock_sel_s1_readdata[10].IN1clock_sel_s1_readdata[11] => clock_sel_s1_readdata[11].IN1clock_sel_s1_readdata[12] => clock_sel_s1_readdata[12].IN1clock_sel_s1_readdata[13] => clock_sel_s1_readdata[13].IN1clock_sel_s1_readdata[14] => clock_sel_s1_readdata[14].IN1clock_sel_s1_readdata[15] => clock_sel_s1_readdata[15].IN1clock_sel_s1_readdata[16] => clock_sel_s1_readdata[16].IN1clock_sel_s1_readdata[17] => clock_sel_s1_readdata[17].IN1clock_sel_s1_readdata[18] => clock_sel_s1_readdata[18].IN1clock_sel_s1_readdata[19] => clock_sel_s1_readdata[19].IN1clock_sel_s1_readdata[20] => clock_sel_s1_readdata[20].IN1clock_sel_s1_readdata[21] => clock_sel_s1_readdata[21].IN1clock_sel_s1_readdata[22] => clock_sel_s1_readdata[22].IN1clock_sel_s1_readdata[23] => clock_sel_s1_readdata[23].IN1clock_sel_s1_readdata[24] => clock_sel_s1_readdata[24].IN1clock_sel_s1_readdata[25] => clock_sel_s1_readdata[25].IN1clock_sel_s1_readdata[26] => clock_sel_s1_readdata[26].IN1clock_sel_s1_readdata[27] => clock_sel_s1_readdata[27].IN1clock_sel_s1_readdata[28] => clock_sel_s1_readdata[28].IN1clock_sel_s1_readdata[29] => clock_sel_s1_readdata[29].IN1clock_sel_s1_readdata[30] => clock_sel_s1_readdata[30].IN1clock_sel_s1_readdata[31] => clock_sel_s1_readdata[31].IN1clock_sel_s1_writedata[0] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[1] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[2] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[3] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[4] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[5] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[6] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[7] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[8] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[9] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[10] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[11] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[12] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[13] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[14] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[15] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[16] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[17] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[18] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[19] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[20] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[21] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[22] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[23] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[24] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[25] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[26] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[27] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[28] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[29] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[30] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_writedata[31] <= altera_merlin_slave_translator:clock_sel_s1_translator.av_writedataclock_sel_s1_chipselect <= altera_merlin_slave_translator:clock_sel_s1_translator.av_chipselectcounter_rx_fifo_s1_address[0] <= altera_merlin_slave_translator:counter_rx_fifo_s1_translator.av_addresscounter_rx_fifo_s1_address[1] <= altera_merlin_slave_translator:counter_rx_fifo_s1_translator.av_addresscounter_rx_fifo_s1_readdata[0] => counter_rx_fifo_s1_readdata[0].IN1counter_rx_fifo_s1_readdata[1] => counter_rx_fifo_s1_readdata[1].IN1counter_rx_fifo_s1_readdata[2] => counter_rx_fifo_s1_readdata[2].IN1counter_rx_fifo_s1_readdata[3] => counter_rx_fifo_s1_readdata[3].IN1counter_rx_fifo_s1_readdata[4] => counter_rx_fifo_s1_readdata[4].IN1counter_rx_fifo_s1_readdata[5] => counter_rx_fifo_s1_readdata[5].IN1counter_rx_fifo_s1_readdata[6] => counter_rx_fifo_s1_readdata[6].IN1counter_rx_fifo_s1_readdata[7] => counter_rx_fifo_s1_readdata[7].IN1counter_rx_fifo_s1_readdata[8] => counter_rx_fifo_s1_readdata[8].IN1counter_rx_fifo_s1_readdata[9] => counter_rx_fifo_s1_readdata[9].IN1counter_rx_fifo_s1_readdata[10] => counter_rx_fifo_s1_readdata[10].IN1counter_rx_fifo_s1_readdata[11] => counter_rx_fifo_s1_readdata[11].IN1counter_rx_fifo_s1_readdata[12] => counter_rx_fifo_s1_readdata[12].IN1counter_rx_fifo_s1_readdata[13] => counter_rx_fifo_s1_readdata[13].IN1counter_rx_fifo_s1_readdata[14] => counter_rx_fifo_s1_readdata[14].IN1counter_rx_fifo_s1_readdata[15] => counter_rx_fifo_s1_readdata[15].IN1counter_rx_fifo_s1_readdata[16] => counter_rx_fifo_s1_readdata[16].IN1counter_rx_fifo_s1_readdata[17] => counter_rx_fifo_s1_readdata[17].IN1counter_rx_fifo_s1_readdata[18] => counter_rx_fifo_s1_readdata[18].IN1counter_rx_fifo_s1_readdata[19] => counter_rx_fifo_s1_readdata[19].IN1counter_rx_fifo_s1_readdata[20] => counter_rx_fifo_s1_readdata[20].IN1counter_rx_fifo_s1_readdata[21] => counter_rx_fifo_s1_readdata[21].IN1counter_rx_fifo_s1_readdata[22] => counter_rx_fifo_s1_readdata[22].IN1counter_rx_fifo_s1_readdata[23] => counter_rx_fifo_s1_readdata[23].IN1counter_rx_fifo_s1_readdata[24] => counter_rx_fifo_s1_readdata[24].IN1counter_rx_fifo_s1_readdata[25] => counter_rx_fifo_s1_readdata[25].IN1counter_rx_fifo_s1_readdata[26] => counter_rx_fifo_s1_readdata[26].IN1counter_rx_fifo_s1_readdata[27] => counter_rx_fifo_s1_readdata[27].IN1counter_rx_fifo_s1_readdata[28] => counter_rx_fifo_s1_readdata[28].IN1counter_rx_fifo_s1_readdata[29] => counter_rx_fifo_s1_readdata[29].IN1counter_rx_fifo_s1_readdata[30] => counter_rx_fifo_s1_readdata[30].IN1counter_rx_fifo_s1_readdata[31] => counter_rx_fifo_s1_readdata[31].IN1counter_tx_fifo_s1_address[0] <= altera_merlin_slave_translator:counter_tx_fifo_s1_translator.av_addresscounter_tx_fifo_s1_address[1] <= altera_merlin_slave_translator:counter_tx_fifo_s1_translator.av_addresscounter_tx_fifo_s1_readdata[0] => counter_tx_fifo_s1_readdata[0].IN1counter_tx_fifo_s1_readdata[1] => counter_tx_fifo_s1_readdata[1].IN1counter_tx_fifo_s1_readdata[2] => counter_tx_fifo_s1_readdata[2].IN1counter_tx_fifo_s1_readdata[3] => counter_tx_fifo_s1_readdata[3].IN1counter_tx_fifo_s1_readdata[4] => counter_tx_fifo_s1_readdata[4].IN1counter_tx_fifo_s1_readdata[5] => counter_tx_fifo_s1_readdata[5].IN1counter_tx_fifo_s1_readdata[6] => counter_tx_fifo_s1_readdata[6].IN1counter_tx_fifo_s1_readdata[7] => counter_tx_fifo_s1_readdata[7].IN1counter_tx_fifo_s1_readdata[8] => counter_tx_fifo_s1_readdata[8].IN1counter_tx_fifo_s1_readdata[9] => counter_tx_fifo_s1_readdata[9].IN1counter_tx_fifo_s1_readdata[10] => counter_tx_fifo_s1_readdata[10].IN1counter_tx_fifo_s1_readdata[11] => counter_tx_fifo_s1_readdata[11].IN1counter_tx_fifo_s1_readdata[12] => counter_tx_fifo_s1_readdata[12].IN1counter_tx_fifo_s1_readdata[13] => counter_tx_fifo_s1_readdata[13].IN1counter_tx_fifo_s1_readdata[14] => counter_tx_fifo_s1_readdata[14].IN1counter_tx_fifo_s1_readdata[15] => counter_tx_fifo_s1_readdata[15].IN1counter_tx_fifo_s1_readdata[16] => counter_tx_fifo_s1_readdata[16].IN1counter_tx_fifo_s1_readdata[17] => counter_tx_fifo_s1_readdata[17].IN1counter_tx_fifo_s1_readdata[18] => counter_tx_fifo_s1_readdata[18].IN1counter_tx_fifo_s1_readdata[19] => counter_tx_fifo_s1_readdata[19].IN1counter_tx_fifo_s1_readdata[20] => counter_tx_fifo_s1_readdata[20].IN1counter_tx_fifo_s1_readdata[21] => counter_tx_fifo_s1_readdata[21].IN1counter_tx_fifo_s1_readdata[22] => counter_tx_fifo_s1_readdata[22].IN1counter_tx_fifo_s1_readdata[23] => counter_tx_fifo_s1_readdata[23].IN1counter_tx_fifo_s1_readdata[24] => counter_tx_fifo_s1_readdata[24].IN1counter_tx_fifo_s1_readdata[25] => counter_tx_fifo_s1_readdata[25].IN1counter_tx_fifo_s1_readdata[26] => counter_tx_fifo_s1_readdata[26].IN1counter_tx_fifo_s1_readdata[27] => counter_tx_fifo_s1_readdata[27].IN1counter_tx_fifo_s1_readdata[28] => counter_tx_fifo_s1_readdata[28].IN1counter_tx_fifo_s1_readdata[29] => counter_tx_fifo_s1_readdata[29].IN1counter_tx_fifo_s1_readdata[30] => counter_tx_fifo_s1_readdata[30].IN1counter_tx_fifo_s1_readdata[31] => counter_tx_fifo_s1_readdata[31].IN1data_flag_rx_s1_address[0] <= altera_merlin_slave_translator:data_flag_rx_s1_translator.av_addressdata_flag_rx_s1_address[1] <= altera_merlin_slave_translator:data_flag_rx_s1_translator.av_addressdata_flag_rx_s1_readdata[0] => data_flag_rx_s1_readdata[0].IN1data_flag_rx_s1_readdata[1] => data_flag_rx_s1_readdata[1].IN1data_flag_rx_s1_readdata[2] => data_flag_rx_s1_readdata[2].IN1data_flag_rx_s1_readdata[3] => data_flag_rx_s1_readdata[3].IN1data_flag_rx_s1_readdata[4] => data_flag_rx_s1_readdata[4].IN1data_flag_rx_s1_readdata[5] => data_flag_rx_s1_readdata[5].IN1data_flag_rx_s1_readdata[6] => data_flag_rx_s1_readdata[6].IN1data_flag_rx_s1_readdata[7] => data_flag_rx_s1_readdata[7].IN1data_flag_rx_s1_readdata[8] => data_flag_rx_s1_readdata[8].IN1data_flag_rx_s1_readdata[9] => data_flag_rx_s1_readdata[9].IN1data_flag_rx_s1_readdata[10] => data_flag_rx_s1_readdata[10].IN1data_flag_rx_s1_readdata[11] => data_flag_rx_s1_readdata[11].IN1data_flag_rx_s1_readdata[12] => data_flag_rx_s1_readdata[12].IN1data_flag_rx_s1_readdata[13] => data_flag_rx_s1_readdata[13].IN1data_flag_rx_s1_readdata[14] => data_flag_rx_s1_readdata[14].IN1data_flag_rx_s1_readdata[15] => data_flag_rx_s1_readdata[15].IN1data_flag_rx_s1_readdata[16] => data_flag_rx_s1_readdata[16].IN1data_flag_rx_s1_readdata[17] => data_flag_rx_s1_readdata[17].IN1data_flag_rx_s1_readdata[18] => data_flag_rx_s1_readdata[18].IN1data_flag_rx_s1_readdata[19] => data_flag_rx_s1_readdata[19].IN1data_flag_rx_s1_readdata[20] => data_flag_rx_s1_readdata[20].IN1data_flag_rx_s1_readdata[21] => data_flag_rx_s1_readdata[21].IN1data_flag_rx_s1_readdata[22] => data_flag_rx_s1_readdata[22].IN1data_flag_rx_s1_readdata[23] => data_flag_rx_s1_readdata[23].IN1data_flag_rx_s1_readdata[24] => data_flag_rx_s1_readdata[24].IN1data_flag_rx_s1_readdata[25] => data_flag_rx_s1_readdata[25].IN1data_flag_rx_s1_readdata[26] => data_flag_rx_s1_readdata[26].IN1data_flag_rx_s1_readdata[27] => data_flag_rx_s1_readdata[27].IN1data_flag_rx_s1_readdata[28] => data_flag_rx_s1_readdata[28].IN1data_flag_rx_s1_readdata[29] => data_flag_rx_s1_readdata[29].IN1data_flag_rx_s1_readdata[30] => data_flag_rx_s1_readdata[30].IN1data_flag_rx_s1_readdata[31] => data_flag_rx_s1_readdata[31].IN1data_info_s1_address[0] <= altera_merlin_slave_translator:data_info_s1_translator.av_addressdata_info_s1_address[1] <= altera_merlin_slave_translator:data_info_s1_translator.av_addressdata_info_s1_readdata[0] => data_info_s1_readdata[0].IN1data_info_s1_readdata[1] => data_info_s1_readdata[1].IN1data_info_s1_readdata[2] => data_info_s1_readdata[2].IN1data_info_s1_readdata[3] => data_info_s1_readdata[3].IN1data_info_s1_readdata[4] => data_info_s1_readdata[4].IN1data_info_s1_readdata[5] => data_info_s1_readdata[5].IN1data_info_s1_readdata[6] => data_info_s1_readdata[6].IN1data_info_s1_readdata[7] => data_info_s1_readdata[7].IN1data_info_s1_readdata[8] => data_info_s1_readdata[8].IN1data_info_s1_readdata[9] => data_info_s1_readdata[9].IN1data_info_s1_readdata[10] => data_info_s1_readdata[10].IN1data_info_s1_readdata[11] => data_info_s1_readdata[11].IN1data_info_s1_readdata[12] => data_info_s1_readdata[12].IN1data_info_s1_readdata[13] => data_info_s1_readdata[13].IN1data_info_s1_readdata[14] => data_info_s1_readdata[14].IN1data_info_s1_readdata[15] => data_info_s1_readdata[15].IN1data_info_s1_readdata[16] => data_info_s1_readdata[16].IN1data_info_s1_readdata[17] => data_info_s1_readdata[17].IN1data_info_s1_readdata[18] => data_info_s1_readdata[18].IN1data_info_s1_readdata[19] => data_info_s1_readdata[19].IN1data_info_s1_readdata[20] => data_info_s1_readdata[20].IN1data_info_s1_readdata[21] => data_info_s1_readdata[21].IN1data_info_s1_readdata[22] => data_info_s1_readdata[22].IN1data_info_s1_readdata[23] => data_info_s1_readdata[23].IN1data_info_s1_readdata[24] => data_info_s1_readdata[24].IN1data_info_s1_readdata[25] => data_info_s1_readdata[25].IN1data_info_s1_readdata[26] => data_info_s1_readdata[26].IN1data_info_s1_readdata[27] => data_info_s1_readdata[27].IN1data_info_s1_readdata[28] => data_info_s1_readdata[28].IN1data_info_s1_readdata[29] => data_info_s1_readdata[29].IN1data_info_s1_readdata[30] => data_info_s1_readdata[30].IN1data_info_s1_readdata[31] => data_info_s1_readdata[31].IN1data_read_en_rx_s1_address[0] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_addressdata_read_en_rx_s1_address[1] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_addressdata_read_en_rx_s1_write <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedata_read_en_rx_s1_readdata[0] => data_read_en_rx_s1_readdata[0].IN1data_read_en_rx_s1_readdata[1] => data_read_en_rx_s1_readdata[1].IN1data_read_en_rx_s1_readdata[2] => data_read_en_rx_s1_readdata[2].IN1data_read_en_rx_s1_readdata[3] => data_read_en_rx_s1_readdata[3].IN1data_read_en_rx_s1_readdata[4] => data_read_en_rx_s1_readdata[4].IN1data_read_en_rx_s1_readdata[5] => data_read_en_rx_s1_readdata[5].IN1data_read_en_rx_s1_readdata[6] => data_read_en_rx_s1_readdata[6].IN1data_read_en_rx_s1_readdata[7] => data_read_en_rx_s1_readdata[7].IN1data_read_en_rx_s1_readdata[8] => data_read_en_rx_s1_readdata[8].IN1data_read_en_rx_s1_readdata[9] => data_read_en_rx_s1_readdata[9].IN1data_read_en_rx_s1_readdata[10] => data_read_en_rx_s1_readdata[10].IN1data_read_en_rx_s1_readdata[11] => data_read_en_rx_s1_readdata[11].IN1data_read_en_rx_s1_readdata[12] => data_read_en_rx_s1_readdata[12].IN1data_read_en_rx_s1_readdata[13] => data_read_en_rx_s1_readdata[13].IN1data_read_en_rx_s1_readdata[14] => data_read_en_rx_s1_readdata[14].IN1data_read_en_rx_s1_readdata[15] => data_read_en_rx_s1_readdata[15].IN1data_read_en_rx_s1_readdata[16] => data_read_en_rx_s1_readdata[16].IN1data_read_en_rx_s1_readdata[17] => data_read_en_rx_s1_readdata[17].IN1data_read_en_rx_s1_readdata[18] => data_read_en_rx_s1_readdata[18].IN1data_read_en_rx_s1_readdata[19] => data_read_en_rx_s1_readdata[19].IN1data_read_en_rx_s1_readdata[20] => data_read_en_rx_s1_readdata[20].IN1data_read_en_rx_s1_readdata[21] => data_read_en_rx_s1_readdata[21].IN1data_read_en_rx_s1_readdata[22] => data_read_en_rx_s1_readdata[22].IN1data_read_en_rx_s1_readdata[23] => data_read_en_rx_s1_readdata[23].IN1data_read_en_rx_s1_readdata[24] => data_read_en_rx_s1_readdata[24].IN1data_read_en_rx_s1_readdata[25] => data_read_en_rx_s1_readdata[25].IN1data_read_en_rx_s1_readdata[26] => data_read_en_rx_s1_readdata[26].IN1data_read_en_rx_s1_readdata[27] => data_read_en_rx_s1_readdata[27].IN1data_read_en_rx_s1_readdata[28] => data_read_en_rx_s1_readdata[28].IN1data_read_en_rx_s1_readdata[29] => data_read_en_rx_s1_readdata[29].IN1data_read_en_rx_s1_readdata[30] => data_read_en_rx_s1_readdata[30].IN1data_read_en_rx_s1_readdata[31] => data_read_en_rx_s1_readdata[31].IN1data_read_en_rx_s1_writedata[0] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[1] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[2] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[3] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[4] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[5] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[6] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[7] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[8] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[9] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[10] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[11] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[12] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[13] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[14] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[15] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[16] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[17] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[18] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[19] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[20] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[21] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[22] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[23] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[24] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[25] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[26] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[27] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[28] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[29] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[30] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_writedata[31] <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_writedatadata_read_en_rx_s1_chipselect <= altera_merlin_slave_translator:data_read_en_rx_s1_translator.av_chipselectfifo_empty_rx_status_s1_address[0] <= altera_merlin_slave_translator:fifo_empty_rx_status_s1_translator.av_addressfifo_empty_rx_status_s1_address[1] <= altera_merlin_slave_translator:fifo_empty_rx_status_s1_translator.av_addressfifo_empty_rx_status_s1_readdata[0] => fifo_empty_rx_status_s1_readdata[0].IN1fifo_empty_rx_status_s1_readdata[1] => fifo_empty_rx_status_s1_readdata[1].IN1fifo_empty_rx_status_s1_readdata[2] => fifo_empty_rx_status_s1_readdata[2].IN1fifo_empty_rx_status_s1_readdata[3] => fifo_empty_rx_status_s1_readdata[3].IN1fifo_empty_rx_status_s1_readdata[4] => fifo_empty_rx_status_s1_readdata[4].IN1fifo_empty_rx_status_s1_readdata[5] => fifo_empty_rx_status_s1_readdata[5].IN1fifo_empty_rx_status_s1_readdata[6] => fifo_empty_rx_status_s1_readdata[6].IN1fifo_empty_rx_status_s1_readdata[7] => fifo_empty_rx_status_s1_readdata[7].IN1fifo_empty_rx_status_s1_readdata[8] => fifo_empty_rx_status_s1_readdata[8].IN1fifo_empty_rx_status_s1_readdata[9] => fifo_empty_rx_status_s1_readdata[9].IN1fifo_empty_rx_status_s1_readdata[10] => fifo_empty_rx_status_s1_readdata[10].IN1fifo_empty_rx_status_s1_readdata[11] => fifo_empty_rx_status_s1_readdata[11].IN1fifo_empty_rx_status_s1_readdata[12] => fifo_empty_rx_status_s1_readdata[12].IN1fifo_empty_rx_status_s1_readdata[13] => fifo_empty_rx_status_s1_readdata[13].IN1fifo_empty_rx_status_s1_readdata[14] => fifo_empty_rx_status_s1_readdata[14].IN1fifo_empty_rx_status_s1_readdata[15] => fifo_empty_rx_status_s1_readdata[15].IN1fifo_empty_rx_status_s1_readdata[16] => fifo_empty_rx_status_s1_readdata[16].IN1fifo_empty_rx_status_s1_readdata[17] => fifo_empty_rx_status_s1_readdata[17].IN1fifo_empty_rx_status_s1_readdata[18] => fifo_empty_rx_status_s1_readdata[18].IN1fifo_empty_rx_status_s1_readdata[19] => fifo_empty_rx_status_s1_readdata[19].IN1fifo_empty_rx_status_s1_readdata[20] => fifo_empty_rx_status_s1_readdata[20].IN1fifo_empty_rx_status_s1_readdata[21] => fifo_empty_rx_status_s1_readdata[21].IN1fifo_empty_rx_status_s1_readdata[22] => fifo_empty_rx_status_s1_readdata[22].IN1fifo_empty_rx_status_s1_readdata[23] => fifo_empty_rx_status_s1_readdata[23].IN1fifo_empty_rx_status_s1_readdata[24] => fifo_empty_rx_status_s1_readdata[24].IN1fifo_empty_rx_status_s1_readdata[25] => fifo_empty_rx_status_s1_readdata[25].IN1fifo_empty_rx_status_s1_readdata[26] => fifo_empty_rx_status_s1_readdata[26].IN1fifo_empty_rx_status_s1_readdata[27] => fifo_empty_rx_status_s1_readdata[27].IN1fifo_empty_rx_status_s1_readdata[28] => fifo_empty_rx_status_s1_readdata[28].IN1fifo_empty_rx_status_s1_readdata[29] => fifo_empty_rx_status_s1_readdata[29].IN1fifo_empty_rx_status_s1_readdata[30] => fifo_empty_rx_status_s1_readdata[30].IN1fifo_empty_rx_status_s1_readdata[31] => fifo_empty_rx_status_s1_readdata[31].IN1fifo_empty_tx_status_s1_address[0] <= altera_merlin_slave_translator:fifo_empty_tx_status_s1_translator.av_addressfifo_empty_tx_status_s1_address[1] <= altera_merlin_slave_translator:fifo_empty_tx_status_s1_translator.av_addressfifo_empty_tx_status_s1_readdata[0] => fifo_empty_tx_status_s1_readdata[0].IN1fifo_empty_tx_status_s1_readdata[1] => fifo_empty_tx_status_s1_readdata[1].IN1fifo_empty_tx_status_s1_readdata[2] => fifo_empty_tx_status_s1_readdata[2].IN1fifo_empty_tx_status_s1_readdata[3] => fifo_empty_tx_status_s1_readdata[3].IN1fifo_empty_tx_status_s1_readdata[4] => fifo_empty_tx_status_s1_readdata[4].IN1fifo_empty_tx_status_s1_readdata[5] => fifo_empty_tx_status_s1_readdata[5].IN1fifo_empty_tx_status_s1_readdata[6] => fifo_empty_tx_status_s1_readdata[6].IN1fifo_empty_tx_status_s1_readdata[7] => fifo_empty_tx_status_s1_readdata[7].IN1fifo_empty_tx_status_s1_readdata[8] => fifo_empty_tx_status_s1_readdata[8].IN1fifo_empty_tx_status_s1_readdata[9] => fifo_empty_tx_status_s1_readdata[9].IN1fifo_empty_tx_status_s1_readdata[10] => fifo_empty_tx_status_s1_readdata[10].IN1fifo_empty_tx_status_s1_readdata[11] => fifo_empty_tx_status_s1_readdata[11].IN1fifo_empty_tx_status_s1_readdata[12] => fifo_empty_tx_status_s1_readdata[12].IN1fifo_empty_tx_status_s1_readdata[13] => fifo_empty_tx_status_s1_readdata[13].IN1fifo_empty_tx_status_s1_readdata[14] => fifo_empty_tx_status_s1_readdata[14].IN1fifo_empty_tx_status_s1_readdata[15] => fifo_empty_tx_status_s1_readdata[15].IN1fifo_empty_tx_status_s1_readdata[16] => fifo_empty_tx_status_s1_readdata[16].IN1fifo_empty_tx_status_s1_readdata[17] => fifo_empty_tx_status_s1_readdata[17].IN1fifo_empty_tx_status_s1_readdata[18] => fifo_empty_tx_status_s1_readdata[18].IN1fifo_empty_tx_status_s1_readdata[19] => fifo_empty_tx_status_s1_readdata[19].IN1fifo_empty_tx_status_s1_readdata[20] => fifo_empty_tx_status_s1_readdata[20].IN1fifo_empty_tx_status_s1_readdata[21] => fifo_empty_tx_status_s1_readdata[21].IN1fifo_empty_tx_status_s1_readdata[22] => fifo_empty_tx_status_s1_readdata[22].IN1fifo_empty_tx_status_s1_readdata[23] => fifo_empty_tx_status_s1_readdata[23].IN1fifo_empty_tx_status_s1_readdata[24] => fifo_empty_tx_status_s1_readdata[24].IN1fifo_empty_tx_status_s1_readdata[25] => fifo_empty_tx_status_s1_readdata[25].IN1fifo_empty_tx_status_s1_readdata[26] => fifo_empty_tx_status_s1_readdata[26].IN1fifo_empty_tx_status_s1_readdata[27] => fifo_empty_tx_status_s1_readdata[27].IN1fifo_empty_tx_status_s1_readdata[28] => fifo_empty_tx_status_s1_readdata[28].IN1fifo_empty_tx_status_s1_readdata[29] => fifo_empty_tx_status_s1_readdata[29].IN1fifo_empty_tx_status_s1_readdata[30] => fifo_empty_tx_status_s1_readdata[30].IN1fifo_empty_tx_status_s1_readdata[31] => fifo_empty_tx_status_s1_readdata[31].IN1fifo_full_rx_status_s1_address[0] <= altera_merlin_slave_translator:fifo_full_rx_status_s1_translator.av_addressfifo_full_rx_status_s1_address[1] <= altera_merlin_slave_translator:fifo_full_rx_status_s1_translator.av_addressfifo_full_rx_status_s1_readdata[0] => fifo_full_rx_status_s1_readdata[0].IN1fifo_full_rx_status_s1_readdata[1] => fifo_full_rx_status_s1_readdata[1].IN1fifo_full_rx_status_s1_readdata[2] => fifo_full_rx_status_s1_readdata[2].IN1fifo_full_rx_status_s1_readdata[3] => fifo_full_rx_status_s1_readdata[3].IN1fifo_full_rx_status_s1_readdata[4] => fifo_full_rx_status_s1_readdata[4].IN1fifo_full_rx_status_s1_readdata[5] => fifo_full_rx_status_s1_readdata[5].IN1fifo_full_rx_status_s1_readdata[6] => fifo_full_rx_status_s1_readdata[6].IN1fifo_full_rx_status_s1_readdata[7] => fifo_full_rx_status_s1_readdata[7].IN1fifo_full_rx_status_s1_readdata[8] => fifo_full_rx_status_s1_readdata[8].IN1fifo_full_rx_status_s1_readdata[9] => fifo_full_rx_status_s1_readdata[9].IN1fifo_full_rx_status_s1_readdata[10] => fifo_full_rx_status_s1_readdata[10].IN1fifo_full_rx_status_s1_readdata[11] => fifo_full_rx_status_s1_readdata[11].IN1fifo_full_rx_status_s1_readdata[12] => fifo_full_rx_status_s1_readdata[12].IN1fifo_full_rx_status_s1_readdata[13] => fifo_full_rx_status_s1_readdata[13].IN1fifo_full_rx_status_s1_readdata[14] => fifo_full_rx_status_s1_readdata[14].IN1fifo_full_rx_status_s1_readdata[15] => fifo_full_rx_status_s1_readdata[15].IN1fifo_full_rx_status_s1_readdata[16] => fifo_full_rx_status_s1_readdata[16].IN1fifo_full_rx_status_s1_readdata[17] => fifo_full_rx_status_s1_readdata[17].IN1fifo_full_rx_status_s1_readdata[18] => fifo_full_rx_status_s1_readdata[18].IN1fifo_full_rx_status_s1_readdata[19] => fifo_full_rx_status_s1_readdata[19].IN1fifo_full_rx_status_s1_readdata[20] => fifo_full_rx_status_s1_readdata[20].IN1fifo_full_rx_status_s1_readdata[21] => fifo_full_rx_status_s1_readdata[21].IN1fifo_full_rx_status_s1_readdata[22] => fifo_full_rx_status_s1_readdata[22].IN1fifo_full_rx_status_s1_readdata[23] => fifo_full_rx_status_s1_readdata[23].IN1fifo_full_rx_status_s1_readdata[24] => fifo_full_rx_status_s1_readdata[24].IN1fifo_full_rx_status_s1_readdata[25] => fifo_full_rx_status_s1_readdata[25].IN1fifo_full_rx_status_s1_readdata[26] => fifo_full_rx_status_s1_readdata[26].IN1fifo_full_rx_status_s1_readdata[27] => fifo_full_rx_status_s1_readdata[27].IN1fifo_full_rx_status_s1_readdata[28] => fifo_full_rx_status_s1_readdata[28].IN1fifo_full_rx_status_s1_readdata[29] => fifo_full_rx_status_s1_readdata[29].IN1fifo_full_rx_status_s1_readdata[30] => fifo_full_rx_status_s1_readdata[30].IN1fifo_full_rx_status_s1_readdata[31] => fifo_full_rx_status_s1_readdata[31].IN1fifo_full_tx_status_s1_address[0] <= altera_merlin_slave_translator:fifo_full_tx_status_s1_translator.av_addressfifo_full_tx_status_s1_address[1] <= altera_merlin_slave_translator:fifo_full_tx_status_s1_translator.av_addressfifo_full_tx_status_s1_readdata[0] => fifo_full_tx_status_s1_readdata[0].IN1fifo_full_tx_status_s1_readdata[1] => fifo_full_tx_status_s1_readdata[1].IN1fifo_full_tx_status_s1_readdata[2] => fifo_full_tx_status_s1_readdata[2].IN1fifo_full_tx_status_s1_readdata[3] => fifo_full_tx_status_s1_readdata[3].IN1fifo_full_tx_status_s1_readdata[4] => fifo_full_tx_status_s1_readdata[4].IN1fifo_full_tx_status_s1_readdata[5] => fifo_full_tx_status_s1_readdata[5].IN1fifo_full_tx_status_s1_readdata[6] => fifo_full_tx_status_s1_readdata[6].IN1fifo_full_tx_status_s1_readdata[7] => fifo_full_tx_status_s1_readdata[7].IN1fifo_full_tx_status_s1_readdata[8] => fifo_full_tx_status_s1_readdata[8].IN1fifo_full_tx_status_s1_readdata[9] => fifo_full_tx_status_s1_readdata[9].IN1fifo_full_tx_status_s1_readdata[10] => fifo_full_tx_status_s1_readdata[10].IN1fifo_full_tx_status_s1_readdata[11] => fifo_full_tx_status_s1_readdata[11].IN1fifo_full_tx_status_s1_readdata[12] => fifo_full_tx_status_s1_readdata[12].IN1fifo_full_tx_status_s1_readdata[13] => fifo_full_tx_status_s1_readdata[13].IN1fifo_full_tx_status_s1_readdata[14] => fifo_full_tx_status_s1_readdata[14].IN1fifo_full_tx_status_s1_readdata[15] => fifo_full_tx_status_s1_readdata[15].IN1fifo_full_tx_status_s1_readdata[16] => fifo_full_tx_status_s1_readdata[16].IN1fifo_full_tx_status_s1_readdata[17] => fifo_full_tx_status_s1_readdata[17].IN1fifo_full_tx_status_s1_readdata[18] => fifo_full_tx_status_s1_readdata[18].IN1fifo_full_tx_status_s1_readdata[19] => fifo_full_tx_status_s1_readdata[19].IN1fifo_full_tx_status_s1_readdata[20] => fifo_full_tx_status_s1_readdata[20].IN1fifo_full_tx_status_s1_readdata[21] => fifo_full_tx_status_s1_readdata[21].IN1fifo_full_tx_status_s1_readdata[22] => fifo_full_tx_status_s1_readdata[22].IN1fifo_full_tx_status_s1_readdata[23] => fifo_full_tx_status_s1_readdata[23].IN1fifo_full_tx_status_s1_readdata[24] => fifo_full_tx_status_s1_readdata[24].IN1fifo_full_tx_status_s1_readdata[25] => fifo_full_tx_status_s1_readdata[25].IN1fifo_full_tx_status_s1_readdata[26] => fifo_full_tx_status_s1_readdata[26].IN1fifo_full_tx_status_s1_readdata[27] => fifo_full_tx_status_s1_readdata[27].IN1fifo_full_tx_status_s1_readdata[28] => fifo_full_tx_status_s1_readdata[28].IN1fifo_full_tx_status_s1_readdata[29] => fifo_full_tx_status_s1_readdata[29].IN1fifo_full_tx_status_s1_readdata[30] => fifo_full_tx_status_s1_readdata[30].IN1fifo_full_tx_status_s1_readdata[31] => fifo_full_tx_status_s1_readdata[31].IN1fsm_info_s1_address[0] <= altera_merlin_slave_translator:fsm_info_s1_translator.av_addressfsm_info_s1_address[1] <= altera_merlin_slave_translator:fsm_info_s1_translator.av_addressfsm_info_s1_readdata[0] => fsm_info_s1_readdata[0].IN1fsm_info_s1_readdata[1] => fsm_info_s1_readdata[1].IN1fsm_info_s1_readdata[2] => fsm_info_s1_readdata[2].IN1fsm_info_s1_readdata[3] => fsm_info_s1_readdata[3].IN1fsm_info_s1_readdata[4] => fsm_info_s1_readdata[4].IN1fsm_info_s1_readdata[5] => fsm_info_s1_readdata[5].IN1fsm_info_s1_readdata[6] => fsm_info_s1_readdata[6].IN1fsm_info_s1_readdata[7] => fsm_info_s1_readdata[7].IN1fsm_info_s1_readdata[8] => fsm_info_s1_readdata[8].IN1fsm_info_s1_readdata[9] => fsm_info_s1_readdata[9].IN1fsm_info_s1_readdata[10] => fsm_info_s1_readdata[10].IN1fsm_info_s1_readdata[11] => fsm_info_s1_readdata[11].IN1fsm_info_s1_readdata[12] => fsm_info_s1_readdata[12].IN1fsm_info_s1_readdata[13] => fsm_info_s1_readdata[13].IN1fsm_info_s1_readdata[14] => fsm_info_s1_readdata[14].IN1fsm_info_s1_readdata[15] => fsm_info_s1_readdata[15].IN1fsm_info_s1_readdata[16] => fsm_info_s1_readdata[16].IN1fsm_info_s1_readdata[17] => fsm_info_s1_readdata[17].IN1fsm_info_s1_readdata[18] => fsm_info_s1_readdata[18].IN1fsm_info_s1_readdata[19] => fsm_info_s1_readdata[19].IN1fsm_info_s1_readdata[20] => fsm_info_s1_readdata[20].IN1fsm_info_s1_readdata[21] => fsm_info_s1_readdata[21].IN1fsm_info_s1_readdata[22] => fsm_info_s1_readdata[22].IN1fsm_info_s1_readdata[23] => fsm_info_s1_readdata[23].IN1fsm_info_s1_readdata[24] => fsm_info_s1_readdata[24].IN1fsm_info_s1_readdata[25] => fsm_info_s1_readdata[25].IN1fsm_info_s1_readdata[26] => fsm_info_s1_readdata[26].IN1fsm_info_s1_readdata[27] => fsm_info_s1_readdata[27].IN1fsm_info_s1_readdata[28] => fsm_info_s1_readdata[28].IN1fsm_info_s1_readdata[29] => fsm_info_s1_readdata[29].IN1fsm_info_s1_readdata[30] => fsm_info_s1_readdata[30].IN1fsm_info_s1_readdata[31] => fsm_info_s1_readdata[31].IN1led_pio_test_s1_address[0] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_addressled_pio_test_s1_address[1] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_addressled_pio_test_s1_write <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writeled_pio_test_s1_readdata[0] => led_pio_test_s1_readdata[0].IN1led_pio_test_s1_readdata[1] => led_pio_test_s1_readdata[1].IN1led_pio_test_s1_readdata[2] => led_pio_test_s1_readdata[2].IN1led_pio_test_s1_readdata[3] => led_pio_test_s1_readdata[3].IN1led_pio_test_s1_readdata[4] => led_pio_test_s1_readdata[4].IN1led_pio_test_s1_readdata[5] => led_pio_test_s1_readdata[5].IN1led_pio_test_s1_readdata[6] => led_pio_test_s1_readdata[6].IN1led_pio_test_s1_readdata[7] => led_pio_test_s1_readdata[7].IN1led_pio_test_s1_readdata[8] => led_pio_test_s1_readdata[8].IN1led_pio_test_s1_readdata[9] => led_pio_test_s1_readdata[9].IN1led_pio_test_s1_readdata[10] => led_pio_test_s1_readdata[10].IN1led_pio_test_s1_readdata[11] => led_pio_test_s1_readdata[11].IN1led_pio_test_s1_readdata[12] => led_pio_test_s1_readdata[12].IN1led_pio_test_s1_readdata[13] => led_pio_test_s1_readdata[13].IN1led_pio_test_s1_readdata[14] => led_pio_test_s1_readdata[14].IN1led_pio_test_s1_readdata[15] => led_pio_test_s1_readdata[15].IN1led_pio_test_s1_readdata[16] => led_pio_test_s1_readdata[16].IN1led_pio_test_s1_readdata[17] => led_pio_test_s1_readdata[17].IN1led_pio_test_s1_readdata[18] => led_pio_test_s1_readdata[18].IN1led_pio_test_s1_readdata[19] => led_pio_test_s1_readdata[19].IN1led_pio_test_s1_readdata[20] => led_pio_test_s1_readdata[20].IN1led_pio_test_s1_readdata[21] => led_pio_test_s1_readdata[21].IN1led_pio_test_s1_readdata[22] => led_pio_test_s1_readdata[22].IN1led_pio_test_s1_readdata[23] => led_pio_test_s1_readdata[23].IN1led_pio_test_s1_readdata[24] => led_pio_test_s1_readdata[24].IN1led_pio_test_s1_readdata[25] => led_pio_test_s1_readdata[25].IN1led_pio_test_s1_readdata[26] => led_pio_test_s1_readdata[26].IN1led_pio_test_s1_readdata[27] => led_pio_test_s1_readdata[27].IN1led_pio_test_s1_readdata[28] => led_pio_test_s1_readdata[28].IN1led_pio_test_s1_readdata[29] => led_pio_test_s1_readdata[29].IN1led_pio_test_s1_readdata[30] => led_pio_test_s1_readdata[30].IN1led_pio_test_s1_readdata[31] => led_pio_test_s1_readdata[31].IN1led_pio_test_s1_writedata[0] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[1] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[2] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[3] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[4] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[5] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[6] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[7] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[8] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[9] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[10] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[11] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[12] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[13] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[14] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[15] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[16] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[17] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[18] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[19] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[20] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[21] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[22] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[23] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[24] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[25] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[26] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[27] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[28] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[29] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[30] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_writedata[31] <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_writedataled_pio_test_s1_chipselect <= altera_merlin_slave_translator:led_pio_test_s1_translator.av_chipselectlink_disable_s1_address[0] <= altera_merlin_slave_translator:link_disable_s1_translator.av_addresslink_disable_s1_address[1] <= altera_merlin_slave_translator:link_disable_s1_translator.av_addresslink_disable_s1_write <= altera_merlin_slave_translator:link_disable_s1_translator.av_writelink_disable_s1_readdata[0] => link_disable_s1_readdata[0].IN1link_disable_s1_readdata[1] => link_disable_s1_readdata[1].IN1link_disable_s1_readdata[2] => link_disable_s1_readdata[2].IN1link_disable_s1_readdata[3] => link_disable_s1_readdata[3].IN1link_disable_s1_readdata[4] => link_disable_s1_readdata[4].IN1link_disable_s1_readdata[5] => link_disable_s1_readdata[5].IN1link_disable_s1_readdata[6] => link_disable_s1_readdata[6].IN1link_disable_s1_readdata[7] => link_disable_s1_readdata[7].IN1link_disable_s1_readdata[8] => link_disable_s1_readdata[8].IN1link_disable_s1_readdata[9] => link_disable_s1_readdata[9].IN1link_disable_s1_readdata[10] => link_disable_s1_readdata[10].IN1link_disable_s1_readdata[11] => link_disable_s1_readdata[11].IN1link_disable_s1_readdata[12] => link_disable_s1_readdata[12].IN1link_disable_s1_readdata[13] => link_disable_s1_readdata[13].IN1link_disable_s1_readdata[14] => link_disable_s1_readdata[14].IN1link_disable_s1_readdata[15] => link_disable_s1_readdata[15].IN1link_disable_s1_readdata[16] => link_disable_s1_readdata[16].IN1link_disable_s1_readdata[17] => link_disable_s1_readdata[17].IN1link_disable_s1_readdata[18] => link_disable_s1_readdata[18].IN1link_disable_s1_readdata[19] => link_disable_s1_readdata[19].IN1link_disable_s1_readdata[20] => link_disable_s1_readdata[20].IN1link_disable_s1_readdata[21] => link_disable_s1_readdata[21].IN1link_disable_s1_readdata[22] => link_disable_s1_readdata[22].IN1link_disable_s1_readdata[23] => link_disable_s1_readdata[23].IN1link_disable_s1_readdata[24] => link_disable_s1_readdata[24].IN1link_disable_s1_readdata[25] => link_disable_s1_readdata[25].IN1link_disable_s1_readdata[26] => link_disable_s1_readdata[26].IN1link_disable_s1_readdata[27] => link_disable_s1_readdata[27].IN1link_disable_s1_readdata[28] => link_disable_s1_readdata[28].IN1link_disable_s1_readdata[29] => link_disable_s1_readdata[29].IN1link_disable_s1_readdata[30] => link_disable_s1_readdata[30].IN1link_disable_s1_readdata[31] => link_disable_s1_readdata[31].IN1link_disable_s1_writedata[0] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[1] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[2] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[3] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[4] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[5] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[6] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[7] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[8] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[9] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[10] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[11] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[12] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[13] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[14] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[15] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[16] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[17] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[18] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[19] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[20] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[21] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[22] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[23] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[24] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[25] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[26] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[27] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[28] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[29] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[30] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_writedata[31] <= altera_merlin_slave_translator:link_disable_s1_translator.av_writedatalink_disable_s1_chipselect <= altera_merlin_slave_translator:link_disable_s1_translator.av_chipselectlink_start_s1_address[0] <= altera_merlin_slave_translator:link_start_s1_translator.av_addresslink_start_s1_address[1] <= altera_merlin_slave_translator:link_start_s1_translator.av_addresslink_start_s1_write <= altera_merlin_slave_translator:link_start_s1_translator.av_writelink_start_s1_readdata[0] => link_start_s1_readdata[0].IN1link_start_s1_readdata[1] => link_start_s1_readdata[1].IN1link_start_s1_readdata[2] => link_start_s1_readdata[2].IN1link_start_s1_readdata[3] => link_start_s1_readdata[3].IN1link_start_s1_readdata[4] => link_start_s1_readdata[4].IN1link_start_s1_readdata[5] => link_start_s1_readdata[5].IN1link_start_s1_readdata[6] => link_start_s1_readdata[6].IN1link_start_s1_readdata[7] => link_start_s1_readdata[7].IN1link_start_s1_readdata[8] => link_start_s1_readdata[8].IN1link_start_s1_readdata[9] => link_start_s1_readdata[9].IN1link_start_s1_readdata[10] => link_start_s1_readdata[10].IN1link_start_s1_readdata[11] => link_start_s1_readdata[11].IN1link_start_s1_readdata[12] => link_start_s1_readdata[12].IN1link_start_s1_readdata[13] => link_start_s1_readdata[13].IN1link_start_s1_readdata[14] => link_start_s1_readdata[14].IN1link_start_s1_readdata[15] => link_start_s1_readdata[15].IN1link_start_s1_readdata[16] => link_start_s1_readdata[16].IN1link_start_s1_readdata[17] => link_start_s1_readdata[17].IN1link_start_s1_readdata[18] => link_start_s1_readdata[18].IN1link_start_s1_readdata[19] => link_start_s1_readdata[19].IN1link_start_s1_readdata[20] => link_start_s1_readdata[20].IN1link_start_s1_readdata[21] => link_start_s1_readdata[21].IN1link_start_s1_readdata[22] => link_start_s1_readdata[22].IN1link_start_s1_readdata[23] => link_start_s1_readdata[23].IN1link_start_s1_readdata[24] => link_start_s1_readdata[24].IN1link_start_s1_readdata[25] => link_start_s1_readdata[25].IN1link_start_s1_readdata[26] => link_start_s1_readdata[26].IN1link_start_s1_readdata[27] => link_start_s1_readdata[27].IN1link_start_s1_readdata[28] => link_start_s1_readdata[28].IN1link_start_s1_readdata[29] => link_start_s1_readdata[29].IN1link_start_s1_readdata[30] => link_start_s1_readdata[30].IN1link_start_s1_readdata[31] => link_start_s1_readdata[31].IN1link_start_s1_writedata[0] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[1] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[2] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[3] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[4] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[5] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[6] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[7] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[8] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[9] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[10] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[11] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[12] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[13] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[14] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[15] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[16] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[17] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[18] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[19] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[20] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[21] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[22] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[23] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[24] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[25] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[26] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[27] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[28] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[29] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[30] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_writedata[31] <= altera_merlin_slave_translator:link_start_s1_translator.av_writedatalink_start_s1_chipselect <= altera_merlin_slave_translator:link_start_s1_translator.av_chipselecttimecode_ready_rx_s1_address[0] <= altera_merlin_slave_translator:timecode_ready_rx_s1_translator.av_addresstimecode_ready_rx_s1_address[1] <= altera_merlin_slave_translator:timecode_ready_rx_s1_translator.av_addresstimecode_ready_rx_s1_readdata[0] => timecode_ready_rx_s1_readdata[0].IN1timecode_ready_rx_s1_readdata[1] => timecode_ready_rx_s1_readdata[1].IN1timecode_ready_rx_s1_readdata[2] => timecode_ready_rx_s1_readdata[2].IN1timecode_ready_rx_s1_readdata[3] => timecode_ready_rx_s1_readdata[3].IN1timecode_ready_rx_s1_readdata[4] => timecode_ready_rx_s1_readdata[4].IN1timecode_ready_rx_s1_readdata[5] => timecode_ready_rx_s1_readdata[5].IN1timecode_ready_rx_s1_readdata[6] => timecode_ready_rx_s1_readdata[6].IN1timecode_ready_rx_s1_readdata[7] => timecode_ready_rx_s1_readdata[7].IN1timecode_ready_rx_s1_readdata[8] => timecode_ready_rx_s1_readdata[8].IN1timecode_ready_rx_s1_readdata[9] => timecode_ready_rx_s1_readdata[9].IN1timecode_ready_rx_s1_readdata[10] => timecode_ready_rx_s1_readdata[10].IN1timecode_ready_rx_s1_readdata[11] => timecode_ready_rx_s1_readdata[11].IN1timecode_ready_rx_s1_readdata[12] => timecode_ready_rx_s1_readdata[12].IN1timecode_ready_rx_s1_readdata[13] => timecode_ready_rx_s1_readdata[13].IN1timecode_ready_rx_s1_readdata[14] => timecode_ready_rx_s1_readdata[14].IN1timecode_ready_rx_s1_readdata[15] => timecode_ready_rx_s1_readdata[15].IN1timecode_ready_rx_s1_readdata[16] => timecode_ready_rx_s1_readdata[16].IN1timecode_ready_rx_s1_readdata[17] => timecode_ready_rx_s1_readdata[17].IN1timecode_ready_rx_s1_readdata[18] => timecode_ready_rx_s1_readdata[18].IN1timecode_ready_rx_s1_readdata[19] => timecode_ready_rx_s1_readdata[19].IN1timecode_ready_rx_s1_readdata[20] => timecode_ready_rx_s1_readdata[20].IN1timecode_ready_rx_s1_readdata[21] => timecode_ready_rx_s1_readdata[21].IN1timecode_ready_rx_s1_readdata[22] => timecode_ready_rx_s1_readdata[22].IN1timecode_ready_rx_s1_readdata[23] => timecode_ready_rx_s1_readdata[23].IN1timecode_ready_rx_s1_readdata[24] => timecode_ready_rx_s1_readdata[24].IN1timecode_ready_rx_s1_readdata[25] => timecode_ready_rx_s1_readdata[25].IN1timecode_ready_rx_s1_readdata[26] => timecode_ready_rx_s1_readdata[26].IN1timecode_ready_rx_s1_readdata[27] => timecode_ready_rx_s1_readdata[27].IN1timecode_ready_rx_s1_readdata[28] => timecode_ready_rx_s1_readdata[28].IN1timecode_ready_rx_s1_readdata[29] => timecode_ready_rx_s1_readdata[29].IN1timecode_ready_rx_s1_readdata[30] => timecode_ready_rx_s1_readdata[30].IN1timecode_ready_rx_s1_readdata[31] => timecode_ready_rx_s1_readdata[31].IN1timecode_rx_s1_address[0] <= altera_merlin_slave_translator:timecode_rx_s1_translator.av_addresstimecode_rx_s1_address[1] <= altera_merlin_slave_translator:timecode_rx_s1_translator.av_addresstimecode_rx_s1_readdata[0] => timecode_rx_s1_readdata[0].IN1timecode_rx_s1_readdata[1] => timecode_rx_s1_readdata[1].IN1timecode_rx_s1_readdata[2] => timecode_rx_s1_readdata[2].IN1timecode_rx_s1_readdata[3] => timecode_rx_s1_readdata[3].IN1timecode_rx_s1_readdata[4] => timecode_rx_s1_readdata[4].IN1timecode_rx_s1_readdata[5] => timecode_rx_s1_readdata[5].IN1timecode_rx_s1_readdata[6] => timecode_rx_s1_readdata[6].IN1timecode_rx_s1_readdata[7] => timecode_rx_s1_readdata[7].IN1timecode_rx_s1_readdata[8] => timecode_rx_s1_readdata[8].IN1timecode_rx_s1_readdata[9] => timecode_rx_s1_readdata[9].IN1timecode_rx_s1_readdata[10] => timecode_rx_s1_readdata[10].IN1timecode_rx_s1_readdata[11] => timecode_rx_s1_readdata[11].IN1timecode_rx_s1_readdata[12] => timecode_rx_s1_readdata[12].IN1timecode_rx_s1_readdata[13] => timecode_rx_s1_readdata[13].IN1timecode_rx_s1_readdata[14] => timecode_rx_s1_readdata[14].IN1timecode_rx_s1_readdata[15] => timecode_rx_s1_readdata[15].IN1timecode_rx_s1_readdata[16] => timecode_rx_s1_readdata[16].IN1timecode_rx_s1_readdata[17] => timecode_rx_s1_readdata[17].IN1timecode_rx_s1_readdata[18] => timecode_rx_s1_readdata[18].IN1timecode_rx_s1_readdata[19] => timecode_rx_s1_readdata[19].IN1timecode_rx_s1_readdata[20] => timecode_rx_s1_readdata[20].IN1timecode_rx_s1_readdata[21] => timecode_rx_s1_readdata[21].IN1timecode_rx_s1_readdata[22] => timecode_rx_s1_readdata[22].IN1timecode_rx_s1_readdata[23] => timecode_rx_s1_readdata[23].IN1timecode_rx_s1_readdata[24] => timecode_rx_s1_readdata[24].IN1timecode_rx_s1_readdata[25] => timecode_rx_s1_readdata[25].IN1timecode_rx_s1_readdata[26] => timecode_rx_s1_readdata[26].IN1timecode_rx_s1_readdata[27] => timecode_rx_s1_readdata[27].IN1timecode_rx_s1_readdata[28] => timecode_rx_s1_readdata[28].IN1timecode_rx_s1_readdata[29] => timecode_rx_s1_readdata[29].IN1timecode_rx_s1_readdata[30] => timecode_rx_s1_readdata[30].IN1timecode_rx_s1_readdata[31] => timecode_rx_s1_readdata[31].IN1timecode_tx_data_s1_address[0] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_addresstimecode_tx_data_s1_address[1] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_addresstimecode_tx_data_s1_write <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writetimecode_tx_data_s1_readdata[0] => timecode_tx_data_s1_readdata[0].IN1timecode_tx_data_s1_readdata[1] => timecode_tx_data_s1_readdata[1].IN1timecode_tx_data_s1_readdata[2] => timecode_tx_data_s1_readdata[2].IN1timecode_tx_data_s1_readdata[3] => timecode_tx_data_s1_readdata[3].IN1timecode_tx_data_s1_readdata[4] => timecode_tx_data_s1_readdata[4].IN1timecode_tx_data_s1_readdata[5] => timecode_tx_data_s1_readdata[5].IN1timecode_tx_data_s1_readdata[6] => timecode_tx_data_s1_readdata[6].IN1timecode_tx_data_s1_readdata[7] => timecode_tx_data_s1_readdata[7].IN1timecode_tx_data_s1_readdata[8] => timecode_tx_data_s1_readdata[8].IN1timecode_tx_data_s1_readdata[9] => timecode_tx_data_s1_readdata[9].IN1timecode_tx_data_s1_readdata[10] => timecode_tx_data_s1_readdata[10].IN1timecode_tx_data_s1_readdata[11] => timecode_tx_data_s1_readdata[11].IN1timecode_tx_data_s1_readdata[12] => timecode_tx_data_s1_readdata[12].IN1timecode_tx_data_s1_readdata[13] => timecode_tx_data_s1_readdata[13].IN1timecode_tx_data_s1_readdata[14] => timecode_tx_data_s1_readdata[14].IN1timecode_tx_data_s1_readdata[15] => timecode_tx_data_s1_readdata[15].IN1timecode_tx_data_s1_readdata[16] => timecode_tx_data_s1_readdata[16].IN1timecode_tx_data_s1_readdata[17] => timecode_tx_data_s1_readdata[17].IN1timecode_tx_data_s1_readdata[18] => timecode_tx_data_s1_readdata[18].IN1timecode_tx_data_s1_readdata[19] => timecode_tx_data_s1_readdata[19].IN1timecode_tx_data_s1_readdata[20] => timecode_tx_data_s1_readdata[20].IN1timecode_tx_data_s1_readdata[21] => timecode_tx_data_s1_readdata[21].IN1timecode_tx_data_s1_readdata[22] => timecode_tx_data_s1_readdata[22].IN1timecode_tx_data_s1_readdata[23] => timecode_tx_data_s1_readdata[23].IN1timecode_tx_data_s1_readdata[24] => timecode_tx_data_s1_readdata[24].IN1timecode_tx_data_s1_readdata[25] => timecode_tx_data_s1_readdata[25].IN1timecode_tx_data_s1_readdata[26] => timecode_tx_data_s1_readdata[26].IN1timecode_tx_data_s1_readdata[27] => timecode_tx_data_s1_readdata[27].IN1timecode_tx_data_s1_readdata[28] => timecode_tx_data_s1_readdata[28].IN1timecode_tx_data_s1_readdata[29] => timecode_tx_data_s1_readdata[29].IN1timecode_tx_data_s1_readdata[30] => timecode_tx_data_s1_readdata[30].IN1timecode_tx_data_s1_readdata[31] => timecode_tx_data_s1_readdata[31].IN1timecode_tx_data_s1_writedata[0] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[1] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[2] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[3] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[4] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[5] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[6] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[7] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[8] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[9] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[10] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[11] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[12] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[13] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[14] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[15] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[16] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[17] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[18] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[19] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[20] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[21] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[22] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[23] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[24] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[25] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[26] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[27] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[28] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[29] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[30] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_writedata[31] <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_writedatatimecode_tx_data_s1_chipselect <= altera_merlin_slave_translator:timecode_tx_data_s1_translator.av_chipselecttimecode_tx_enable_s1_address[0] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_addresstimecode_tx_enable_s1_address[1] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_addresstimecode_tx_enable_s1_write <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writetimecode_tx_enable_s1_readdata[0] => timecode_tx_enable_s1_readdata[0].IN1timecode_tx_enable_s1_readdata[1] => timecode_tx_enable_s1_readdata[1].IN1timecode_tx_enable_s1_readdata[2] => timecode_tx_enable_s1_readdata[2].IN1timecode_tx_enable_s1_readdata[3] => timecode_tx_enable_s1_readdata[3].IN1timecode_tx_enable_s1_readdata[4] => timecode_tx_enable_s1_readdata[4].IN1timecode_tx_enable_s1_readdata[5] => timecode_tx_enable_s1_readdata[5].IN1timecode_tx_enable_s1_readdata[6] => timecode_tx_enable_s1_readdata[6].IN1timecode_tx_enable_s1_readdata[7] => timecode_tx_enable_s1_readdata[7].IN1timecode_tx_enable_s1_readdata[8] => timecode_tx_enable_s1_readdata[8].IN1timecode_tx_enable_s1_readdata[9] => timecode_tx_enable_s1_readdata[9].IN1timecode_tx_enable_s1_readdata[10] => timecode_tx_enable_s1_readdata[10].IN1timecode_tx_enable_s1_readdata[11] => timecode_tx_enable_s1_readdata[11].IN1timecode_tx_enable_s1_readdata[12] => timecode_tx_enable_s1_readdata[12].IN1timecode_tx_enable_s1_readdata[13] => timecode_tx_enable_s1_readdata[13].IN1timecode_tx_enable_s1_readdata[14] => timecode_tx_enable_s1_readdata[14].IN1timecode_tx_enable_s1_readdata[15] => timecode_tx_enable_s1_readdata[15].IN1timecode_tx_enable_s1_readdata[16] => timecode_tx_enable_s1_readdata[16].IN1timecode_tx_enable_s1_readdata[17] => timecode_tx_enable_s1_readdata[17].IN1timecode_tx_enable_s1_readdata[18] => timecode_tx_enable_s1_readdata[18].IN1timecode_tx_enable_s1_readdata[19] => timecode_tx_enable_s1_readdata[19].IN1timecode_tx_enable_s1_readdata[20] => timecode_tx_enable_s1_readdata[20].IN1timecode_tx_enable_s1_readdata[21] => timecode_tx_enable_s1_readdata[21].IN1timecode_tx_enable_s1_readdata[22] => timecode_tx_enable_s1_readdata[22].IN1timecode_tx_enable_s1_readdata[23] => timecode_tx_enable_s1_readdata[23].IN1timecode_tx_enable_s1_readdata[24] => timecode_tx_enable_s1_readdata[24].IN1timecode_tx_enable_s1_readdata[25] => timecode_tx_enable_s1_readdata[25].IN1timecode_tx_enable_s1_readdata[26] => timecode_tx_enable_s1_readdata[26].IN1timecode_tx_enable_s1_readdata[27] => timecode_tx_enable_s1_readdata[27].IN1timecode_tx_enable_s1_readdata[28] => timecode_tx_enable_s1_readdata[28].IN1timecode_tx_enable_s1_readdata[29] => timecode_tx_enable_s1_readdata[29].IN1timecode_tx_enable_s1_readdata[30] => timecode_tx_enable_s1_readdata[30].IN1timecode_tx_enable_s1_readdata[31] => timecode_tx_enable_s1_readdata[31].IN1timecode_tx_enable_s1_writedata[0] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[1] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[2] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[3] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[4] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[5] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[6] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[7] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[8] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[9] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[10] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[11] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[12] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[13] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[14] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[15] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[16] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[17] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[18] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[19] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[20] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[21] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[22] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[23] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[24] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[25] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[26] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[27] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[28] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[29] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[30] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_writedata[31] <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_writedatatimecode_tx_enable_s1_chipselect <= altera_merlin_slave_translator:timecode_tx_enable_s1_translator.av_chipselecttimecode_tx_ready_s1_address[0] <= altera_merlin_slave_translator:timecode_tx_ready_s1_translator.av_addresstimecode_tx_ready_s1_address[1] <= altera_merlin_slave_translator:timecode_tx_ready_s1_translator.av_addresstimecode_tx_ready_s1_readdata[0] => timecode_tx_ready_s1_readdata[0].IN1timecode_tx_ready_s1_readdata[1] => timecode_tx_ready_s1_readdata[1].IN1timecode_tx_ready_s1_readdata[2] => timecode_tx_ready_s1_readdata[2].IN1timecode_tx_ready_s1_readdata[3] => timecode_tx_ready_s1_readdata[3].IN1timecode_tx_ready_s1_readdata[4] => timecode_tx_ready_s1_readdata[4].IN1timecode_tx_ready_s1_readdata[5] => timecode_tx_ready_s1_readdata[5].IN1timecode_tx_ready_s1_readdata[6] => timecode_tx_ready_s1_readdata[6].IN1timecode_tx_ready_s1_readdata[7] => timecode_tx_ready_s1_readdata[7].IN1timecode_tx_ready_s1_readdata[8] => timecode_tx_ready_s1_readdata[8].IN1timecode_tx_ready_s1_readdata[9] => timecode_tx_ready_s1_readdata[9].IN1timecode_tx_ready_s1_readdata[10] => timecode_tx_ready_s1_readdata[10].IN1timecode_tx_ready_s1_readdata[11] => timecode_tx_ready_s1_readdata[11].IN1timecode_tx_ready_s1_readdata[12] => timecode_tx_ready_s1_readdata[12].IN1timecode_tx_ready_s1_readdata[13] => timecode_tx_ready_s1_readdata[13].IN1timecode_tx_ready_s1_readdata[14] => timecode_tx_ready_s1_readdata[14].IN1timecode_tx_ready_s1_readdata[15] => timecode_tx_ready_s1_readdata[15].IN1timecode_tx_ready_s1_readdata[16] => timecode_tx_ready_s1_readdata[16].IN1timecode_tx_ready_s1_readdata[17] => timecode_tx_ready_s1_readdata[17].IN1timecode_tx_ready_s1_readdata[18] => timecode_tx_ready_s1_readdata[18].IN1timecode_tx_ready_s1_readdata[19] => timecode_tx_ready_s1_readdata[19].IN1timecode_tx_ready_s1_readdata[20] => timecode_tx_ready_s1_readdata[20].IN1timecode_tx_ready_s1_readdata[21] => timecode_tx_ready_s1_readdata[21].IN1timecode_tx_ready_s1_readdata[22] => timecode_tx_ready_s1_readdata[22].IN1timecode_tx_ready_s1_readdata[23] => timecode_tx_ready_s1_readdata[23].IN1timecode_tx_ready_s1_readdata[24] => timecode_tx_ready_s1_readdata[24].IN1timecode_tx_ready_s1_readdata[25] => timecode_tx_ready_s1_readdata[25].IN1timecode_tx_ready_s1_readdata[26] => timecode_tx_ready_s1_readdata[26].IN1timecode_tx_ready_s1_readdata[27] => timecode_tx_ready_s1_readdata[27].IN1timecode_tx_ready_s1_readdata[28] => timecode_tx_ready_s1_readdata[28].IN1timecode_tx_ready_s1_readdata[29] => timecode_tx_ready_s1_readdata[29].IN1timecode_tx_ready_s1_readdata[30] => timecode_tx_ready_s1_readdata[30].IN1timecode_tx_ready_s1_readdata[31] => timecode_tx_ready_s1_readdata[31].IN1write_data_fifo_tx_s1_address[0] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_addresswrite_data_fifo_tx_s1_address[1] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_addresswrite_data_fifo_tx_s1_write <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writewrite_data_fifo_tx_s1_readdata[0] => write_data_fifo_tx_s1_readdata[0].IN1write_data_fifo_tx_s1_readdata[1] => write_data_fifo_tx_s1_readdata[1].IN1write_data_fifo_tx_s1_readdata[2] => write_data_fifo_tx_s1_readdata[2].IN1write_data_fifo_tx_s1_readdata[3] => write_data_fifo_tx_s1_readdata[3].IN1write_data_fifo_tx_s1_readdata[4] => write_data_fifo_tx_s1_readdata[4].IN1write_data_fifo_tx_s1_readdata[5] => write_data_fifo_tx_s1_readdata[5].IN1write_data_fifo_tx_s1_readdata[6] => write_data_fifo_tx_s1_readdata[6].IN1write_data_fifo_tx_s1_readdata[7] => write_data_fifo_tx_s1_readdata[7].IN1write_data_fifo_tx_s1_readdata[8] => write_data_fifo_tx_s1_readdata[8].IN1write_data_fifo_tx_s1_readdata[9] => write_data_fifo_tx_s1_readdata[9].IN1write_data_fifo_tx_s1_readdata[10] => write_data_fifo_tx_s1_readdata[10].IN1write_data_fifo_tx_s1_readdata[11] => write_data_fifo_tx_s1_readdata[11].IN1write_data_fifo_tx_s1_readdata[12] => write_data_fifo_tx_s1_readdata[12].IN1write_data_fifo_tx_s1_readdata[13] => write_data_fifo_tx_s1_readdata[13].IN1write_data_fifo_tx_s1_readdata[14] => write_data_fifo_tx_s1_readdata[14].IN1write_data_fifo_tx_s1_readdata[15] => write_data_fifo_tx_s1_readdata[15].IN1write_data_fifo_tx_s1_readdata[16] => write_data_fifo_tx_s1_readdata[16].IN1write_data_fifo_tx_s1_readdata[17] => write_data_fifo_tx_s1_readdata[17].IN1write_data_fifo_tx_s1_readdata[18] => write_data_fifo_tx_s1_readdata[18].IN1write_data_fifo_tx_s1_readdata[19] => write_data_fifo_tx_s1_readdata[19].IN1write_data_fifo_tx_s1_readdata[20] => write_data_fifo_tx_s1_readdata[20].IN1write_data_fifo_tx_s1_readdata[21] => write_data_fifo_tx_s1_readdata[21].IN1write_data_fifo_tx_s1_readdata[22] => write_data_fifo_tx_s1_readdata[22].IN1write_data_fifo_tx_s1_readdata[23] => write_data_fifo_tx_s1_readdata[23].IN1write_data_fifo_tx_s1_readdata[24] => write_data_fifo_tx_s1_readdata[24].IN1write_data_fifo_tx_s1_readdata[25] => write_data_fifo_tx_s1_readdata[25].IN1write_data_fifo_tx_s1_readdata[26] => write_data_fifo_tx_s1_readdata[26].IN1write_data_fifo_tx_s1_readdata[27] => write_data_fifo_tx_s1_readdata[27].IN1write_data_fifo_tx_s1_readdata[28] => write_data_fifo_tx_s1_readdata[28].IN1write_data_fifo_tx_s1_readdata[29] => write_data_fifo_tx_s1_readdata[29].IN1write_data_fifo_tx_s1_readdata[30] => write_data_fifo_tx_s1_readdata[30].IN1write_data_fifo_tx_s1_readdata[31] => write_data_fifo_tx_s1_readdata[31].IN1write_data_fifo_tx_s1_writedata[0] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[1] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[2] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[3] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[4] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[5] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[6] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[7] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[8] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[9] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[10] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[11] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[12] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[13] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[14] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[15] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[16] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[17] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[18] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[19] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[20] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[21] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[22] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[23] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[24] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[25] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[26] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[27] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[28] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[29] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[30] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_writedata[31] <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_writedatawrite_data_fifo_tx_s1_chipselect <= altera_merlin_slave_translator:write_data_fifo_tx_s1_translator.av_chipselectwrite_en_tx_s1_address[0] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_addresswrite_en_tx_s1_address[1] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_addresswrite_en_tx_s1_write <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writewrite_en_tx_s1_readdata[0] => write_en_tx_s1_readdata[0].IN1write_en_tx_s1_readdata[1] => write_en_tx_s1_readdata[1].IN1write_en_tx_s1_readdata[2] => write_en_tx_s1_readdata[2].IN1write_en_tx_s1_readdata[3] => write_en_tx_s1_readdata[3].IN1write_en_tx_s1_readdata[4] => write_en_tx_s1_readdata[4].IN1write_en_tx_s1_readdata[5] => write_en_tx_s1_readdata[5].IN1write_en_tx_s1_readdata[6] => write_en_tx_s1_readdata[6].IN1write_en_tx_s1_readdata[7] => write_en_tx_s1_readdata[7].IN1write_en_tx_s1_readdata[8] => write_en_tx_s1_readdata[8].IN1write_en_tx_s1_readdata[9] => write_en_tx_s1_readdata[9].IN1write_en_tx_s1_readdata[10] => write_en_tx_s1_readdata[10].IN1write_en_tx_s1_readdata[11] => write_en_tx_s1_readdata[11].IN1write_en_tx_s1_readdata[12] => write_en_tx_s1_readdata[12].IN1write_en_tx_s1_readdata[13] => write_en_tx_s1_readdata[13].IN1write_en_tx_s1_readdata[14] => write_en_tx_s1_readdata[14].IN1write_en_tx_s1_readdata[15] => write_en_tx_s1_readdata[15].IN1write_en_tx_s1_readdata[16] => write_en_tx_s1_readdata[16].IN1write_en_tx_s1_readdata[17] => write_en_tx_s1_readdata[17].IN1write_en_tx_s1_readdata[18] => write_en_tx_s1_readdata[18].IN1write_en_tx_s1_readdata[19] => write_en_tx_s1_readdata[19].IN1write_en_tx_s1_readdata[20] => write_en_tx_s1_readdata[20].IN1write_en_tx_s1_readdata[21] => write_en_tx_s1_readdata[21].IN1write_en_tx_s1_readdata[22] => write_en_tx_s1_readdata[22].IN1write_en_tx_s1_readdata[23] => write_en_tx_s1_readdata[23].IN1write_en_tx_s1_readdata[24] => write_en_tx_s1_readdata[24].IN1write_en_tx_s1_readdata[25] => write_en_tx_s1_readdata[25].IN1write_en_tx_s1_readdata[26] => write_en_tx_s1_readdata[26].IN1write_en_tx_s1_readdata[27] => write_en_tx_s1_readdata[27].IN1write_en_tx_s1_readdata[28] => write_en_tx_s1_readdata[28].IN1write_en_tx_s1_readdata[29] => write_en_tx_s1_readdata[29].IN1write_en_tx_s1_readdata[30] => write_en_tx_s1_readdata[30].IN1write_en_tx_s1_readdata[31] => write_en_tx_s1_readdata[31].IN1write_en_tx_s1_writedata[0] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[1] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[2] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[3] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[4] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[5] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[6] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[7] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[8] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[9] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[10] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[11] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[12] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[13] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[14] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[15] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[16] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[17] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[18] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[19] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[20] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[21] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[22] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[23] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[24] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[25] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[26] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[27] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[28] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[29] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[30] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_writedata[31] <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_writedatawrite_en_tx_s1_chipselect <= altera_merlin_slave_translator:write_en_tx_s1_translator.av_chipselect|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:led_pio_test_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:timecode_rx_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:timecode_ready_rx_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:data_flag_rx_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:data_read_en_rx_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:fifo_full_rx_status_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:fifo_empty_rx_status_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:link_start_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:auto_start_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writedata[4] => av_writedata[4].DATAINuav_writedata[5] => av_writedata[5].DATAINuav_writedata[6] => av_writedata[6].DATAINuav_writedata[7] => av_writedata[7].DATAINuav_writedata[8] => av_writedata[8].DATAINuav_writedata[9] => av_writedata[9].DATAINuav_writedata[10] => av_writedata[10].DATAINuav_writedata[11] => av_writedata[11].DATAINuav_writedata[12] => av_writedata[12].DATAINuav_writedata[13] => av_writedata[13].DATAINuav_writedata[14] => av_writedata[14].DATAINuav_writedata[15] => av_writedata[15].DATAINuav_writedata[16] => av_writedata[16].DATAINuav_writedata[17] => av_writedata[17].DATAINuav_writedata[18] => av_writedata[18].DATAINuav_writedata[19] => av_writedata[19].DATAINuav_writedata[20] => av_writedata[20].DATAINuav_writedata[21] => av_writedata[21].DATAINuav_writedata[22] => av_writedata[22].DATAINuav_writedata[23] => av_writedata[23].DATAINuav_writedata[24] => av_writedata[24].DATAINuav_writedata[25] => av_writedata[25].DATAINuav_writedata[26] => av_writedata[26].DATAINuav_writedata[27] => av_writedata[27].DATAINuav_writedata[28] => av_writedata[28].DATAINuav_writedata[29] => av_writedata[29].DATAINuav_writedata[30] => av_writedata[30].DATAINuav_writedata[31] => av_writedata[31].DATAINuav_write => av_writebyteenable.IN0uav_write => av_write.IN1uav_write => av_waitrequest_generated.OUTPUTSELECTuav_write => av_begintransfer.IN0uav_write => end_beginbursttransfer.IN1uav_write => always21.IN1uav_write => in_transfer.OUTPUTSELECTuav_read => av_read.IN1uav_read => read_latency_shift_reg.IN1uav_read => av_outputenable.OUTPUTSELECTuav_read => av_begintransfer.IN1uav_read => av_beginbursttransfer.OUTPUTSELECTuav_burstcount[0] => Equal2.IN2uav_burstcount[1] => Equal2.IN1uav_burstcount[2] => av_burstcount[0].DATAINuav_burstcount[2] => Equal2.IN0uav_byteenable[0] => av_writebyteenable.IN1uav_byteenable[0] => av_byteenable[0].DATAINuav_byteenable[1] => ~NO_FANOUT~uav_byteenable[2] => ~NO_FANOUT~uav_byteenable[3] => ~NO_FANOUT~uav_lock => av_lock.DATAINuav_debugaccess => av_debugaccess.DATAINuav_clken => ~NO_FANOUT~uav_readdatavalid <= read_latency_shift_reg[0].DB_MAX_OUTPUT_PORT_TYPEuav_waitrequest <= uav_waitrequest.DB_MAX_OUTPUT_PORT_TYPEuav_readdata[0] <= av_readdata_pre[0].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[1] <= av_readdata_pre[1].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[2] <= av_readdata_pre[2].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[3] <= av_readdata_pre[3].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[4] <= av_readdata_pre[4].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[5] <= av_readdata_pre[5].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[6] <= av_readdata_pre[6].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[7] <= av_readdata_pre[7].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[8] <= av_readdata_pre[8].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[9] <= av_readdata_pre[9].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[10] <= av_readdata_pre[10].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[11] <= av_readdata_pre[11].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[12] <= av_readdata_pre[12].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[13] <= av_readdata_pre[13].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[14] <= av_readdata_pre[14].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[15] <= av_readdata_pre[15].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[16] <= av_readdata_pre[16].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[17] <= av_readdata_pre[17].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[18] <= av_readdata_pre[18].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[19] <= av_readdata_pre[19].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[20] <= av_readdata_pre[20].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[21] <= av_readdata_pre[21].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[22] <= av_readdata_pre[22].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[23] <= av_readdata_pre[23].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[24] <= av_readdata_pre[24].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[25] <= av_readdata_pre[25].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[26] <= av_readdata_pre[26].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[27] <= av_readdata_pre[27].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[28] <= av_readdata_pre[28].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[29] <= av_readdata_pre[29].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[30] <= av_readdata_pre[30].DB_MAX_OUTPUT_PORT_TYPEuav_readdata[31] <= av_readdata_pre[31].DB_MAX_OUTPUT_PORT_TYPEuav_response[0] <= <GND>uav_response[1] <= <GND>uav_writeresponsevalid <= av_writeresponsevalid.DB_MAX_OUTPUT_PORT_TYPEav_address[0] <= uav_address[2].DB_MAX_OUTPUT_PORT_TYPEav_address[1] <= uav_address[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[0] <= uav_writedata[0].DB_MAX_OUTPUT_PORT_TYPEav_writedata[1] <= uav_writedata[1].DB_MAX_OUTPUT_PORT_TYPEav_writedata[2] <= uav_writedata[2].DB_MAX_OUTPUT_PORT_TYPEav_writedata[3] <= uav_writedata[3].DB_MAX_OUTPUT_PORT_TYPEav_writedata[4] <= uav_writedata[4].DB_MAX_OUTPUT_PORT_TYPEav_writedata[5] <= uav_writedata[5].DB_MAX_OUTPUT_PORT_TYPEav_writedata[6] <= uav_writedata[6].DB_MAX_OUTPUT_PORT_TYPEav_writedata[7] <= uav_writedata[7].DB_MAX_OUTPUT_PORT_TYPEav_writedata[8] <= uav_writedata[8].DB_MAX_OUTPUT_PORT_TYPEav_writedata[9] <= uav_writedata[9].DB_MAX_OUTPUT_PORT_TYPEav_writedata[10] <= uav_writedata[10].DB_MAX_OUTPUT_PORT_TYPEav_writedata[11] <= uav_writedata[11].DB_MAX_OUTPUT_PORT_TYPEav_writedata[12] <= uav_writedata[12].DB_MAX_OUTPUT_PORT_TYPEav_writedata[13] <= uav_writedata[13].DB_MAX_OUTPUT_PORT_TYPEav_writedata[14] <= uav_writedata[14].DB_MAX_OUTPUT_PORT_TYPEav_writedata[15] <= uav_writedata[15].DB_MAX_OUTPUT_PORT_TYPEav_writedata[16] <= uav_writedata[16].DB_MAX_OUTPUT_PORT_TYPEav_writedata[17] <= uav_writedata[17].DB_MAX_OUTPUT_PORT_TYPEav_writedata[18] <= uav_writedata[18].DB_MAX_OUTPUT_PORT_TYPEav_writedata[19] <= uav_writedata[19].DB_MAX_OUTPUT_PORT_TYPEav_writedata[20] <= uav_writedata[20].DB_MAX_OUTPUT_PORT_TYPEav_writedata[21] <= uav_writedata[21].DB_MAX_OUTPUT_PORT_TYPEav_writedata[22] <= uav_writedata[22].DB_MAX_OUTPUT_PORT_TYPEav_writedata[23] <= uav_writedata[23].DB_MAX_OUTPUT_PORT_TYPEav_writedata[24] <= uav_writedata[24].DB_MAX_OUTPUT_PORT_TYPEav_writedata[25] <= uav_writedata[25].DB_MAX_OUTPUT_PORT_TYPEav_writedata[26] <= uav_writedata[26].DB_MAX_OUTPUT_PORT_TYPEav_writedata[27] <= uav_writedata[27].DB_MAX_OUTPUT_PORT_TYPEav_writedata[28] <= uav_writedata[28].DB_MAX_OUTPUT_PORT_TYPEav_writedata[29] <= uav_writedata[29].DB_MAX_OUTPUT_PORT_TYPEav_writedata[30] <= uav_writedata[30].DB_MAX_OUTPUT_PORT_TYPEav_writedata[31] <= uav_writedata[31].DB_MAX_OUTPUT_PORT_TYPEav_write <= av_write.DB_MAX_OUTPUT_PORT_TYPEav_read <= av_read.DB_MAX_OUTPUT_PORT_TYPEav_burstcount[0] <= uav_burstcount[2].DB_MAX_OUTPUT_PORT_TYPEav_byteenable[0] <= uav_byteenable[0].DB_MAX_OUTPUT_PORT_TYPEav_writebyteenable[0] <= av_writebyteenable.DB_MAX_OUTPUT_PORT_TYPEav_begintransfer <= av_begintransfer.DB_MAX_OUTPUT_PORT_TYPEav_chipselect <= av_chipselect.DB_MAX_OUTPUT_PORT_TYPEav_beginbursttransfer <= av_beginbursttransfer.DB_MAX_OUTPUT_PORT_TYPEav_lock <= uav_lock.DB_MAX_OUTPUT_PORT_TYPEav_clken <= <VCC>av_debugaccess <= uav_debugaccess.DB_MAX_OUTPUT_PORT_TYPEav_outputenable <= av_outputenable.DB_MAX_OUTPUT_PORT_TYPEav_readdata[0] => av_readdata_pre[0].DATAINav_readdata[1] => av_readdata_pre[1].DATAINav_readdata[2] => av_readdata_pre[2].DATAINav_readdata[3] => av_readdata_pre[3].DATAINav_readdata[4] => av_readdata_pre[4].DATAINav_readdata[5] => av_readdata_pre[5].DATAINav_readdata[6] => av_readdata_pre[6].DATAINav_readdata[7] => av_readdata_pre[7].DATAINav_readdata[8] => av_readdata_pre[8].DATAINav_readdata[9] => av_readdata_pre[9].DATAINav_readdata[10] => av_readdata_pre[10].DATAINav_readdata[11] => av_readdata_pre[11].DATAINav_readdata[12] => av_readdata_pre[12].DATAINav_readdata[13] => av_readdata_pre[13].DATAINav_readdata[14] => av_readdata_pre[14].DATAINav_readdata[15] => av_readdata_pre[15].DATAINav_readdata[16] => av_readdata_pre[16].DATAINav_readdata[17] => av_readdata_pre[17].DATAINav_readdata[18] => av_readdata_pre[18].DATAINav_readdata[19] => av_readdata_pre[19].DATAINav_readdata[20] => av_readdata_pre[20].DATAINav_readdata[21] => av_readdata_pre[21].DATAINav_readdata[22] => av_readdata_pre[22].DATAINav_readdata[23] => av_readdata_pre[23].DATAINav_readdata[24] => av_readdata_pre[24].DATAINav_readdata[25] => av_readdata_pre[25].DATAINav_readdata[26] => av_readdata_pre[26].DATAINav_readdata[27] => av_readdata_pre[27].DATAINav_readdata[28] => av_readdata_pre[28].DATAINav_readdata[29] => av_readdata_pre[29].DATAINav_readdata[30] => av_readdata_pre[30].DATAINav_readdata[31] => av_readdata_pre[31].DATAINav_readdatavalid => ~NO_FANOUT~av_waitrequest => ~NO_FANOUT~av_response[0] => ~NO_FANOUT~av_response[1] => ~NO_FANOUT~av_writeresponsevalid => uav_writeresponsevalid.DATAIN|SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:link_disable_s1_translatorclk => in_transfer.CLKclk => end_beginbursttransfer.CLKclk => end_begintransfer.CLKclk => av_chipselect_pre.CLKclk => av_outputenable_pre.CLKclk => read_latency_shift_reg[0].CLKclk => av_readdata_pre[0].CLKclk => av_readdata_pre[1].CLKclk => av_readdata_pre[2].CLKclk => av_readdata_pre[3].CLKclk => av_readdata_pre[4].CLKclk => av_readdata_pre[5].CLKclk => av_readdata_pre[6].CLKclk => av_readdata_pre[7].CLKclk => av_readdata_pre[8].CLKclk => av_readdata_pre[9].CLKclk => av_readdata_pre[10].CLKclk => av_readdata_pre[11].CLKclk => av_readdata_pre[12].CLKclk => av_readdata_pre[13].CLKclk => av_readdata_pre[14].CLKclk => av_readdata_pre[15].CLKclk => av_readdata_pre[16].CLKclk => av_readdata_pre[17].CLKclk => av_readdata_pre[18].CLKclk => av_readdata_pre[19].CLKclk => av_readdata_pre[20].CLKclk => av_readdata_pre[21].CLKclk => av_readdata_pre[22].CLKclk => av_readdata_pre[23].CLKclk => av_readdata_pre[24].CLKclk => av_readdata_pre[25].CLKclk => av_readdata_pre[26].CLKclk => av_readdata_pre[27].CLKclk => av_readdata_pre[28].CLKclk => av_readdata_pre[29].CLKclk => av_readdata_pre[30].CLKclk => av_readdata_pre[31].CLKclk => waitrequest_reset_override.CLKclk => wait_latency_counter[0].CLKclk => wait_latency_counter[1].CLKreset => in_transfer.ACLRreset => end_beginbursttransfer.ACLRreset => end_begintransfer.ACLRreset => av_chipselect_pre.ACLRreset => av_outputenable_pre.ACLRreset => read_latency_shift_reg[0].ACLRreset => av_readdata_pre[0].ACLRreset => av_readdata_pre[1].ACLRreset => av_readdata_pre[2].ACLRreset => av_readdata_pre[3].ACLRreset => av_readdata_pre[4].ACLRreset => av_readdata_pre[5].ACLRreset => av_readdata_pre[6].ACLRreset => av_readdata_pre[7].ACLRreset => av_readdata_pre[8].ACLRreset => av_readdata_pre[9].ACLRreset => av_readdata_pre[10].ACLRreset => av_readdata_pre[11].ACLRreset => av_readdata_pre[12].ACLRreset => av_readdata_pre[13].ACLRreset => av_readdata_pre[14].ACLRreset => av_readdata_pre[15].ACLRreset => av_readdata_pre[16].ACLRreset => av_readdata_pre[17].ACLRreset => av_readdata_pre[18].ACLRreset => av_readdata_pre[19].ACLRreset => av_readdata_pre[20].ACLRreset => av_readdata_pre[21].ACLRreset => av_readdata_pre[22].ACLRreset => av_readdata_pre[23].ACLRreset => av_readdata_pre[24].ACLRreset => av_readdata_pre[25].ACLRreset => av_readdata_pre[26].ACLRreset => av_readdata_pre[27].ACLRreset => av_readdata_pre[28].ACLRreset => av_readdata_pre[29].ACLRreset => av_readdata_pre[30].ACLRreset => av_readdata_pre[31].ACLRreset => waitrequest_reset_override.PRESETreset => wait_latency_counter[0].ACLRreset => wait_latency_counter[1].ACLRuav_address[0] => ~NO_FANOUT~uav_address[1] => ~NO_FANOUT~uav_address[2] => av_address[0].DATAINuav_address[3] => av_address[1].DATAINuav_address[4] => ~NO_FANOUT~uav_address[5] => ~NO_FANOUT~uav_address[6] => ~NO_FANOUT~uav_address[7] => ~NO_FANOUT~uav_address[8] => ~NO_FANOUT~uav_address[9] => ~NO_FANOUT~uav_address[10] => ~NO_FANOUT~uav_address[11] => ~NO_FANOUT~uav_address[12] => ~NO_FANOUT~uav_address[13] => ~NO_FANOUT~uav_address[14] => ~NO_FANOUT~uav_address[15] => ~NO_FANOUT~uav_address[16] => ~NO_FANOUT~uav_address[17] => ~NO_FANOUT~uav_address[18] => ~NO_FANOUT~uav_address[19] => ~NO_FANOUT~uav_address[20] => ~NO_FANOUT~uav_address[21] => ~NO_FANOUT~uav_address[22] => ~NO_FANOUT~uav_address[23] => ~NO_FANOUT~uav_address[24] => ~NO_FANOUT~uav_address[25] => ~NO_FANOUT~uav_address[26] => ~NO_FANOUT~uav_address[27] => ~NO_FANOUT~uav_address[28] => ~NO_FANOUT~uav_address[29] => ~NO_FANOUT~uav_writedata[0] => av_writedata[0].DATAINuav_writedata[1] => av_writedata[1].DATAINuav_writedata[2] => av_writedata[2].DATAINuav_writedata[3] => av_writedata[3].DATAINuav_writ