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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [output_files/] [spw_fifo_ulight.sta.summary] - Rev 35

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TimeQuest Timing Analyzer Summary
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Type  : Slow 1100mV 85C Model Setup 'FPGA_CLK1_50'
Slack : 1.196
TNS   : 0.000

Type  : Slow 1100mV 85C Model Hold 'FPGA_CLK1_50'
Slack : 0.271
TNS   : 0.000

Type  : Slow 1100mV 85C Model Recovery 'FPGA_CLK1_50'
Slack : 4.785
TNS   : 0.000

Type  : Slow 1100mV 85C Model Removal 'FPGA_CLK1_50'
Slack : 0.979
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
Slack : 0.538
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'din_a'
Slack : 0.597
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
Slack : 0.657
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
Slack : 0.679
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
Slack : 1.084
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
Slack : 1.250
TNS   : 0.000

Type  : Slow 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
Slack : 4.202
TNS   : 0.000

Type  : Slow 1100mV 0C Model Setup 'FPGA_CLK1_50'
Slack : 1.204
TNS   : 0.000

Type  : Slow 1100mV 0C Model Hold 'FPGA_CLK1_50'
Slack : 0.253
TNS   : 0.000

Type  : Slow 1100mV 0C Model Recovery 'FPGA_CLK1_50'
Slack : 4.852
TNS   : 0.000

Type  : Slow 1100mV 0C Model Removal 'FPGA_CLK1_50'
Slack : 0.920
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
Slack : 0.465
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'din_a'
Slack : 0.633
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
Slack : 0.663
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
Slack : 0.716
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
Slack : 1.117
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
Slack : 1.250
TNS   : 0.000

Type  : Slow 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
Slack : 4.284
TNS   : 0.000

Type  : Fast 1100mV 85C Model Setup 'FPGA_CLK1_50'
Slack : 4.542
TNS   : 0.000

Type  : Fast 1100mV 85C Model Hold 'FPGA_CLK1_50'
Slack : 0.162
TNS   : 0.000

Type  : Fast 1100mV 85C Model Recovery 'FPGA_CLK1_50'
Slack : 6.857
TNS   : 0.000

Type  : Fast 1100mV 85C Model Removal 'FPGA_CLK1_50'
Slack : 0.574
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
Slack : 0.799
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'din_a'
Slack : 0.812
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
Slack : 0.897
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
Slack : 0.920
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
Slack : 1.250
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
Slack : 1.333
TNS   : 0.000

Type  : Fast 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
Slack : 4.076
TNS   : 0.000

Type  : Fast 1100mV 0C Model Setup 'FPGA_CLK1_50'
Slack : 5.038
TNS   : 0.000

Type  : Fast 1100mV 0C Model Hold 'FPGA_CLK1_50'
Slack : 0.146
TNS   : 0.000

Type  : Fast 1100mV 0C Model Recovery 'FPGA_CLK1_50'
Slack : 7.031
TNS   : 0.000

Type  : Fast 1100mV 0C Model Removal 'FPGA_CLK1_50'
Slack : 0.524
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
Slack : 0.793
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'din_a'
Slack : 0.828
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
Slack : 0.961
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
Slack : 0.969
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
Slack : 1.250
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
Slack : 1.399
TNS   : 0.000

Type  : Fast 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
Slack : 4.039
TNS   : 0.000

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