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[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [ipcore_dir/] [_xmsgs/] [pn_parser.xmsgs] - Rev 14
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<?xml version="1.0" encoding="UTF-8"?><!-- IMPORTANT: This is an internal file that has been generated --><!-- by the Xilinx ISE software. Any direct editing or --><!-- changes made to this file may result in unpredictable --><!-- behavior or data corruption. It is strongly advised that --><!-- users do not edit the contents of this file. --><!-- --><!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --><messages><msg type="info" file="ProjectMgmt" num="1769" ><arg fmt="%s" index="1">Analyzing Verilog file \"C:/Users/mjlyons/workspace/vSPI/projnav/xps/pcores/spiifc_v1_00_a/devl/projnav/ipcore_dir/spiloopmem.v\" into library work</arg></msg></messages>