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[/] [amber/] [trunk/] - Rev 63

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Rev Log message Author Age Path
63 Add support for Xilinx ISim Verilog simulator.
Remove Virtex-6 files.
csantifort 4307d 18h /amber/trunk/
62 Added source for amber-pkt2mem csantifort 4460d 06h /amber/trunk/
61 Add new netowkr based boot loader.
Remove support for Virtex. Spartan 6 only now.
csantifort 4594d 12h /amber/trunk/
60 Bug fix; removed a combinational loop from the a25_decode logic. csantifort 4812d 08h /amber/trunk/
59 Added modelsim script for reloading a wlf file after a simulation has been rerun. csantifort 4882d 06h /amber/trunk/
58 Use TB.clk_count for the decompiler messages and removed the local counter csantifort 4882d 09h /amber/trunk/
57 Add some debug messages csantifort 4882d 09h /amber/trunk/
56 Remove the timeouts file from svn. Its an output file and gets now just gets created automatically
when sims are run for the first time.
csantifort 4882d 09h /amber/trunk/
55 Added sudo to rm mnt command csantifort 4882d 09h /amber/trunk/
54 Bug fix for bug reported by Botao Lee. The mode bits in the decode stage did not change immediately
after a mode switch from a teqp instruction, but 1 cycle later. This meant the wrong set of registers
was selected for writing to for 1 clock cycle.
csantifort 4899d 09h /amber/trunk/
53 Cleaned up Amber Verilog, removing unused signals. csantifort 4914d 07h /amber/trunk/
52 Fixed typo in notes on creating DDR memory interfaces using coregen csantifort 4914d 07h /amber/trunk/
51 Revert vmlinux back to 48. csantifort 4955d 07h /amber/trunk/
50 Revert to previous version csantifort 4955d 07h /amber/trunk/
49 Added a note n how to change timeouts csantifort 4955d 07h /amber/trunk/
48 Fixed a bug in linux that caused the os to not return to the running application after an interrupt.
Hello-world now runs stand-alone again.
Added initrd-200k-dhry, a disk image that uses the dhry program for init.
csantifort 4959d 13h /amber/trunk/
47 Changed V6 VCo from 1000Mhz to 1200 MHz csantifort 4979d 11h /amber/trunk/
46 svn ignore vmlinux.dis and vmlinux.mem csantifort 4987d 08h /amber/trunk/
45 Store vmlinux.mem and vmlinux.dis in compressed form csantifort 4987d 09h /amber/trunk/
44 Updated vmlinux image based on last change csantifort 4987d 09h /amber/trunk/
43 Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test.
Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.
csantifort 4987d 09h /amber/trunk/
42 Added write buffer - fixes bug if wishbone writes takes multiple cycles to complete csantifort 5005d 05h /amber/trunk/
41 Added instructions on how to use Coregen to create the Spartan-6 DDR3 memory interface. csantifort 5006d 14h /amber/trunk/
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.
csantifort 5011d 06h /amber/trunk/
39 Added a second level of buffering to a25_wishbone_buf to fix a lockup
bug when write acks to not return immediately, and also to improve performance slightly
csantifort 5012d 07h /amber/trunk/
38 support 128-bit wishbone now used for a25 core csantifort 5013d 07h /amber/trunk/
37 128-bit wide boot memory module csantifort 5014d 05h /amber/trunk/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 5014d 06h /amber/trunk/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 5015d 14h /amber/trunk/
34 Tweaked strcpy function to speed it up slightly csantifort 5016d 10h /amber/trunk/

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