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Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] - Rev 33

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Rev	Log message	Author	Age	Path
32	Added clock cycle counting register to test_module to support dhrystone performance measurement	csantifort	5052d 05h	/amber/trunk/hw/
30	Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays	csantifort	5065d 11h	/amber/trunk/hw/
29	Use lgo command for saving waveforms in modelsim	csantifort	5067d 05h	/amber/trunk/hw/
27	Got working with cadence nc simulator	csantifort	5100d 12h	/amber/trunk/hw/
25	Bug fix: boot-loader.mem became larger that the allowed 8k byte boot mem size. Removed a struct in elfsplitter.c thats only used for debug - this reduced boot-loader.mem enough so that it fits again. Tidy up: Removed a debug message from hw/tools/run.sh	csantifort	5107d 10h	/amber/trunk/hw/
23	Split the source files list into a Vertex-6 only list and a Spartan-6 only list. That way users don;t need to delete files from the list manually if they only have a setup for one of the FPGA types.	csantifort	5109d 11h	/amber/trunk/hw/
21	Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start.	csantifort	5113d 10h	/amber/trunk/hw/
20	Added feature to A25 core to directly use a read value from the write back stage to reduce the stall to 1 cycle when there is a register conflict with the following instruction. This increases performance by about 3%.	csantifort	5134d 11h	/amber/trunk/hw/
19	Create a configuration log file as part of the synthesis flow. This file is a useful reference to tell the different bitfiles apart.	csantifort	5134d 11h	/amber/trunk/hw/
17	amber25 core bug fix. The return address for irq interrupts was off by 4 bytes when the interrupt occurred during a stm instruction with the following instruction having some register conflicts. Added test irq_stm to catch the bug. Cleaned up some header descriptions	csantifort	5138d 09h	/amber/trunk/hw/
16	Deleted the old version of the 3-state amber core. Its replaced with amber23. Added the 5-state Amber core.	csantifort	5140d 23h	/amber/trunk/hw/
15	Copied amber to amber23, Many system changes to support new amber25 core.	csantifort	5140d 23h	/amber/trunk/hw/
14	Re-wrote the behavioral clock generation code to more accurately calculate the sys_clk frequency. The previous version was not producing the correct frequency at higher frequenies due to rounding errors.	csantifort	5142d 11h	/amber/trunk/hw/
13	Bug fix - added an extra state to the rx state machine to properly align reading the uart input to the middle of each bit.	csantifort	5142d 11h	/amber/trunk/hw/
12	Added INITIALIZE_TO_ZERO parameter to keep instantiation idendical to generic sram models. The parameter is not used in the Xilinx models (they always init to zero) but it used in the generic models.	csantifort	5142d 11h	/amber/trunk/hw/
11	Added vmlinux test.	csantifort	5157d 11h	/amber/trunk/hw/
10	Removed parameters for unused peruipheral modules	csantifort	5158d 15h	/amber/trunk/hw/
9	Change the format of mcr and mrc listings so they exactly match the dissasembly produced by the gnu tools. Write ip instead of r12 in listings.	csantifort	5158d 15h	/amber/trunk/hw/
8	Change the value in the ID register to be compatible with the Linux code that parses it and picks a processor type.	csantifort	5158d 15h	/amber/trunk/hw/
7	Added instructions to use Veritak simulator. Removed some unused functions from memory_configuration.v.	csantifort	5167d 06h	/amber/trunk/hw/

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[/] [amber/] [trunk/] [hw/] - Rev 33

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