URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] - Rev 80

Rev	Log message	Author	Age	Path
54	Bug fix for bug reported by Botao Lee. The mode bits in the decode stage did not change immediately after a mode switch from a teqp instruction, but 1 cycle later. This meant the wrong set of registers was selected for writing to for 1 clock cycle.	csantifort	4753d 09h	/amber/trunk/hw/
53	Cleaned up Amber Verilog, removing unused signals.	csantifort	4768d 07h	/amber/trunk/hw/
52	Fixed typo in notes on creating DDR memory interfaces using coregen	csantifort	4768d 07h	/amber/trunk/hw/
50	Revert to previous version	csantifort	4809d 07h	/amber/trunk/hw/
49	Added a note n how to change timeouts	csantifort	4809d 07h	/amber/trunk/hw/
48	Fixed a bug in linux that caused the os to not return to the running application after an interrupt. Hello-world now runs stand-alone again. Added initrd-200k-dhry, a disk image that uses the dhry program for init.	csantifort	4813d 14h	/amber/trunk/hw/
47	Changed V6 VCo from 1000Mhz to 1200 MHz	csantifort	4833d 11h	/amber/trunk/hw/
45	Store vmlinux.mem and vmlinux.dis in compressed form	csantifort	4841d 09h	/amber/trunk/hw/
43	Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test. Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.	csantifort	4841d 09h	/amber/trunk/hw/
42	Added write buffer - fixes bug if wishbone writes takes multiple cycles to complete	csantifort	4859d 06h	/amber/trunk/hw/