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[/] [amber/] [trunk/] [hw/] [tests/] [cache1.S] - Rev 66

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Rev Log message Author Age Path
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 4954d 22h /amber/trunk/hw/tests/cache1.S
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 5046d 09h /amber/trunk/hw/tests/cache1.S
2 Baseline release of the Amber 2 core csantifort 5076d 20h /amber/trunk/hw/tests/cache1.S

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