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[/] [amber/] [trunk/] [hw/] [vlog/] - Rev 33

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Rev Log message Author Age Path
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 5090d 21h /amber/trunk/hw/vlog/
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 5104d 03h /amber/trunk/hw/vlog/
27 Got working with cadence nc simulator csantifort 5139d 04h /amber/trunk/hw/vlog/
20 Added feature to A25 core to directly use a read value from the write back stage
to reduce the stall to 1 cycle when there is a register conflict with the
following instruction. This increases performance by about 3%.		 csantifort 5173d 03h /amber/trunk/hw/vlog/
17 amber25 core bug fix. The return address for irq interrupts was off by 4 bytes
when the interrupt occurred during a stm instruction with the following instruction
having some register conflicts. Added test irq_stm to catch the bug.
Cleaned up some header descriptions		 csantifort 5177d 01h /amber/trunk/hw/vlog/
16 Deleted the old version of the 3-state amber core. Its replaced with amber23.
Added the 5-state Amber core.		 csantifort 5179d 15h /amber/trunk/hw/vlog/
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 5179d 15h /amber/trunk/hw/vlog/
14 Re-wrote the behavioral clock generation code to more accurately
calculate the sys_clk frequency. The previous version was not
producing the correct frequency at higher frequenies due to
rounding errors.		 csantifort 5181d 03h /amber/trunk/hw/vlog/
13 Bug fix - added an extra state to the rx state machine to properly align
reading the uart input to the middle of each bit.		 csantifort 5181d 03h /amber/trunk/hw/vlog/
12 Added INITIALIZE_TO_ZERO parameter to keep instantiation
idendical to generic sram models. The parameter is not used
in the Xilinx models (they always init to zero) but it used
in the generic models.		 csantifort 5181d 03h /amber/trunk/hw/vlog/
11 Added vmlinux test. csantifort 5196d 03h /amber/trunk/hw/vlog/
10 Removed parameters for unused peruipheral modules csantifort 5197d 07h /amber/trunk/hw/vlog/
9 Change the format of mcr and mrc listings so they exactly match the dissasembly produced by the gnu tools.
Write ip instead of r12 in listings.		 csantifort 5197d 07h /amber/trunk/hw/vlog/
8 Change the value in the ID register to be compatible with the Linux code that parses it and picks a processor type. csantifort 5197d 07h /amber/trunk/hw/vlog/
7 Added instructions to use Veritak simulator.
Removed some unused functions from memory_configuration.v.		 csantifort 5205d 22h /amber/trunk/hw/vlog/
2 Baseline release of the Amber 2 core csantifort 5210d 02h /amber/trunk/hw/vlog/

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