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[/] [amber/] [trunk/] [hw/] [vlog/] [amber25/] [a25_decode.v] - Rev 89

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Rev Log message Author Age Path
89 CHange registered outputs with non-zero initial values to wires with an internal register.
This works around an issue with Altera (Quartus) synthesis where any port registers are given an initial vale of zero.
csantifort 4055d 10h /amber/trunk/hw/vlog/amber25/a25_decode.v
88 Added the carry in fix added recently to the a23 core to a25 core. csantifort 4055d 11h /amber/trunk/hw/vlog/amber25/a25_decode.v
83 Fixed bug with carry bit - now only use the carry bit as an input to specific instruments that use it - add with carry and subtract with carry csantifort 4068d 18h /amber/trunk/hw/vlog/amber25/a25_decode.v
82 Fixed overflag bug, ldmia user regs bug and status_bits_mode set on non-ececuting command bug csantifort 4082d 06h /amber/trunk/hw/vlog/amber25/a25_decode.v
63 Add support for Xilinx ISim Verilog simulator.
Remove Virtex-6 files.
csantifort 4768d 19h /amber/trunk/hw/vlog/amber25/a25_decode.v
60 Bug fix; removed a combinational loop from the a25_decode logic. csantifort 5273d 09h /amber/trunk/hw/vlog/amber25/a25_decode.v
53 Cleaned up Amber Verilog, removing unused signals. csantifort 5375d 08h /amber/trunk/hw/vlog/amber25/a25_decode.v
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 5476d 15h /amber/trunk/hw/vlog/amber25/a25_decode.v
20 Added feature to A25 core to directly use a read value from the write back stage
to reduce the stall to 1 cycle when there is a register conflict with the
following instruction. This increases performance by about 3%.
csantifort 5561d 14h /amber/trunk/hw/vlog/amber25/a25_decode.v
17 amber25 core bug fix. The return address for irq interrupts was off by 4 bytes
when the interrupt occurred during a stm instruction with the following instruction
having some register conflicts. Added test irq_stm to catch the bug.
Cleaned up some header descriptions
csantifort 5565d 12h /amber/trunk/hw/vlog/amber25/a25_decode.v
16 Deleted the old version of the 3-state amber core. Its replaced with amber23.
Added the 5-state Amber core.
csantifort 5568d 02h /amber/trunk/hw/vlog/amber25/a25_decode.v

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