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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] - Rev 40

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Rev Log message Author Age Path
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.		 csantifort 5290d 02h /amber/trunk/hw/vlog/system/
38 support 128-bit wishbone now used for a25 core csantifort 5292d 02h /amber/trunk/hw/vlog/system/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 5293d 01h /amber/trunk/hw/vlog/system/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts		 csantifort 5294d 09h /amber/trunk/hw/vlog/system/
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 5297d 02h /amber/trunk/hw/vlog/system/
27 Got working with cadence nc simulator csantifort 5345d 10h /amber/trunk/hw/vlog/system/
17 amber25 core bug fix. The return address for irq interrupts was off by 4 bytes
when the interrupt occurred during a stm instruction with the following instruction
having some register conflicts. Added test irq_stm to catch the bug.
Cleaned up some header descriptions		 csantifort 5383d 06h /amber/trunk/hw/vlog/system/
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 5385d 21h /amber/trunk/hw/vlog/system/
14 Re-wrote the behavioral clock generation code to more accurately
calculate the sys_clk frequency. The previous version was not
producing the correct frequency at higher frequenies due to
rounding errors.		 csantifort 5387d 09h /amber/trunk/hw/vlog/system/
13 Bug fix - added an extra state to the rx state machine to properly align
reading the uart input to the middle of each bit.		 csantifort 5387d 09h /amber/trunk/hw/vlog/system/
11 Added vmlinux test. csantifort 5402d 09h /amber/trunk/hw/vlog/system/
10 Removed parameters for unused peruipheral modules csantifort 5403d 13h /amber/trunk/hw/vlog/system/
7 Added instructions to use Veritak simulator.
Removed some unused functions from memory_configuration.v.		 csantifort 5412d 03h /amber/trunk/hw/vlog/system/
2 Baseline release of the Amber 2 core csantifort 5416d 07h /amber/trunk/hw/vlog/system/

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