OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [sw/] - Rev 64

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
64 Support latest Xilinx ISE 14.5 software. csantifort 4464d 00h /amber/trunk/sw/
62 Added source for amber-pkt2mem csantifort 4616d 17h /amber/trunk/sw/
61 Add new netowkr based boot loader.
Remove support for Virtex. Spartan 6 only now.
csantifort 4750d 23h /amber/trunk/sw/
55 Added sudo to rm mnt command csantifort 5038d 20h /amber/trunk/sw/
51 Revert vmlinux back to 48. csantifort 5111d 18h /amber/trunk/sw/
50 Revert to previous version csantifort 5111d 18h /amber/trunk/sw/
49 Added a note n how to change timeouts csantifort 5111d 18h /amber/trunk/sw/
48 Fixed a bug in linux that caused the os to not return to the running application after an interrupt.
Hello-world now runs stand-alone again.
Added initrd-200k-dhry, a disk image that uses the dhry program for init.
csantifort 5116d 00h /amber/trunk/sw/
46 svn ignore vmlinux.dis and vmlinux.mem csantifort 5143d 20h /amber/trunk/sw/
45 Store vmlinux.mem and vmlinux.dis in compressed form csantifort 5143d 20h /amber/trunk/sw/
44 Updated vmlinux image based on last change csantifort 5143d 20h /amber/trunk/sw/
43 Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test.
Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.
csantifort 5143d 20h /amber/trunk/sw/
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.
csantifort 5167d 17h /amber/trunk/sw/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 5170d 17h /amber/trunk/sw/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 5172d 01h /amber/trunk/sw/
34 Tweaked strcpy function to speed it up slightly csantifort 5172d 21h /amber/trunk/sw/
33 Fixed bug in div assembly function. Handles negative numbers correctly.
Fixed bug in printf function, negative numbers now print correctly.
csantifort 5173d 18h /amber/trunk/sw/
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 5174d 18h /amber/trunk/sw/
31 Added dhrystone benchmark test csantifort 5174d 18h /amber/trunk/sw/
28 Moved function prototypes to .h file csantifort 5189d 19h /amber/trunk/sw/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.