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Rev Log message Author Age Path
129 Error counters changed. mohor 7592d 07h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7592d 08h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7592d 08h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7593d 04h /
125 Synchronization changed, error counters fixed. mohor 7597d 10h /
124 ALTERA_RAM supported. mohor 7617d 16h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7624d 21h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7624d 21h /
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7624d 21h /
120 This commit was manufactured by cvs2svn to create tag 'rel_15'. 7633d 18h /

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