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Rev Log message Author Age Path
151 When CAN was reset by setting the reset_mode signal in mode register, it
was possible that CAN was blocked for a short period of time. Problem
occured very rarly.
igorm 7180d 11h /
150 This commit was manufactured by cvs2svn to create tag 'rel_24'. 7199d 10h /
149 Fixed synchronization problem in real hardware when 0xf is used for TSEG1. igorm 7199d 10h /
148 This commit was manufactured by cvs2svn to create tag 'rel_23'. 7201d 17h /
147 Interrupt is always cleared for one clock after the irq register is read.
This fixes problems when CPU is using IRQs that are edge triggered.
igorm 7201d 17h /
146 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7201d 22h /
145 Arbitration bug fixed. igorm 7201d 22h /
144 This commit was manufactured by cvs2svn to create tag 'rel_21'. 7348d 14h /
143 Bit acceptance_filter_mode was inverted. igorm 7348d 14h /
142 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7367d 13h /
141 Core improved to pass all tests with the Bosch VHDL Reference system. igorm 7367d 13h /
140 I forgot to thange one signal name. igorm 7422d 11h /
139 Signal bus_off_on added. igorm 7422d 12h /
138 Header changed. Address latched to posedge. bus_off_on signal added. mohor 7461d 14h /
137 Header changed. mohor 7461d 14h /
136 Error counters changed. mohor 7461d 15h /
135 Header changed. mohor 7461d 15h /
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 7569d 12h /
133 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7575d 23h /
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7575d 23h /
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7575d 23h /
130 mbist signals updated according to newest convention markom 7575d 23h /
129 Error counters changed. mohor 7592d 08h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7592d 08h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7592d 08h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7593d 04h /
125 Synchronization changed, error counters fixed. mohor 7597d 10h /
124 ALTERA_RAM supported. mohor 7617d 16h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7624d 22h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7624d 22h /

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