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Rev Log message Author Age Path
152 Fixes for compatibility after the SW reset. igorm 7186d 02h /
151 When CAN was reset by setting the reset_mode signal in mode register, it
was possible that CAN was blocked for a short period of time. Problem
occured very rarly.
igorm 7188d 20h /
150 This commit was manufactured by cvs2svn to create tag 'rel_24'. 7207d 20h /
149 Fixed synchronization problem in real hardware when 0xf is used for TSEG1. igorm 7207d 20h /
148 This commit was manufactured by cvs2svn to create tag 'rel_23'. 7210d 03h /
147 Interrupt is always cleared for one clock after the irq register is read.
This fixes problems when CPU is using IRQs that are edge triggered.
igorm 7210d 03h /
146 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7210d 08h /
145 Arbitration bug fixed. igorm 7210d 08h /
144 This commit was manufactured by cvs2svn to create tag 'rel_21'. 7357d 00h /
143 Bit acceptance_filter_mode was inverted. igorm 7357d 00h /
142 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7375d 23h /
141 Core improved to pass all tests with the Bosch VHDL Reference system. igorm 7375d 23h /
140 I forgot to thange one signal name. igorm 7430d 21h /
139 Signal bus_off_on added. igorm 7430d 21h /
138 Header changed. Address latched to posedge. bus_off_on signal added. mohor 7470d 00h /
137 Header changed. mohor 7470d 00h /
136 Error counters changed. mohor 7470d 00h /
135 Header changed. mohor 7470d 00h /
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 7577d 22h /
133 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7584d 09h /
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7584d 09h /
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7584d 09h /
130 mbist signals updated according to newest convention markom 7584d 09h /
129 Error counters changed. mohor 7600d 17h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7600d 18h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7600d 18h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7601d 14h /
125 Synchronization changed, error counters fixed. mohor 7605d 20h /
124 ALTERA_RAM supported. mohor 7626d 02h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7633d 08h /

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