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[/] [can/] [trunk/] [sim/] - Rev 163

Rev	Log message	Author	Age	Path
161	New directory structure.	root	5754d 05h	/can/trunk/sim/
159	* empty log message *	igorm	7091d 12h	/trunk/sim/
141	Core improved to pass all tests with the Bosch VHDL Reference system.	igorm	7516d 09h	/trunk/sim/
127	Fixing the core to be Bosch VHDL Reference compatible.	mohor	7741d 04h	/trunk/sim/
119	Artisan RAMs added.	mohor	7782d 15h	/trunk/sim/
48	Actel APA ram supported.	mohor	7954d 02h	/trunk/sim/
35	Several registers added. Not finished, yet.	mohor	7969d 04h	/trunk/sim/
29	Overload fixed. Hard synchronization also enabled at the last bit of interframe.	mohor	7974d 06h	/trunk/sim/
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7974d 22h	/trunk/sim/
25	* empty log message *	mohor	7979d 10h	/trunk/sim/
24	backup.	mohor	7983d 23h	/trunk/sim/
18	When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.	mohor	7999d 11h	/trunk/sim/
16	rx_fifo is now working.	mohor	8000d 12h	/trunk/sim/
14	rx fifo added. Not 100 % verified, yet.	mohor	8005d 03h	/trunk/sim/
13	Temporary files (backup).	mohor	8005d 10h	/trunk/sim/
11	Acceptance filter added.	mohor	8006d 22h	/trunk/sim/
8	Testbench define file added. Clock divider register added.	mohor	8019d 09h	/trunk/sim/
5	Synchronization working.	mohor	8020d 10h	/trunk/sim/
4	Dir keeper.	mohor	8025d 08h	/trunk/sim/
2	Initial	mohor	8025d 08h	/trunk/sim/