URL https://opencores.org/ocsvn/potato/potato/trunk

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Rev	Log message	Author	Age	Path
30	Add testcase for a combination of instructions that fail when using cache	skordal	3673d 05h	/
29	Add reset functionality for the WB arbiter state machine	skordal	3676d 00h	/
28	Add rudimentary User's manual	skordal	3682d 00h	/
27	Prevent exceptions from being taken while stalling	skordal	3682d 02h	/
26	Prevent exceptions from being taken while stalling Jumping to an exception handler while stalling and waiting for a load/store instruction to finish can cause undefined results from the load/store instruction. This actually fixes the issue mentioned in revision r20.	skordal	3682d 04h	/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3684d 09h	/
24	Remove unused STRINGIFY macros	skordal	3684d 22h	/
23	Create branch to use for implementing a cache	skordal	3684d 22h	/
22	Fix the potato_get_badvaddr() macro	skordal	3684d 23h	/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3684d 23h	/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3684d 23h	/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3684d 23h	/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3686d 23h	/
17	Improve detection of unaligned instructions	skordal	3691d 06h	/
16	Correct grammar in source code comment	skordal	3691d 06h	/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3697d 23h	/
14	Improve detection of invalid instructions	skordal	3697d 23h	/
13	Add SHA256 benchmark code	skordal	3698d 04h	/
12	Update example design with correct bug-report URL and testbenches	skordal	3698d 06h	/
11	Correct FIFO file header	skordal	3698d 06h	/

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