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Rev Log message Author Age Path
151 Previous Work to generate test benching jguarin2002 4827d 08h /
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4841d 05h /
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4841d 08h /
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4841d 09h /
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4843d 21h /
146 Interruption Machine jguarin2002 4851d 15h /
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4856d 04h /
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4863d 08h /
143 working on result queue sync decoding signals jguarin2002 4868d 00h /
142 Additions for the State Machine jguarin2002 4872d 23h /
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4940d 00h /
140 Syncing: its awful work..... jguarin2002 4940d 06h /
139 Sync jguarin2002 4951d 20h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4956d 11h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4962d 12h /
136 gogogo jguarin2002 4964d 23h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4969d 00h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4970d 19h /
133 Added the instructions queue jguarin2002 4972d 11h /
132 There was amiss in the cross product datapath decoder jguarin2002 4976d 07h /

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