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Rev Log message Author Age Path
120 Beta 0 Adder LCELLS 373 jguarin2002 5016d 21h /raytrac/
119 382 LEs Adder, RTL viewer Check Ok jguarin2002 5017d 03h /raytrac/
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 5017d 10h /raytrac/
117 Official reduction achieved 12% jguarin2002 5017d 16h /raytrac/
116 Official Reduction is 7%: Adder 420 logic cells, trying to reach out at least 20 less cells jguarin2002 5017d 17h /raytrac/
115 Official Reduction is about 7% jguarin2002 5017d 17h /raytrac/
114 lost of time.. jguarin2002 5018d 16h /raytrac/
113 Will end this tomorrow for sure.... anyway i dont think i will got something below 400... jguarin2002 5024d 06h /raytrac/
112 99.7%... almost there jguarin2002 5024d 08h /raytrac/
111 99% of work done jguarin2002 5024d 17h /raytrac/
110 Chopchop 99% jguarin2002 5025d 11h /raytrac/
109 Still working on adder, almost there..... jguarin2002 5026d 05h /raytrac/
108 Ongoing work... 75% jguarin2002 5026d 23h /raytrac/
107 working working and working... jguarin2002 5027d 15h /raytrac/
106 Optimizing Adder.... at a very slow pace... Got to rush jguarin2002 5031d 23h /raytrac/
105 Control... jguarin2002 5042d 22h /raytrac/
104 Square Root and inversion support jguarin2002 5048d 07h /raytrac/
103 Square Root Ok jguarin2002 5048d 14h /raytrac/
102 FP additions done jguarin2002 5048d 15h /raytrac/
101 theres a new command to offset the first address in the file jguarin2002 5050d 05h /raytrac/

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