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Rev Log message Author Age Path
49 Test bench ifs finally running jguarin2002 5157d 23h /raytrac/
48 Developing first testbench.... also learning how to do it jguarin2002 5159d 20h /raytrac/
47 Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation jguarin2002 5161d 08h /raytrac/
46 simplified memory path jguarin2002 5161d 10h /raytrac/
45 Magic is already written... now we shall set the testbench on fire\! jguarin2002 5162d 22h /raytrac/
44 All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... jguarin2002 5163d 23h /raytrac/
43 Nothing to say, just working on the Test Bench... jguarin2002 5164d 07h /raytrac/
42 no comment no tb yet: jguarin2002 5165d 00h /raytrac/
41 Ram for the massses\!\!\! jguarin2002 5167d 12h /raytrac/
40 test bench changes..... jguarin2002 5167d 12h /raytrac/
39 Perhaps its a good idea to have a todo.txt file under version control jguarin2002 5169d 09h /raytrac/
38 Tb ggodies jguarin2002 5171d 00h /raytrac/
37 Testbenchgoodies jguarin2002 5171d 00h /raytrac/
36 testbench for rtengine test jguarin2002 5171d 10h /raytrac/
35 oops stderr -> stdout, fixed jguarin2002 5171d 10h /raytrac/
34 No need for .h jguarin2002 5171d 12h /raytrac/
33 Program to create a MIF (memory initialization file) in order to simulate RtEngine jguarin2002 5174d 23h /raytrac/
32 carry_logic parameter added to uf entity jguarin2002 5177d 14h /raytrac/
31 enable signal retaken, and error corrected, a really big mistake jguarin2002 5177d 22h /raytrac/
30 enable signal retaken... ooops a little lapsus jguarin2002 5177d 22h /raytrac/

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