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Rev Log message Author Age Path
164 reverting the not(s0delta(7)) change on revision 163 to s0delta(7) again jguarin2002 5070d 11h /raytrac/branches/
163 dpc: Signals to eval in functional simulatio. Fix on the codification of the sign applied into the arithmetic block depending on the UCA code of the instruction being excuted. Also a correction was done on the decodification of the result queues write signals. A correction applied on the decodification of the interruptions generated due to full queues. RayTrac: A signal to decode the sign that goes into the addition operations was made as long with its combinatorial operation to calculate it. Fadd32: Signals to eval in functional simulation. An important bug was fixed when decoding the shift to normalize the mantissa of the float number with the minor exponent, that was causing a misscalculation of the normalized mantissa. Arithpack: Formatting of the instruction at function ap_format_instruction fixed due to a change in the opcodes of the unary instructions. jguarin2002 5070d 13h /raytrac/branches/
162 Señales para evaluar en simulación funcional jguarin2002 5070d 13h /raytrac/branches/
161 Changes for the sake of the firsts simulation tracking results jguarin2002 5072d 04h /raytrac/branches/
160 Corrections derived from simulation debugging jguarin2002 5076d 20h /raytrac/branches/
159 wrcycle\!\? No\! rwcycle.... jguarin2002 5078d 06h /raytrac/branches/
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 5078d 10h /raytrac/branches/
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 5078d 22h /raytrac/branches/
156 Test Bench Beta 0.1 jguarin2002 5079d 10h /raytrac/branches/
155 Changes applied prior to testbenching using the script tb_compiler.py jguarin2002 5082d 10h /raytrac/branches/
154 rt_tb.vhd: This file will be used as the test bench main file jguarin2002 5085d 02h /raytrac/branches/
153 last modifications for tb_compiler.py compliance jguarin2002 5085d 02h /raytrac/branches/
152 Test bench oriented modifications jguarin2002 5089d 04h /raytrac/branches/
151 Previous Work to generate test benching jguarin2002 5148d 00h /raytrac/branches/
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 5161d 21h /raytrac/branches/
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 5162d 00h /raytrac/branches/
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 5162d 00h /raytrac/branches/
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 5164d 12h /raytrac/branches/
146 Interruption Machine jguarin2002 5172d 06h /raytrac/branches/
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 5176d 20h /raytrac/branches/

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