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[/] [raytrac/] [branches/] [fp/] - Rev 162

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Rev Log message Author Age Path
162 Señales para evaluar en simulación funcional jguarin2002 4751d 12h /raytrac/branches/fp/
161 Changes for the sake of the firsts simulation tracking results jguarin2002 4753d 03h /raytrac/branches/fp/
160 Corrections derived from simulation debugging jguarin2002 4757d 19h /raytrac/branches/fp/
159 wrcycle\!\? No\! rwcycle.... jguarin2002 4759d 05h /raytrac/branches/fp/
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4759d 09h /raytrac/branches/fp/
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 4759d 21h /raytrac/branches/fp/
156 Test Bench Beta 0.1 jguarin2002 4760d 09h /raytrac/branches/fp/
155 Changes applied prior to testbenching using the script tb_compiler.py jguarin2002 4763d 10h /raytrac/branches/fp/
154 rt_tb.vhd: This file will be used as the test bench main file jguarin2002 4766d 01h /raytrac/branches/fp/
153 last modifications for tb_compiler.py compliance jguarin2002 4766d 01h /raytrac/branches/fp/
152 Test bench oriented modifications jguarin2002 4770d 03h /raytrac/branches/fp/
151 Previous Work to generate test benching jguarin2002 4828d 23h /raytrac/branches/fp/
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4842d 20h /raytrac/branches/fp/
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4842d 23h /raytrac/branches/fp/
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4842d 23h /raytrac/branches/fp/
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4845d 11h /raytrac/branches/fp/
146 Interruption Machine jguarin2002 4853d 05h /raytrac/branches/fp/
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4857d 19h /raytrac/branches/fp/
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4864d 23h /raytrac/branches/fp/
143 working on result queue sync decoding signals jguarin2002 4869d 15h /raytrac/branches/fp/
142 Additions for the State Machine jguarin2002 4874d 13h /raytrac/branches/fp/
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4941d 15h /raytrac/branches/fp/
140 Syncing: its awful work..... jguarin2002 4941d 20h /raytrac/branches/fp/
139 Sync jguarin2002 4953d 11h /raytrac/branches/fp/
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4958d 02h /raytrac/branches/fp/
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4964d 03h /raytrac/branches/fp/
136 gogogo jguarin2002 4966d 13h /raytrac/branches/fp/
135 Correction on conectiveness of Datapath Control... jguarin2002 4970d 14h /raytrac/branches/fp/
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4972d 10h /raytrac/branches/fp/
133 Added the instructions queue jguarin2002 4974d 02h /raytrac/branches/fp/

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