| Rev |
Log message |
Author |
Age |
Path |
| 199 |
Check out in the design document for changes made on Load logic, a load chain has been added to Memblock I/O and several memory blocks were removed, under construction, this version WONT in any means work |
jguarin2002 |
4635d 03h |
/raytrac/branches/fp/ |
| 197 |
Chnages on interconnectivity: Check out the SGDMA Sheets |
jguarin2002 |
4645d 04h |
/raytrac/branches/fp/ |
| 196 |
raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues |
jguarin2002 |
4648d 15h |
/raytrac/branches/fp/ |
| 195 |
Document advance and changes in the design |
jguarin2002 |
4651d 12h |
/raytrac/branches/fp/ |
| 194 |
Work In Progress |
jguarin2002 |
4666d 18h |
/raytrac/branches/fp/ |
| 193 |
WIP: Main Document |
jguarin2002 |
4667d 15h |
/raytrac/branches/fp/ |
| 192 |
Some change I dont realize what is it in the design document (xls) |
jguarin2002 |
4668d 02h |
/raytrac/branches/fp/ |
| 191 |
Reduced the implementation of Instruction Queue to 16 instructions rather than 32 and using registers in logic cells rather than M9Ks memory blocks.... finally the design fits. |
jguarin2002 |
4668d 02h |
/raytrac/branches/fp/ |
| 190 |
M9K Block reduction. And Altera Compiler Directive was added to adder code to prevent unnecesary M9K block inferring... |
jguarin2002 |
4672d 11h |
/raytrac/branches/fp/ |
| 189 |
Limiting Block size on the operands register to a maximum of 256 |
jguarin2002 |
4672d 17h |
/raytrac/branches/fp/ |
| 188 |
Fitting Report |
jguarin2002 |
4674d 00h |
/raytrac/branches/fp/ |
| 187 |
Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq |
jguarin2002 |
4674d 00h |
/raytrac/branches/fp/ |
| 186 |
Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq |
jguarin2002 |
4674d 00h |
/raytrac/branches/fp/ |
| 185 |
Well mulblock was a void inside file.... |
jguarin2002 |
4674d 14h |
/raytrac/branches/fp/ |
| 184 |
Se quitó la palabra capítulo de los titulos de los capítulos. |
jguarin2002 |
4674d 18h |
/raytrac/branches/fp/ |
| 183 |
Se quitó la palabra capítulo de los titulos de los capítulos. |
jguarin2002 |
4674d 18h |
/raytrac/branches/fp/ |
| 182 |
Sobre la sincronización del RayTrac al escribir instrucciones y operandos. Pagina 29 y 31. |
jguarin2002 |
4674d 19h |
/raytrac/branches/fp/ |
| 181 |
Version beta 0.2 previo a conexion con bus avalon en QSYS/SOPC |
jguarin2002 |
4675d 02h |
/raytrac/branches/fp/ |
| 180 |
Documentos de diseño y documento final |
jguarin2002 |
4675d 02h |
/raytrac/branches/fp/ |
| 179 |
light change on code readbility for Datapath Control hardware description hdl file |
jguarin2002 |
4675d 23h |
/raytrac/branches/fp/ |
| 178 |
QSYS SOPC Raytrac component.... |
jguarin2002 |
4699d 14h |
/raytrac/branches/fp/ |
| 177 |
Interruptions separated in diferent output ports, so we can assign them as interruptions senders.... each one of them..... |
jguarin2002 |
4699d 14h |
/raytrac/branches/fp/ |
| 176 |
Little changes on full result queue signals codification in order to fix a potential bug that havent beed detected at the time of the change in the code |
jguarin2002 |
4711d 12h |
/raytrac/branches/fp/ |
| 175 |
Fixed a problem on the writing signal of results queue 5,6 and 7. The error was detected just right when a calculated normalized vector was about to be written in the results queues 5 6 and 7 and the write signals of those were not activated (it would remain in 0), after checking what was the problem, a codification bug was spotted. |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 174 |
Comment tweaking... its the same RTL anyway |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 173 |
Added a procedure to support vectorblock03 type variables rendering after testbench execution |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 172 |
Results fifo writing signals added to the testbench |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 171 |
After some raytrac simulation result analysis, some bugs were detected on the decodification of several datapaths. Corrections were done and tested |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 170 |
Slim, suited to fit, elegant and small, optimized and well designed single precision floating point I3E754 32 bit adder |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
| 169 |
Long Stupid, version of a 32 bit floating point I3E754 Adder |
jguarin2002 |
4711d 13h |
/raytrac/branches/fp/ |
