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[/] [raytrac/] [branches/] [fp/] [dpc.vhd] - Rev 164

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163 dpc: Signals to eval in functional simulatio. Fix on the codification of the sign applied into the arithmetic block depending on the UCA code of the instruction being excuted. Also a correction was done on the decodification of the result queues write signals. A correction applied on the decodification of the interruptions generated due to full queues. RayTrac: A signal to decode the sign that goes into the addition operations was made as long with its combinatorial operation to calculate it. Fadd32: Signals to eval in functional simulation. An important bug was fixed when decoding the shift to normalize the mantissa of the float number with the minor exponent, that was causing a misscalculation of the normalized mantissa. Arithpack: Formatting of the instruction at function ap_format_instruction fixed due to a change in the opcodes of the unary instructions. jguarin2002 4743d 02h /raytrac/branches/fp/dpc.vhd
161 Changes for the sake of the firsts simulation tracking results jguarin2002 4744d 17h /raytrac/branches/fp/dpc.vhd
160 Corrections derived from simulation debugging jguarin2002 4749d 10h /raytrac/branches/fp/dpc.vhd
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4751d 00h /raytrac/branches/fp/dpc.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4757d 16h /raytrac/branches/fp/dpc.vhd
152 Test bench oriented modifications jguarin2002 4761d 17h /raytrac/branches/fp/dpc.vhd
151 Previous Work to generate test benching jguarin2002 4820d 13h /raytrac/branches/fp/dpc.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4834d 10h /raytrac/branches/fp/dpc.vhd
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4834d 13h /raytrac/branches/fp/dpc.vhd
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4834d 13h /raytrac/branches/fp/dpc.vhd
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4837d 02h /raytrac/branches/fp/dpc.vhd
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4849d 09h /raytrac/branches/fp/dpc.vhd
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4856d 13h /raytrac/branches/fp/dpc.vhd
143 working on result queue sync decoding signals jguarin2002 4861d 05h /raytrac/branches/fp/dpc.vhd
142 Additions for the State Machine jguarin2002 4866d 03h /raytrac/branches/fp/dpc.vhd
140 Syncing: its awful work..... jguarin2002 4933d 11h /raytrac/branches/fp/dpc.vhd
139 Sync jguarin2002 4945d 01h /raytrac/branches/fp/dpc.vhd
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4949d 16h /raytrac/branches/fp/dpc.vhd
136 gogogo jguarin2002 4958d 04h /raytrac/branches/fp/dpc.vhd
135 Correction on conectiveness of Datapath Control... jguarin2002 4962d 04h /raytrac/branches/fp/dpc.vhd

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