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[/] [raytrac/] [branches/] [fp/] [memblock.vhd] - Rev 158

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158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4753d 20h /raytrac/branches/fp/memblock.vhd
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 4754d 08h /raytrac/branches/fp/memblock.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4760d 12h /raytrac/branches/fp/memblock.vhd
152 Test bench oriented modifications jguarin2002 4764d 13h /raytrac/branches/fp/memblock.vhd
151 Previous Work to generate test benching jguarin2002 4823d 09h /raytrac/branches/fp/memblock.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4837d 06h /raytrac/branches/fp/memblock.vhd
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4839d 22h /raytrac/branches/fp/memblock.vhd
143 working on result queue sync decoding signals jguarin2002 4864d 01h /raytrac/branches/fp/memblock.vhd
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4936d 01h /raytrac/branches/fp/memblock.vhd
140 Syncing: its awful work..... jguarin2002 4936d 07h /raytrac/branches/fp/memblock.vhd
139 Sync jguarin2002 4947d 21h /raytrac/branches/fp/memblock.vhd
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4952d 12h /raytrac/branches/fp/memblock.vhd
136 gogogo jguarin2002 4961d 00h /raytrac/branches/fp/memblock.vhd
133 Added the instructions queue jguarin2002 4968d 12h /raytrac/branches/fp/memblock.vhd
131 Post RTL check on memblock jguarin2002 4972d 14h /raytrac/branches/fp/memblock.vhd
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4973d 08h /raytrac/branches/fp/memblock.vhd
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4978d 21h /raytrac/branches/fp/memblock.vhd
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4985d 23h /raytrac/branches/fp/memblock.vhd

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