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[/] [raytrac/] [branches/] [fp/] [memblock.vhd] - Rev 161

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Rev Log message Author Age Path
161 Changes for the sake of the firsts simulation tracking results jguarin2002 4675d 15h /raytrac/branches/fp/memblock.vhd
160 Corrections derived from simulation debugging jguarin2002 4680d 07h /raytrac/branches/fp/memblock.vhd
159 wrcycle\!\? No\! rwcycle.... jguarin2002 4681d 17h /raytrac/branches/fp/memblock.vhd
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4681d 21h /raytrac/branches/fp/memblock.vhd
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 4682d 09h /raytrac/branches/fp/memblock.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4688d 13h /raytrac/branches/fp/memblock.vhd
152 Test bench oriented modifications jguarin2002 4692d 15h /raytrac/branches/fp/memblock.vhd
151 Previous Work to generate test benching jguarin2002 4751d 11h /raytrac/branches/fp/memblock.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4765d 08h /raytrac/branches/fp/memblock.vhd
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4767d 23h /raytrac/branches/fp/memblock.vhd
143 working on result queue sync decoding signals jguarin2002 4792d 03h /raytrac/branches/fp/memblock.vhd
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4864d 03h /raytrac/branches/fp/memblock.vhd
140 Syncing: its awful work..... jguarin2002 4864d 08h /raytrac/branches/fp/memblock.vhd
139 Sync jguarin2002 4875d 23h /raytrac/branches/fp/memblock.vhd
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4880d 14h /raytrac/branches/fp/memblock.vhd
136 gogogo jguarin2002 4889d 01h /raytrac/branches/fp/memblock.vhd
133 Added the instructions queue jguarin2002 4896d 14h /raytrac/branches/fp/memblock.vhd
131 Post RTL check on memblock jguarin2002 4900d 15h /raytrac/branches/fp/memblock.vhd
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4901d 09h /raytrac/branches/fp/memblock.vhd
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.
jguarin2002 4906d 22h /raytrac/branches/fp/memblock.vhd
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4914d 01h /raytrac/branches/fp/memblock.vhd

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