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[/] [raytrac/] [branches/] [fp_sgdma/] [ap_n_dpc.vhd] - Rev 228

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149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4772d 23h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4772d 23h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4775d 11h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4787d 19h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4794d 23h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
143 working on result queue sync decoding signals jguarin2002 4799d 15h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
142 Additions for the State Machine jguarin2002 4804d 13h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
140 Syncing: its awful work..... jguarin2002 4871d 20h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
139 Sync jguarin2002 4883d 11h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4888d 02h /raytrac/branches/fp_sgdma/ap_n_dpc.vhd

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