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[/] [raytrac/] [trunk/] [arithpack.vhd] - Rev 81

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Rev Log message Author Age Path
81 Almost There jguarin2002 5327d 14h /raytrac/trunk/arithpack.vhd
77 Now support for addition and substraction of A(7,10) component vectors jguarin2002 5340d 02h /raytrac/trunk/arithpack.vhd
76 Upgrade para obtener una mantissa de 20 bits jguarin2002 5342d 00h /raytrac/trunk/arithpack.vhd
74 On the rush, correct chip floor planning problem jguarin2002 5348d 13h /raytrac/trunk/arithpack.vhd
73 Almost Ready Division and Square Root jguarin2002 5349d 18h /raytrac/trunk/arithpack.vhd
60 Shifter circuit for Division Phase one done jguarin2002 5359d 23h /raytrac/trunk/arithpack.vhd
59 Tarde con pintiti, paquete aritmetico se anade raiz shifter y sqrt jguarin2002 5363d 05h /raytrac/trunk/arithpack.vhd
52 Working...... jguarin2002 5409d 15h /raytrac/trunk/arithpack.vhd
50 There's now a descent testbench\!\!\! jguarin2002 5417d 21h /raytrac/trunk/arithpack.vhd
49 Test bench ifs finally running jguarin2002 5418d 15h /raytrac/trunk/arithpack.vhd
47 Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation jguarin2002 5422d 00h /raytrac/trunk/arithpack.vhd
45 Magic is already written... now we shall set the testbench on fire\! jguarin2002 5423d 14h /raytrac/trunk/arithpack.vhd
44 All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... jguarin2002 5424d 15h /raytrac/trunk/arithpack.vhd
43 Nothing to say, just working on the Test Bench... jguarin2002 5424d 23h /raytrac/trunk/arithpack.vhd
42 no comment no tb yet: jguarin2002 5425d 17h /raytrac/trunk/arithpack.vhd
40 test bench changes..... jguarin2002 5428d 04h /raytrac/trunk/arithpack.vhd
32 carry_logic parameter added to uf entity jguarin2002 5438d 06h /raytrac/trunk/arithpack.vhd
27 Optimized code, using IEEE libraries and extra parameters to make a more legible code jguarin2002 5452d 13h /raytrac/trunk/arithpack.vhd
26 Corrections on opcoder jguarin2002 5452d 17h /raytrac/trunk/arithpack.vhd
25 Support to variable width and the possibility to choose between behavioral description and structural description jguarin2002 5452d 17h /raytrac/trunk/arithpack.vhd

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