Subversion Repositories soc_maker

[/] [soc_maker/] [trunk/] [core_lib/] [cores/] [ram_wb/] [ram_wb.yaml] - Rev 10


Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
10 replaced version by id for cores and interfaces feddischson 3627d 13h /soc_maker/trunk/core_lib/cores/ram_wb/ram_wb.yaml
8 Further improvments: e.g. added default and mandatory option for ports. Commit before some cleaning feddischson 3627d 13h /soc_maker/trunk/core_lib/cores/ram_wb/ram_wb.yaml
7 First revision, which produces a synthesizable (simple) SOC feddischson 3627d 13h /soc_maker/trunk/core_lib/cores/ram_wb/ram_wb.yaml

powered by: WebSVN 2.1.0

© copyright 1999-2024, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.