Subversion Repositories t6507lp

[/] - Rev 38


Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
38 root 5612d 21h /
37 Some minor fixes. Now we are trying to make it synthesizable. gabrieloshiro 5613d 18h /
36 All module names are written using uppercase letters now. gabrieloshiro 5613d 19h /
35 Several wires created to help code readibility. creep 5613d 19h /
34 Fixed state names. creep 5613d 21h /
33 Some portion of the absolute indexed mode is done, yet is fully nonfunctional. creep 5613d 21h /
32 Documentation is wrong. I`ve just kept the standard. Some ALU operations are not working 100%. Most of them don`t affect Processor Status Register yet. However the main body will be like this. :D gabrieloshiro 5613d 21h /
31 Added zero page indexed mode. creep 5613d 22h /
30 Added zero page mode. creep 5613d 22h /
29 Absolute addressing mode should be working. creep 5613d 23h /
28 More documentation. gabrieloshiro 5614d 00h /
27 Added the pipelining support for a few addressing modes. Still working on absolute addressing mode. creep 5614d 00h /
26 I`m still finishing the documentation. But the file should work by now. gabrieloshiro 5616d 18h /
25 Package file contains all important constants and local parameters. It assigns constant values for opcodes aliases, processor status register indexes, and addressing modes. It is going to help people to understand the code. T65 project has a lot of constants inside its codes. So it is hard to understand it. gabrieloshiro 5616d 20h /
24 Added some simple logic to a few states. Connection with the ALU is pending. creep 5616d 20h /
23 Updated file header standard. creep 5616d 21h /
22 Signal and module name convention. creep 5616d 21h /
21 *** empty log message *** creep 5616d 21h /
20 Added immediate, absolute and zero page addressing modes FSM branches. Five other modes still needed. Internal signal handling and temp registers still missing. creep 5616d 22h /
19 Parameters removed. creep 5616d 23h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.