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URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] - Rev 256

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Rev Log message Author Age Path
256 fp files creep 5541d 20h /t6507lp/
255 Changed the PADS verilog description to minimize violations creep 5541d 20h /t6507lp/
254 Fixed a latch in the design creep 5541d 20h /t6507lp/
253 Changed the rw_mem signal name in the hierarchy creep 5564d 21h /t6507lp/
252 Added a stubs file for the pads. creep 5564d 21h /t6507lp/
251 Added the io wrapper creep 5565d 00h /t6507lp/
250 Synthesis script changed creep 5565d 00h /t6507lp/
249 Renamed the synthesis script creep 5565d 20h /t6507lp/
248 Added a low power synthesis script creep 5570d 19h /t6507lp/
247 Added the cpu mapped verilog creep 5570d 19h /t6507lp/
246 Added some older files plus the first syn script creep 5571d 23h /t6507lp/
245 Added a few dirs for the synthesis creep 5571d 23h /t6507lp/
244 Added a few dirs for the synthesis creep 5572d 00h /t6507lp/
243 Fixing STA_IDY bug creep 5613d 16h /t6507lp/
242 Bug regardind the STA_IDY opcode creep 5613d 20h /t6507lp/
241 Fixed half the problem with strange STA behavior. creep 5614d 19h /t6507lp/
240 Finally fixed the decimal mode! creep 5614d 21h /t6507lp/
239 Zero flag fixed for SBC while in Decimal Mode. Bug #34. gabrieloshiro 5614d 22h /t6507lp/
238 ALU file is linted. creep 5617d 19h /t6507lp/
237 Added a preliminary collision detection logic. creep 5618d 20h /t6507lp/

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