Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [fv/] - Rev 264


Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
247 Added the cpu mapped verilog creep 5456d 08h /t6507lp/trunk/fv/
241 Fixed half the problem with strange STA behavior. creep 5500d 08h /t6507lp/trunk/fv/
240 Finally fixed the decimal mode! creep 5500d 11h /t6507lp/trunk/fv/
235 Bug #60: added a brief simulation to the video_converter module. creep 5505d 06h /t6507lp/trunk/fv/
234 SBC Decimal mode 100% verified. creep 5510d 08h /t6507lp/trunk/fv/
233 ADC and SBC are 100% verified in regular mode. Decimal mode still missing. creep 5510d 12h /t6507lp/trunk/fv/
216 Register bank at TIA properly set. Working on the R/W instructions. creep 5519d 08h /t6507lp/trunk/fv/
215 Adding the video module. creep 5520d 09h /t6507lp/trunk/fv/
214 Added the keyboard controller to the 2600.v top level file. creep 5520d 13h /t6507lp/trunk/fv/
212 Bug #56: ZPX page crossing. creep 5525d 13h /t6507lp/trunk/fv/
206 Adding .e files for fsm verification. creep 5526d 14h /t6507lp/trunk/fv/
185 Added the first coverage results to the repository. creep 5546d 08h /t6507lp/trunk/fv/
182 ALU e-language verification is complete. Results still unknown. creep 5547d 05h /t6507lp/trunk/fv/
180 Finally all opcodes are being tested. creep 5547d 09h /t6507lp/trunk/fv/
177 Extended checker. STA, SEC and SED included. creep 5547d 13h /t6507lp/trunk/fv/
170 Decimal mode fixed. Just syncing both SVNs. creep 5548d 14h /t6507lp/trunk/fv/
160 ROL is coded. ADC decimal mode is being re-checked. creep 5549d 11h /t6507lp/trunk/fv/
159 Checker was extended. All the instructions from A-P are verified. A few bugs were caught already. creep 5552d 07h /t6507lp/trunk/fv/
155 Fixing ticket 25, B flag. creep 5552d 14h /t6507lp/trunk/fv/
153 Added a few more instructions to the checker. Removed prints to speed up Specman. creep 5553d 07h /t6507lp/trunk/fv/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.