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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 187

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Rev Log message Author Age Path
187 Fixed the module name. creep 6119d 05h /t6507lp/trunk/rtl/verilog/
186 Testbench has a lot of new tests. gabrieloshiro 6126d 04h /t6507lp/trunk/rtl/verilog/
184 TXA and TYA behavior were changed. Now alu_result dont receive A value gabrieloshiro 6126d 13h /t6507lp/trunk/rtl/verilog/
183 STA, STY and STX should be working now gabrieloshiro 6127d 05h /t6507lp/trunk/rtl/verilog/
181 This time ADC decimal should be working properly and SBC (normal mode) should be back to its accurate behavior gabrieloshiro 6127d 08h /t6507lp/trunk/rtl/verilog/
179 STA, STY and STX fixed gabrieloshiro 6127d 10h /t6507lp/trunk/rtl/verilog/
178 STA, STY and STX fixed gabrieloshiro 6127d 11h /t6507lp/trunk/rtl/verilog/
176 RTI works for me gabrieloshiro 6127d 13h /t6507lp/trunk/rtl/verilog/
175 PLP and RTI should be working according to stella now. STATUS <= alu_a. gabrieloshiro 6128d 09h /t6507lp/trunk/rtl/verilog/
174 SBC borrow flag bug fixed... again gabrieloshiro 6128d 09h /t6507lp/trunk/rtl/verilog/
173 SBC bug fixed. Borrow should be working properly. gabrieloshiro 6128d 10h /t6507lp/trunk/rtl/verilog/
172 RTI supported to be compatible with stella gabrieloshiro 6128d 12h /t6507lp/trunk/rtl/verilog/
171 Removed debug messages. creep 6128d 13h /t6507lp/trunk/rtl/verilog/
169 ADC bugs finally fixed. gabrieloshiro 6129d 05h /t6507lp/trunk/rtl/verilog/
168 RTI fixed! now ALU doesn`t support RTI instruction anymore. gabrieloshiro 6129d 06h /t6507lp/trunk/rtl/verilog/
167 Now SBC is supposed to work. gabrieloshiro 6129d 07h /t6507lp/trunk/rtl/verilog/
166 Commiting again! gabrieloshiro 6129d 07h /t6507lp/trunk/rtl/verilog/
165 SBC and PHP fixed! gabrieloshiro 6129d 07h /t6507lp/trunk/rtl/verilog/
164 ADC with decimal mode bug... is it ok now? gabrieloshiro 6129d 08h /t6507lp/trunk/rtl/verilog/
163 Still having bugs on ADC with decimal flag! Is it correct now? gabrieloshiro 6129d 09h /t6507lp/trunk/rtl/verilog/

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