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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 191

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Rev Log message Author Age Path
191 Added the testbench for the bus controller. creep 5823d 07h /t6507lp/trunk/rtl/verilog/
190 Bus controller is now linted. creep 5823d 07h /t6507lp/trunk/rtl/verilog/
189 Added the bus controller module. creep 5824d 00h /t6507lp/trunk/rtl/verilog/
188 Added the atari toplevel creep 5824d 00h /t6507lp/trunk/rtl/verilog/
187 Fixed the module name. creep 5824d 00h /t6507lp/trunk/rtl/verilog/
186 Testbench has a lot of new tests. gabrieloshiro 5830d 23h /t6507lp/trunk/rtl/verilog/
184 TXA and TYA behavior were changed. Now alu_result dont receive A value gabrieloshiro 5831d 07h /t6507lp/trunk/rtl/verilog/
183 STA, STY and STX should be working now gabrieloshiro 5832d 00h /t6507lp/trunk/rtl/verilog/
181 This time ADC decimal should be working properly and SBC (normal mode) should be back to its accurate behavior gabrieloshiro 5832d 03h /t6507lp/trunk/rtl/verilog/
179 STA, STY and STX fixed gabrieloshiro 5832d 05h /t6507lp/trunk/rtl/verilog/
178 STA, STY and STX fixed gabrieloshiro 5832d 06h /t6507lp/trunk/rtl/verilog/
176 RTI works for me gabrieloshiro 5832d 08h /t6507lp/trunk/rtl/verilog/
175 PLP and RTI should be working according to stella now. STATUS <= alu_a. gabrieloshiro 5833d 04h /t6507lp/trunk/rtl/verilog/
174 SBC borrow flag bug fixed... again gabrieloshiro 5833d 04h /t6507lp/trunk/rtl/verilog/
173 SBC bug fixed. Borrow should be working properly. gabrieloshiro 5833d 05h /t6507lp/trunk/rtl/verilog/
172 RTI supported to be compatible with stella gabrieloshiro 5833d 07h /t6507lp/trunk/rtl/verilog/
171 Removed debug messages. creep 5833d 08h /t6507lp/trunk/rtl/verilog/
169 ADC bugs finally fixed. gabrieloshiro 5834d 00h /t6507lp/trunk/rtl/verilog/
168 RTI fixed! now ALU doesn`t support RTI instruction anymore. gabrieloshiro 5834d 01h /t6507lp/trunk/rtl/verilog/
167 Now SBC is supposed to work. gabrieloshiro 5834d 02h /t6507lp/trunk/rtl/verilog/

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