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Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 237

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Rev Log message Author Age Path
237 Added a preliminary collision detection logic. creep 5813d 11h /t6507lp/trunk/rtl/verilog/
236 Added the video converter testbench to the repository. creep 5813d 15h /t6507lp/trunk/rtl/verilog/
235 Bug #60: added a brief simulation to the video_converter module. creep 5814d 08h /t6507lp/trunk/rtl/verilog/
234 SBC Decimal mode 100% verified. creep 5819d 10h /t6507lp/trunk/rtl/verilog/
233 ADC and SBC are 100% verified in regular mode. Decimal mode still missing. creep 5819d 14h /t6507lp/trunk/rtl/verilog/
232 New video test. creep 5821d 08h /t6507lp/trunk/rtl/verilog/
231 Minor bugs fixed. gabrieloshiro 5821d 10h /t6507lp/trunk/rtl/verilog/
230 Changed TIA behavior. It is now pixel-based. creep 5821d 10h /t6507lp/trunk/rtl/verilog/
229 Created a one-line pattern. creep 5821d 14h /t6507lp/trunk/rtl/verilog/
228 gabrieloshiro 5821d 15h /t6507lp/trunk/rtl/verilog/
227 Fixing conflicts. creep 5821d 15h /t6507lp/trunk/rtl/verilog/
226 work plz creep 5821d 15h /t6507lp/trunk/rtl/verilog/
225 Minor changes! gabrieloshiro 5822d 07h /t6507lp/trunk/rtl/verilog/
224 Added a top level for the tests. creep 5822d 09h /t6507lp/trunk/rtl/verilog/
223 Minor sintax errors fixed. gabrieloshiro 5822d 09h /t6507lp/trunk/rtl/verilog/
222 Added a simple line-by-line tester. creep 5822d 11h /t6507lp/trunk/rtl/verilog/
221 Added a VGA controller. creep 5822d 15h /t6507lp/trunk/rtl/verilog/
220 Bug #59: video converter done. creep 5823d 09h /t6507lp/trunk/rtl/verilog/
219 Video YPbPr to RGB is coded. creep 5826d 08h /t6507lp/trunk/rtl/verilog/
218 Added the video converter. creep 5826d 08h /t6507lp/trunk/rtl/verilog/

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