URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu.v] - Rev 239

Rev	Log message	Author	Age	Path
166	Commiting again!	gabrieloshiro	5719d 19h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
165	SBC and PHP fixed!	gabrieloshiro	5719d 19h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
164	ADC with decimal mode bug... is it ok now?	gabrieloshiro	5719d 21h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
163	Still having bugs on ADC with decimal flag! Is it correct now?	gabrieloshiro	5719d 22h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
162	ADC with decimal mode ON, bug fixed!	gabrieloshiro	5719d 22h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
161	Sum and subtract were wrong when D flag was HIGH.	gabrieloshiro	5719d 22h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
158	Bug 28 fixed. PHA was not coping the register to alu_a output	gabrieloshiro	5722d 19h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
157		gabrieloshiro	5722d 19h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
156	Some bugs were fixed. Testbench were expecting wrong values sometimes.	gabrieloshiro	5722d 21h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v
154	BRK_IMP was asserting 0 to B flag. Bug report #25 fixed.	gabrieloshiro	5723d 01h	/t6507lp/trunk/rtl/verilog/t6507lp_alu.v