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Subversion Repositories t6507lp

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Rev Log message Author Age Path
255 Changed the PADS verilog description to minimize violations creep 5791d 19h /
254 Fixed a latch in the design creep 5791d 19h /
253 Changed the rw_mem signal name in the hierarchy creep 5814d 20h /
252 Added a stubs file for the pads. creep 5814d 20h /
251 Added the io wrapper creep 5814d 23h /
250 Synthesis script changed creep 5814d 23h /
249 Renamed the synthesis script creep 5815d 19h /
248 Added a low power synthesis script creep 5820d 18h /
247 Added the cpu mapped verilog creep 5820d 18h /
246 Added some older files plus the first syn script creep 5821d 22h /
245 Added a few dirs for the synthesis creep 5821d 23h /
244 Added a few dirs for the synthesis creep 5821d 23h /
243 Fixing STA_IDY bug creep 5863d 15h /
242 Bug regardind the STA_IDY opcode creep 5863d 19h /
241 Fixed half the problem with strange STA behavior. creep 5864d 18h /
240 Finally fixed the decimal mode! creep 5864d 20h /
239 Zero flag fixed for SBC while in Decimal Mode. Bug #34. gabrieloshiro 5864d 21h /
238 ALU file is linted. creep 5867d 18h /
237 Added a preliminary collision detection logic. creep 5868d 19h /
236 Added the video converter testbench to the repository. creep 5868d 23h /

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