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Subversion Repositories vspi

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Rev Log message Author Age Path
14 Merge branch 'master' into svn mjlyons 4637d 03h /
13 Starting over, again mjlyons 4637d 03h /
12 Merge branch 'master' into svn mjlyons 4637d 03h /
11 Starting over mjlyons 4637d 07h /
10 Correctly read single-byte incoming transmissions (PC->FPGA). mjlyons 4637d 07h /
9 Checking in in-progress SPI. Need to move command decode to SPI clock rather than sysclk. mjlyons 4637d 08h /
8 SPI Test python script now includes test for receiving a 1KB block from FPGA mjlyons 4637d 08h /
7 Updating master scripts (cheetah) to test new vSPI receive functionality mjlyons 4637d 08h /
6 Now support receiving data (Cheetah->vSPI) mjlyons 4637d 08h /
5 Adding script to control cheetah spi adapter and test vSPI mjlyons 4637d 08h /
4 Correctly read single-byte incoming transmissions (PC->FPGA). mjlyons 4637d 08h /
3 Checking in in-progress SPI. Need to move command decode to SPI clock rather than sysclk. mjlyons 4637d 08h /
2 first commit mjlyons 4637d 08h /
1 The project and the structure was created root 4637d 22h /

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