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[/] [a-z80/] [trunk/] [tools/] [dongle/] - Rev 3

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Last modification

  • Rev 3, 2014-12-18 14:37:35 GMT
  • Author: gdevic
  • Log message:
    - New directory structure
    - Added documentation files (and PDF versions)
    - Fixed tests
Path
/a-z80/cpu
/a-z80/docs
/a-z80/host
/a-z80/resources
/a-z80/tools
/a-z80/trunk/.gitignore
/a-z80/trunk/cpu
/a-z80/trunk/cpu/alu
/a-z80/trunk/cpu/alu/alu.bdf
/a-z80/trunk/cpu/alu/alu.bsf
/a-z80/trunk/cpu/alu/alu.v
/a-z80/trunk/cpu/alu/alu_bit_select.bdf
/a-z80/trunk/cpu/alu/alu_bit_select.bsf
/a-z80/trunk/cpu/alu/alu_bit_select.v
/a-z80/trunk/cpu/alu/alu_control.bdf
/a-z80/trunk/cpu/alu/alu_control.bsf
/a-z80/trunk/cpu/alu/alu_control.v
/a-z80/trunk/cpu/alu/alu_core.bdf
/a-z80/trunk/cpu/alu/alu_core.bsf
/a-z80/trunk/cpu/alu/alu_core.v
/a-z80/trunk/cpu/alu/alu_flags.bdf
/a-z80/trunk/cpu/alu/alu_flags.bsf
/a-z80/trunk/cpu/alu/alu_flags.v
/a-z80/trunk/cpu/alu/alu_mux_2.bdf
/a-z80/trunk/cpu/alu/alu_mux_2.bsf
/a-z80/trunk/cpu/alu/alu_mux_2.v
/a-z80/trunk/cpu/alu/alu_mux_2z.bdf
/a-z80/trunk/cpu/alu/alu_mux_2z.bsf
/a-z80/trunk/cpu/alu/alu_mux_2z.v
/a-z80/trunk/cpu/alu/alu_mux_3z.bdf
/a-z80/trunk/cpu/alu/alu_mux_3z.bsf
/a-z80/trunk/cpu/alu/alu_mux_3z.v
/a-z80/trunk/cpu/alu/alu_mux_4.bdf
/a-z80/trunk/cpu/alu/alu_mux_4.bsf
/a-z80/trunk/cpu/alu/alu_mux_4.v
/a-z80/trunk/cpu/alu/alu_mux_8.bdf
/a-z80/trunk/cpu/alu/alu_mux_8.bsf
/a-z80/trunk/cpu/alu/alu_mux_8.v
/a-z80/trunk/cpu/alu/alu_prep_daa.bdf
/a-z80/trunk/cpu/alu/alu_prep_daa.bsf
/a-z80/trunk/cpu/alu/alu_prep_daa.v
/a-z80/trunk/cpu/alu/alu_select.bdf
/a-z80/trunk/cpu/alu/alu_select.bsf
/a-z80/trunk/cpu/alu/alu_select.v
/a-z80/trunk/cpu/alu/alu_shifter_core.bdf
/a-z80/trunk/cpu/alu/alu_shifter_core.bsf
/a-z80/trunk/cpu/alu/alu_shifter_core.v
/a-z80/trunk/cpu/alu/alu_slice.bdf
/a-z80/trunk/cpu/alu/alu_slice.bsf
/a-z80/trunk/cpu/alu/alu_slice.v
/a-z80/trunk/cpu/alu/simulation
/a-z80/trunk/cpu/alu/simulation/modelsim
/a-z80/trunk/cpu/alu/simulation/modelsim/r
/a-z80/trunk/cpu/alu/simulation/modelsim/test_alu.mpf
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_alu.do
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_core.do
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_mux_3z.do
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_prep_daa.do
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_shifter_core.do
/a-z80/trunk/cpu/alu/simulation/modelsim/wave_slice.do
/a-z80/trunk/cpu/alu/test_alu.qpf
/a-z80/trunk/cpu/alu/test_alu.qsf
/a-z80/trunk/cpu/alu/test_alu.sv
/a-z80/trunk/cpu/alu/test_core.sv
/a-z80/trunk/cpu/alu/test_mux_3z.sv
/a-z80/trunk/cpu/alu/test_prep_daa.sv
/a-z80/trunk/cpu/alu/test_shifter_core.sv
/a-z80/trunk/cpu/alu/test_slice.sv
/a-z80/trunk/cpu/bus
/a-z80/trunk/cpu/bus/address_latch.bdf
/a-z80/trunk/cpu/bus/address_latch.bsf
/a-z80/trunk/cpu/bus/address_latch.v
/a-z80/trunk/cpu/bus/address_mux.bdf
/a-z80/trunk/cpu/bus/address_mux.bsf
/a-z80/trunk/cpu/bus/address_mux.v
/a-z80/trunk/cpu/bus/address_pins.bdf
/a-z80/trunk/cpu/bus/address_pins.bsf
/a-z80/trunk/cpu/bus/address_pins.v
/a-z80/trunk/cpu/bus/bus_control.bdf
/a-z80/trunk/cpu/bus/bus_control.bsf
/a-z80/trunk/cpu/bus/bus_control.v
/a-z80/trunk/cpu/bus/bus_switch.bsf
/a-z80/trunk/cpu/bus/bus_switch.sv
/a-z80/trunk/cpu/bus/control_pins_n.bdf
/a-z80/trunk/cpu/bus/control_pins_n.bsf
/a-z80/trunk/cpu/bus/control_pins_n.v
/a-z80/trunk/cpu/bus/data_pins.bdf
/a-z80/trunk/cpu/bus/data_pins.bsf
/a-z80/trunk/cpu/bus/data_pins.v
/a-z80/trunk/cpu/bus/data_switch.bdf
/a-z80/trunk/cpu/bus/data_switch.bsf
/a-z80/trunk/cpu/bus/data_switch.v
/a-z80/trunk/cpu/bus/data_switch_mask.bdf
/a-z80/trunk/cpu/bus/data_switch_mask.bsf
/a-z80/trunk/cpu/bus/data_switch_mask.v
/a-z80/trunk/cpu/bus/inc_dec.bdf
/a-z80/trunk/cpu/bus/inc_dec.bsf
/a-z80/trunk/cpu/bus/inc_dec.v
/a-z80/trunk/cpu/bus/inc_dec_2bit.bdf
/a-z80/trunk/cpu/bus/inc_dec_2bit.bsf
/a-z80/trunk/cpu/bus/inc_dec_2bit.v
/a-z80/trunk/cpu/bus/simulation
/a-z80/trunk/cpu/bus/simulation/modelsim
/a-z80/trunk/cpu/bus/simulation/modelsim/r
/a-z80/trunk/cpu/bus/simulation/modelsim/test_bus.mpf
/a-z80/trunk/cpu/bus/simulation/modelsim/wave_bus.do
/a-z80/trunk/cpu/bus/simulation/modelsim/wave_pins.do
/a-z80/trunk/cpu/bus/test_bus.qpf
/a-z80/trunk/cpu/bus/test_bus.qsf
/a-z80/trunk/cpu/bus/test_bus.sv
/a-z80/trunk/cpu/bus/test_pins.sv
/a-z80/trunk/cpu/control
/a-z80/trunk/cpu/control/clk_delay.bdf
/a-z80/trunk/cpu/control/clk_delay.bsf
/a-z80/trunk/cpu/control/clk_delay.v
/a-z80/trunk/cpu/control/decode_state.bdf
/a-z80/trunk/cpu/control/decode_state.bsf
/a-z80/trunk/cpu/control/decode_state.v
/a-z80/trunk/cpu/control/execute.bsf
/a-z80/trunk/cpu/control/execute.sv
/a-z80/trunk/cpu/control/exec_matrix.i
/a-z80/trunk/cpu/control/exec_module.i
/a-z80/trunk/cpu/control/exec_zero.i
/a-z80/trunk/cpu/control/genmatrix.py
/a-z80/trunk/cpu/control/genref.py
/a-z80/trunk/cpu/control/interrupts.bdf
/a-z80/trunk/cpu/control/interrupts.bsf
/a-z80/trunk/cpu/control/interrupts.v
/a-z80/trunk/cpu/control/ir.bdf
/a-z80/trunk/cpu/control/ir.bsf
/a-z80/trunk/cpu/control/ir.v
/a-z80/trunk/cpu/control/memory_ifc.bdf
/a-z80/trunk/cpu/control/memory_ifc.bsf
/a-z80/trunk/cpu/control/memory_ifc.v
/a-z80/trunk/cpu/control/pin_control.bdf
/a-z80/trunk/cpu/control/pin_control.bsf
/a-z80/trunk/cpu/control/pin_control.v
/a-z80/trunk/cpu/control/pla_decode.bsf
/a-z80/trunk/cpu/control/pla_decode.sv
/a-z80/trunk/cpu/control/resets.bdf
/a-z80/trunk/cpu/control/resets.bsf
/a-z80/trunk/cpu/control/resets.v
/a-z80/trunk/cpu/control/sequencer.bdf
/a-z80/trunk/cpu/control/sequencer.bsf
/a-z80/trunk/cpu/control/sequencer.v
/a-z80/trunk/cpu/control/simulation
/a-z80/trunk/cpu/control/simulation/modelsim
/a-z80/trunk/cpu/control/simulation/modelsim/r
/a-z80/trunk/cpu/control/simulation/modelsim/test_control.mpf
/a-z80/trunk/cpu/control/simulation/modelsim/wave_interrupts.do
/a-z80/trunk/cpu/control/simulation/modelsim/wave_pin_control.do
/a-z80/trunk/cpu/control/simulation/modelsim/wave_reset.do
/a-z80/trunk/cpu/control/simulation/modelsim/wave_sequencer.do
/a-z80/trunk/cpu/control/test_control.qpf
/a-z80/trunk/cpu/control/test_control.qsf
/a-z80/trunk/cpu/control/test_decode.sv
/a-z80/trunk/cpu/control/test_interrupts.sv
/a-z80/trunk/cpu/control/test_pin_control.sv
/a-z80/trunk/cpu/control/test_reset.sv
/a-z80/trunk/cpu/control/test_sequencer.sv
/a-z80/trunk/cpu/control/Timings.csv
/a-z80/trunk/cpu/control/Timings.xlsm
/a-z80/trunk/cpu/control/timing_macros.i
/a-z80/trunk/cpu/registers
/a-z80/trunk/cpu/registers/reg_control.bdf
/a-z80/trunk/cpu/registers/reg_control.bsf
/a-z80/trunk/cpu/registers/reg_control.v
/a-z80/trunk/cpu/registers/reg_file.bdf
/a-z80/trunk/cpu/registers/reg_file.bsf
/a-z80/trunk/cpu/registers/reg_file.v
/a-z80/trunk/cpu/registers/reg_latch.bdf
/a-z80/trunk/cpu/registers/reg_latch.bsf
/a-z80/trunk/cpu/registers/reg_latch.v
/a-z80/trunk/cpu/registers/simulation
/a-z80/trunk/cpu/registers/simulation/modelsim
/a-z80/trunk/cpu/registers/simulation/modelsim/r
/a-z80/trunk/cpu/registers/simulation/modelsim/test_registers.mpf
/a-z80/trunk/cpu/registers/simulation/modelsim/wave_latch.do
/a-z80/trunk/cpu/registers/simulation/modelsim/wave_regfile.do
/a-z80/trunk/cpu/registers/simulation/modelsim/wave_registers.do
/a-z80/trunk/cpu/registers/test_latch.sv
/a-z80/trunk/cpu/registers/test_regfile.sv
/a-z80/trunk/cpu/registers/test_registers.qpf
/a-z80/trunk/cpu/registers/test_registers.qsf
/a-z80/trunk/cpu/registers/test_registers.sv
/a-z80/trunk/cpu/top-level-files.txt
/a-z80/trunk/cpu/toplevel
/a-z80/trunk/cpu/toplevel/core.i
/a-z80/trunk/cpu/toplevel/fuse
/a-z80/trunk/cpu/toplevel/fuse/README
/a-z80/trunk/cpu/toplevel/fuse/regress.expected
/a-z80/trunk/cpu/toplevel/fuse/regress.in
/a-z80/trunk/cpu/toplevel/fuse/tests.expected
/a-z80/trunk/cpu/toplevel/fuse/tests.in
/a-z80/trunk/cpu/toplevel/genfuse.py
/a-z80/trunk/cpu/toplevel/genglobals.py
/a-z80/trunk/cpu/toplevel/globals.i