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potato WebSVN RSS feed - potato https://lists.opencores.org/websvn//websvn/listing?repname=potato&path=%2F& Sun, 14 Jun 2026 20:12:32 +0100 FeedCreator 1.7.2 Change UART status register to include recv buffer empty This replaces ... https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=66 <div><strong>Rev 66 - skordal</strong> (1 file(s) modified)</div><div>Change UART status register to include recv buffer empty<br /> <br /> This replaces ...</div>~ /potato/trunk/soc/pp_soc_uart.vhd<br /> skordal Sat, 14 Nov 2015 22:36:21 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=66 Update platform headers and add cache control commands Cache control is ... https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=65 <div><strong>Rev 65 - skordal</strong> (5 file(s) modified)</div><div>Update platform headers and add cache control commands<br /> <br /> Cache control is ...</div>~ /potato/trunk/benchmarks/platform.h<br />~ /potato/trunk/benchmarks/potato.h<br />~ /potato/trunk/benchmarks/sha256/main.c<br />~ /potato/trunk/benchmarks/sha256/uart.c<br />~ /potato/trunk/benchmarks/start.S<br /> skordal Wed, 09 Sep 2015 15:17:26 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=65 Add display enable support for the 7-seg module https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=64 <div><strong>Rev 64 - skordal</strong> (1 file(s) modified)</div><div>Add display enable support for the 7-seg module</div>~ /potato/trunk/soc/pp_soc_7seg.vhd<br /> skordal Wed, 09 Sep 2015 15:12:22 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=64 Upgrade makefiles for use with the upgraded toolchain https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=63 <div><strong>Rev 63 - skordal</strong> (2 file(s) modified)</div><div>Upgrade makefiles for use with the upgraded toolchain</div>~ /potato/trunk/benchmarks/hello/Makefile<br />~ /potato/trunk/benchmarks/sha256/Makefile<br /> skordal Sun, 06 Sep 2015 15:20:23 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=63 Add a couple of missing signals to a sensitivity list https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=62 <div><strong>Rev 62 - skordal</strong> (1 file(s) modified)</div><div>Add a couple of missing signals to a sensitivity list</div>~ /potato/trunk/example/toplevel.vhd<br /> skordal Sun, 09 Aug 2015 14:20:53 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=62 Add 7-segment display controller to the Potato SoC https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=61 <div><strong>Rev 61 - skordal</strong> (9 file(s) modified)</div><div>Add 7-segment display controller to the Potato SoC</div>~ /potato/trunk/benchmarks/platform.h<br />~ /potato/trunk/benchmarks/sha256/main.c<br />~ /potato/trunk/benchmarks/sha256/Makefile<br />+ /potato/trunk/benchmarks/sha256/seg7.c<br />+ /potato/trunk/benchmarks/sha256/seg7.h<br />~ /potato/trunk/example/nexys4_constraints.xdc<br />~ /potato/trunk/example/toplevel.vhd<br />+ /potato/trunk/soc/pp_seg7dec.vhd<br />+ /potato/trunk/soc/pp_soc_7seg.vhd<br /> skordal Sat, 08 Aug 2015 10:56:15 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=61 Remove out-of-date comment https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=60 <div><strong>Rev 60 - skordal</strong> (1 file(s) modified)</div><div>Remove out-of-date comment</div>~ /potato/trunk/src/pp_core.vhd<br /> skordal Sat, 25 Jul 2015 18:43:17 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=60 Remove branch: &quot;new-privileged-isa&quot; https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=59 <div><strong>Rev 59 - skordal</strong> (1 file(s) modified)</div><div>Remove branch: &quot;new-privileged-isa&quot;</div>- /potato/branches/new-privileged-isa<br /> skordal Sun, 05 Jul 2015 17:31:52 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=59 Merge branch new-privileged-isa (r48-r57) into trunk This adds support for the ... https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=58 <div><strong>Rev 58 - skordal</strong> (39 file(s) modified)</div><div>Merge branch new-privileged-isa (r48-r57) into trunk<br /> <br /> This adds support for the ...</div>~ /potato/trunk<br />~ /potato/trunk/benchmarks/benchmark.ld<br />~ /potato/trunk/benchmarks/potato.h<br />~ /potato/trunk/benchmarks/sha256/main.c<br />~ /potato/trunk/benchmarks/sha256/Makefile<br />~ /potato/trunk/benchmarks/start.S<br />+ /potato/trunk/docs/datasheet.pdf<br />+ /potato/trunk/docs/datasheet.tex<br />+ /potato/trunk/docs/diagram.png<br />+ /potato/trunk/docs/example.png<br />- /potato/trunk/docs/manual.tex<br />+ /potato/trunk/docs/opencores.png<br />~ /potato/trunk/example/toplevel.vhd<br />~ /potato/trunk/Makefile<br />~ /potato/trunk/riscv-tests/encoding.h<br />+ /potato/trunk/riscv-tests/hwacha_xcpt.h<br />+ /potato/trunk/riscv-tests/lui.S<br />+ /potato/trunk/riscv-tests/ma_addr.S<br />~ /potato/trunk/riscv-tests/README<br />~ /potato/trunk/riscv-tests/riscv_test.h<br />+ /potato/trunk/riscv-tests/sbreak.S<br />+ /potato/trunk/riscv-tests/scall.S<br />~ /potato/trunk/riscv-tests/test_macros.h<br />~ /potato/trunk/src/pp_control_unit.vhd<br />~ /potato/trunk/src/pp_core.vhd<br />~ /potato/trunk/src/pp_csr.vhd<br />~ /potato/trunk/src/pp_csr_unit.vhd<br />~ /potato/trunk/src/pp_decode.vhd<br />~ /potato/trunk/src/pp_execute.vhd<br />~ /potato/trunk/src/pp_fetch.vhd<br />~ /potato/trunk/src/pp_memory.vhd<br />~ /potato/trunk/src/pp_potato.vhd<br />~ /potato/trunk/testbenches/tb_processor.vhd<br />~ /potato/trunk/testbenches/tb_soc.vhd<br />~ /potato/trunk/tests.ld<br />- /potato/trunk/tests/sbreak.S<br />- /potato/trunk/tests/scall.S<br />~ /potato/trunk/tests/sw-jal.S<br />+ /potato/trunk/tests/timer.S<br /> skordal Sun, 05 Jul 2015 14:40:25 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=58 Add processor datasheet https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=57 <div><strong>Rev 57 - skordal</strong> (5 file(s) modified)</div><div>Add processor datasheet</div>+ /potato/branches/new-privileged-isa/docs/datasheet.pdf<br />+ /potato/branches/new-privileged-isa/docs/datasheet.tex<br />+ /potato/branches/new-privileged-isa/docs/diagram.png<br />+ /potato/branches/new-privileged-isa/docs/example.png<br />+ /potato/branches/new-privileged-isa/docs/opencores.png<br /> skordal Sun, 05 Jul 2015 14:19:29 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=57 Remove old and outdated processor manual https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=56 <div><strong>Rev 56 - skordal</strong> (1 file(s) modified)</div><div>Remove old and outdated processor manual</div>- /potato/branches/new-privileged-isa/docs/manual.tex<br /> skordal Sun, 05 Jul 2015 13:44:35 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=56 Use timer_clk for the example design and SoC testbench https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=55 <div><strong>Rev 55 - skordal</strong> (3 file(s) modified)</div><div>Use timer_clk for the example design and SoC testbench</div>~ /potato/branches/new-privileged-isa/example/toplevel.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_potato.vhd<br />~ /potato/branches/new-privileged-isa/testbenches/tb_soc.vhd<br /> skordal Sun, 05 Jul 2015 12:29:17 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=55 Update benchmarks to work with supervisor spec v1.7 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=54 <div><strong>Rev 54 - skordal</strong> (5 file(s) modified)</div><div>Update benchmarks to work with supervisor spec v1.7</div>~ /potato/branches/new-privileged-isa/benchmarks/benchmark.ld<br />~ /potato/branches/new-privileged-isa/benchmarks/potato.h<br />~ /potato/branches/new-privileged-isa/benchmarks/sha256/main.c<br />~ /potato/branches/new-privileged-isa/benchmarks/sha256/Makefile<br />~ /potato/branches/new-privileged-isa/benchmarks/start.S<br /> skordal Tue, 30 Jun 2015 22:13:44 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=54 Upgrade processor core to conform to the supervisor spec v1.7 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=53 <div><strong>Rev 53 - skordal</strong> (11 file(s) modified)</div><div>Upgrade processor core to conform to the supervisor spec v1.7</div>~ /potato/branches/new-privileged-isa/src/pp_control_unit.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_core.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_csr.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_csr_unit.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_decode.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_execute.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_fetch.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_memory.vhd<br />~ /potato/branches/new-privileged-isa/src/pp_potato.vhd<br />~ /potato/branches/new-privileged-isa/testbenches/tb_processor.vhd<br />~ /potato/branches/new-privileged-isa/testbenches/tb_soc.vhd<br /> skordal Sun, 28 Jun 2015 21:20:47 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=53 Correct .data section of sw-jal test https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=52 <div><strong>Rev 52 - skordal</strong> (1 file(s) modified)</div><div>Correct .data section of sw-jal test</div>~ /potato/branches/new-privileged-isa/tests/sw-jal.S<br /> skordal Sun, 28 Jun 2015 21:16:40 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=52 Add scall/ecall, sbreak/ebreak and timer interrupt tests https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=51 <div><strong>Rev 51 - skordal</strong> (4 file(s) modified)</div><div>Add scall/ecall, sbreak/ebreak and timer interrupt tests</div>~ /potato/branches/new-privileged-isa/Makefile<br />+ /potato/branches/new-privileged-isa/riscv-tests/sbreak.S<br />+ /potato/branches/new-privileged-isa/riscv-tests/scall.S<br />+ /potato/branches/new-privileged-isa/tests/timer.S<br /> skordal Sun, 28 Jun 2015 21:14:45 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=51 Update test environment to the new supervisor ISA https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=50 <div><strong>Rev 50 - skordal</strong> (13 file(s) modified)</div><div>Update test environment to the new supervisor ISA</div>~ /potato/branches/new-privileged-isa/Makefile<br />~ /potato/branches/new-privileged-isa/riscv-tests/encoding.h<br />+ /potato/branches/new-privileged-isa/riscv-tests/hwacha_xcpt.h<br />+ /potato/branches/new-privileged-isa/riscv-tests/lui.S<br />+ /potato/branches/new-privileged-isa/riscv-tests/ma_addr.S<br />~ /potato/branches/new-privileged-isa/riscv-tests/README<br />~ /potato/branches/new-privileged-isa/riscv-tests/riscv_test.h<br />~ /potato/branches/new-privileged-isa/riscv-tests/test_macros.h<br />~ /potato/branches/new-privileged-isa/testbenches/tb_processor.vhd<br />~ /potato/branches/new-privileged-isa/testbenches/tb_soc.vhd<br />~ /potato/branches/new-privileged-isa/tests.ld<br />- /potato/branches/new-privileged-isa/tests/sbreak.S<br />- /potato/branches/new-privileged-isa/tests/scall.S<br /> skordal Tue, 16 Jun 2015 20:58:06 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=50 Correct spelling of &quot;privileged&quot; https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=49 <div><strong>Rev 49 - skordal</strong> (2 file(s) modified)</div><div>Correct spelling of &quot;privileged&quot;</div>- /potato/branches/new-priviledged-isa<br />+ /potato/branches/new-privileged-isa<br /> skordal Sat, 06 Jun 2015 21:39:04 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=49 Create branch for upgrading to the new privileged ISA https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=48 <div><strong>Rev 48 - skordal</strong> (1 file(s) modified)</div><div>Create branch for upgrading to the new privileged ISA</div>+ /potato/branches/new-priviledged-isa<br /> skordal Sat, 06 Jun 2015 21:35:16 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=48 Tag version 0.1 of the Potato Processor https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=47 <div><strong>Rev 47 - skordal</strong> (1 file(s) modified)</div><div>Tag version 0.1 of the Potato Processor</div>+ /potato/tags/v0.1<br /> skordal Sat, 06 Jun 2015 13:53:36 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=potato&path=%2F&rev=47
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