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sata_controller_core WebSVN RSS feed - sata_controller_core https://lists.opencores.org/websvn//websvn/listing?repname=sata_controller_core&path=%2Fsata_controller_core%2F& Thu, 29 Feb 2024 19:30:23 +0100 FeedCreator 1.7.2 Updated variable type of 'size' field in 'sata_dev' struct from ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=17 <div><strong>Rev 17 - bhuang2</strong> (1 file(s) modified)</div><div>Updated variable type of 'size' field in <br /> 'sata_dev' struct from ...</div>~ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_drv.h<br /> bhuang2 Tue, 07 May 2013 01:11:07 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=17 Changed SATA_MINOR from 2 to 16. https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=16 <div><strong>Rev 16 - bhuang2</strong> (1 file(s) modified)</div><div>Changed SATA_MINOR from 2 to 16.</div>~ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_drv.h<br /> bhuang2 Sat, 04 May 2013 17:23:58 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=16 Updated the configuration file for correct control register mapping. Bin https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=15 <div><strong>Rev 15 - bhuang2</strong> (1 file(s) modified)</div><div>Updated the configuration file for correct<br /> control register mapping. <br /> <br /> Bin</div>~ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_cfg.h<br /> bhuang2 Mon, 29 Apr 2013 16:38:57 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=15 Initial upload of block device driver for SATA core. To-do: Write a ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=14 <div><strong>Rev 14 - bhuang2</strong> (4 file(s) modified)</div><div>Initial upload of block device driver for SATA core.<br /> <br /> To-do:<br /> Write a ...</div>+ /sata_controller_core/trunk/sata2_driver_v1_00_a/Makefile<br />+ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_cfg.h<br />+ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_drv.c<br />+ /sata_controller_core/trunk/sata2_driver_v1_00_a/sata_drv.h<br /> bhuang2 Fri, 02 Nov 2012 00:05:17 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=14 bug fix https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=13 <div><strong>Rev 13 - ashwin_mendon</strong> (2 file(s) modified)</div><div>bug fix</div>~ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl/sata_link_layer.vhd<br />~ /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl/vhdl/sata_link_layer.vhd<br /> ashwin_mendon Mon, 09 Jul 2012 17:50:38 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=13 ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=12 <div><strong>Rev 12 - ashwin_mendon</strong> (2 file(s) modified)</div><div>...</div>~ /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl/vhdl/sata_core.vhd<br />~ /sata_controller_core/trunk/sata2_fifo_v1_00_a/netlist/user_fifo.xco<br /> ashwin_mendon Wed, 27 Jun 2012 22:57:45 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=12 added base_system https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=11 <div><strong>Rev 11 - ashwin_mendon</strong> (126 file(s) modified)</div><div>added base_system</div>+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/blockdiagram<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/ChipScope<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/ChipScope/project.cpj<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/data<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/data/system.ucf<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/etc<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/etc/bitgen.ut<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/etc/download.cmd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/etc/fast_runtime.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/init_bram.sh<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/.lso<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/coregen.cgp<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/Makefile<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/npi_if_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/npi_if_tx_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/npi_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/rx_fifo.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/coregen/tx_fifo.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/data<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/data/npi_core_v2_1_0.bbd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/data/npi_core_v2_1_0.mpd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/data/npi_core_v2_1_0.pao<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/devl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/devl/create.cip<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/devl/ipwiz.log<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/devl/ipwiz.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/devl/README.txt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/hdl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/hdl/vhdl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/hdl/vhdl/npi.vhd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/hdl/vhdl/npi_core.vhd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/npi_core_v1_00_a/netlist<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/.lso<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/cmd_layer_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/coregen.cgp<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/Makefile<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/oob_control_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/read_write_fifo.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/rx_tx_fifo.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/sata_phy_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/sata_rx_frame_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/sata_tx_frame_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/user_fifo.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/coregen/user_logic_ila.xco<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/data<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/data/sata_core_v2_1_0.bbd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/data/sata_core_v2_1_0.mpd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/data/sata_core_v2_1_0.pao<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/devl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/devl/create.cip<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/devl/ipwiz.log<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/devl/ipwiz.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/devl/README.txt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/mgt_usrclk_source_mmcm.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/mux_21.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/mux_41.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/oob_control.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/sata_gtx.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/sata_gtx_dual.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/verilog/sata_phy.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl/command_layer.vhd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl/crc.vhd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl/mux_161.vhd<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/pcores/sata_core_v1_00_a/hdl/vhdl/sata_core.vhd<br />+ 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/sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/.dswkshop/MdtTinySvgBLKD_Processors.xsl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/.dswkshop/MdtTinySvgDiag_BifShapes.xsl<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/bitinit.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_generation_errors.txt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_params.v<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_table.txt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/ise<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/ise/system.xreport<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/ise/xmsgprops.lst<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/ise/_xmsgs<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/libgen.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/platgen.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/sata_test_compiler.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/simgen.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/system.filters<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/system.gui<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/system.xml<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/testapp_memory_microblaze_0_compiler.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/testapp_peripheral_microblaze_0_compiler.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/xplorer.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/xpsxflow.opt<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/block_diagram.pdf<br />+ /sata_controller_core/trunk/sata2_bus_v1_00_a/README<br /> ashwin_mendon Wed, 13 Jun 2012 14:04:13 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=11 ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=10 <div><strong>Rev 10 - ashwin_mendon</strong> (1 file(s) modified)</div><div>...</div>~ /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl/vhdl/sata_link_layer.vhd<br /> ashwin_mendon Sun, 10 Jun 2012 16:18:30 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=10 ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=9 <div><strong>Rev 9 - ashwin_mendon</strong> (1 file(s) modified)</div><div>...</div>+ /sata_controller_core/trunk/sata2_bus_v1_00_a<br /> ashwin_mendon Tue, 29 May 2012 21:06:18 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=9 ... https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=8 <div><strong>Rev 8 - ashwin_mendon</strong> (1 file(s) modified)</div><div>...</div>- /sata_controller_core/trunk/sata2_plb_v1_00_a<br /> ashwin_mendon Tue, 29 May 2012 21:05:36 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=8 corrected https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=7 <div><strong>Rev 7 - ashwin_mendon</strong> (1 file(s) modified)</div><div>corrected</div>~ /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl/vhdl/sata_core.vhd<br /> ashwin_mendon Mon, 28 May 2012 16:42:01 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=7 placeholders for PLB and driver directories https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=6 <div><strong>Rev 6 - rsass</strong> (2 file(s) modified)</div><div>placeholders for PLB and driver directories</div>+ /sata_controller_core/trunk/sata2_driver_v1_00_a<br />+ /sata_controller_core/trunk/sata2_plb_v1_00_a<br /> rsass Wed, 25 Apr 2012 14:20:48 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=6 put sata core with locallink interface in sata2_fifo dir https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=5 <div><strong>Rev 5 - rsass</strong> (14 file(s) modified)</div><div>put sata core with locallink interface in sata2_fifo dir</div>- /sata_controller_core/trunk/COPYING3<br />- /sata_controller_core/trunk/doc<br />- /sata_controller_core/trunk/etc<br />- /sata_controller_core/trunk/hdl<br />- /sata_controller_core/trunk/netlist<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/COPYING3<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/doc<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/etc<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/netlist<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/syn<br />+ /sata_controller_core/trunk/sata2_fifo_v1_00_a/ucf<br />- /sata_controller_core/trunk/syn<br />- /sata_controller_core/trunk/ucf<br /> rsass Wed, 25 Apr 2012 14:19:28 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=5 Starting to reorganize for additional cores/source https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=4 <div><strong>Rev 4 - rsass</strong> (1 file(s) modified)</div><div>Starting to reorganize for additional cores/source</div>+ /sata_controller_core/trunk/sata2_fifo_v1_00_a<br /> rsass Wed, 25 Apr 2012 14:17:35 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=4 cleaned code https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=3 <div><strong>Rev 3 - ashwin_mendon</strong> (3 file(s) modified)</div><div>cleaned code</div>~ /sata_controller_core/trunk/hdl/verilog/oob_control.v<br />~ /sata_controller_core/trunk/hdl/verilog/sata_gtx.v<br />~ /sata_controller_core/trunk/hdl/verilog/sata_phy.v<br /> ashwin_mendon Thu, 19 Apr 2012 00:05:39 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=3 Added Source Files https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=2 <div><strong>Rev 2 - ashwin_mendon</strong> (35 file(s) modified)</div><div>Added Source Files</div>+ /sata_controller_core/trunk/COPYING3<br />+ /sata_controller_core/trunk/doc<br />+ /sata_controller_core/trunk/doc/README<br />+ /sata_controller_core/trunk/etc<br />+ /sata_controller_core/trunk/etc/bitgen.ut<br />+ /sata_controller_core/trunk/hdl<br />+ /sata_controller_core/trunk/hdl/verilog<br />+ /sata_controller_core/trunk/hdl/verilog/mgt_usrclk_source_mmcm.v<br />+ /sata_controller_core/trunk/hdl/verilog/mux_21.v<br />+ /sata_controller_core/trunk/hdl/verilog/mux_41.v<br />+ /sata_controller_core/trunk/hdl/verilog/oob_control.v<br />+ /sata_controller_core/trunk/hdl/verilog/sata_gtx.v<br />+ /sata_controller_core/trunk/hdl/verilog/sata_gtx_dual.v<br />+ /sata_controller_core/trunk/hdl/verilog/sata_phy.v<br />+ /sata_controller_core/trunk/hdl/vhdl<br />+ /sata_controller_core/trunk/hdl/vhdl/command_layer.vhd<br />+ /sata_controller_core/trunk/hdl/vhdl/crc.vhd<br />+ /sata_controller_core/trunk/hdl/vhdl/mux_161.vhd<br />+ /sata_controller_core/trunk/hdl/vhdl/sata_core.vhd<br />+ /sata_controller_core/trunk/hdl/vhdl/sata_link_layer.vhd<br />+ /sata_controller_core/trunk/hdl/vhdl/scrambler.vhd<br />+ /sata_controller_core/trunk/netlist<br />+ /sata_controller_core/trunk/netlist/.lso<br />+ /sata_controller_core/trunk/netlist/coregen.cgp<br />+ /sata_controller_core/trunk/netlist/Makefile<br />+ /sata_controller_core/trunk/netlist/read_write_fifo.xco<br />+ /sata_controller_core/trunk/netlist/rx_tx_fifo.xco<br />+ /sata_controller_core/trunk/netlist/user_fifo.xco<br />+ /sata_controller_core/trunk/syn<br />+ /sata_controller_core/trunk/syn/.lso<br />+ /sata_controller_core/trunk/syn/Makefile<br />+ /sata_controller_core/trunk/syn/sata_core.prj<br />+ /sata_controller_core/trunk/syn/sata_core.scr<br />+ /sata_controller_core/trunk/ucf<br />+ /sata_controller_core/trunk/ucf/sata_core.ucf<br /> ashwin_mendon Wed, 11 Apr 2012 22:10:11 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=2 The project and the structure was created https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=1 <div><strong>Rev 1 - root</strong> (4 file(s) modified)</div><div>The project and the structure was created</div>+ /sata_controller_core<br />+ /sata_controller_core/branches<br />+ /sata_controller_core/tags<br />+ /sata_controller_core/trunk<br /> root Tue, 06 Mar 2012 14:45:02 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=sata_controller_core&path=%2Fsata_controller_core%2F&rev=1
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