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        <title>t6507lp</title>
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        <link>https://lists.opencores.org/websvn//websvn/listing?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;</link>
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        <item>
            <title>The RTI instruction is working fine. Coded and simulated.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=105</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 105 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;The RTI instruction is working fine. Coded and simulated.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Tue, 24 Mar 2009 15:26:03 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=105</guid>
        </item>
        <item>
            <title>The BRK instruction is working. The reset vector was tested ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=104</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 104 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;The BRK instruction is working. The reset vector was tested ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Tue, 24 Mar 2009 13:33:24 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=104</guid>
        </item>
        <item>
            <title>Some early modifications to support the special stack instructions.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=103</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 103 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Some early modifications to support the special stack instructions.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 20:03:19 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=103</guid>
        </item>
        <item>
            <title>Some early modifications to support the special stack instructions.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=102</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 102 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Some early modifications to support the special stack instructions.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 17:09:38 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=102</guid>
        </item>
        <item>
            <title>Absolute indirect addressing mode is coded and simulated.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=101</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 101 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indirect addressing mode is coded and simulated.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 13:42:49 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=101</guid>
        </item>
        <item>
            <title>IDY WRITE TYPE instructions are coded and simulated.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=100</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 100 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;IDY WRITE TYPE instructions are coded and simulated.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 12:40:58 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=100</guid>
        </item>
        <item>
            <title>Only Package.v should be used.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=99</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 99 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Only Package.v should be used.&lt;/div&gt;- /t6507lp/trunk/rtl/verilog/T6507LP_Package.h&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 12:10:46 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=99</guid>
        </item>
        <item>
            <title>Updated status and some comments.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=98</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 98 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Updated status and some comments.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 12:10:16 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=98</guid>
        </item>
        <item>
            <title>Removed obsolete TODO.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=97</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 97 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Removed obsolete TODO.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/T6507LP_Package.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Mon, 23 Mar 2009 12:09:17 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=97</guid>
        </item>
        <item>
            <title>IDY READ TYPE  instructions are coded and simulated.
IDY WRITE ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=96</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 96 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;IDY READ TYPE  instructions are coded and simulated.&lt;br /&gt;
IDY WRITE ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Fri, 20 Mar 2009 20:32:38 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=96</guid>
        </item>
        <item>
            <title>IDX addressing mode is also 100%, coded and simulated.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=95</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 95 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;IDX addressing mode is also 100%, coded and simulated.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Fri, 20 Mar 2009 16:54:42 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=95</guid>
        </item>
        <item>
            <title>Relative addressing mode is almost 100% functional.
It just needs another ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=94</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 94 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Relative addressing mode is almost 100% functional.&lt;br /&gt;
It just needs another ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 20:18:00 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=94</guid>
        </item>
        <item>
            <title>Opcode for BNE was wrong.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=93</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 93 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Opcode for BNE was wrong.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/T6507LP_Package.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 18:51:12 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=93</guid>
        </item>
        <item>
            <title>Absolute indexed mode working properly. All cases were simulated.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=92</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 92 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indexed mode working properly. All cases were simulated.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 14:03:32 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=92</guid>
        </item>
        <item>
            <title>Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page IS crossed ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=91</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 91 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page IS crossed ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 13:55:13 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=91</guid>
        </item>
        <item>
            <title>CMP, CPX and CPY affect carry flag (in this case ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=90</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 90 - gabrieloshiro&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;CMP, CPX and CPY affect carry flag (in this case ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/T6507LP_ALU.v&lt;br /&gt;</description>
            <author>gabrieloshiro</author>
            <pubDate>Thu, 19 Mar 2009 13:16:16 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=90</guid>
        </item>
        <item>
            <title>Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page is NOT ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=89</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 89 - creep&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page is NOT ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 13:09:25 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=89</guid>
        </item>
        <item>
            <title>Absolute indexed mode, READ TYPE instruction when page IS crossed ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=88</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 88 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indexed mode, READ TYPE instruction when page IS crossed ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Thu, 19 Mar 2009 12:35:51 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=88</guid>
        </item>
        <item>
            <title>Absolute indexed mode, READ TYPE instruction when no page is ...</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=87</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 87 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Absolute indexed mode, READ TYPE instruction when no page is ...&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Wed, 18 Mar 2009 21:06:17 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=87</guid>
        </item>
        <item>
            <title>Zero page indexed mode is working fine.</title>
            <link>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=86</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 86 - creep&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Zero page indexed mode is working fine.&lt;/div&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v&lt;br /&gt;~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v&lt;br /&gt;</description>
            <author>creep</author>
            <pubDate>Wed, 18 Mar 2009 17:42:18 +0100</pubDate>
            <guid>https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&amp;path=%2Ft6507lp%2Ftrunk%2Frtl%2F&amp;rev=86</guid>
        </item>
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