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t6507lp WebSVN RSS feed - t6507lp https://lists.opencores.org/websvn//websvn/listing?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F& Tue, 10 Mar 2026 00:41:09 +0100 FeedCreator 1.7.2 This time ADC decimal should be working properly and SBC ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=181 <div><strong>Rev 181 - gabrieloshiro</strong> (2 file(s) modified)</div><div>This time ADC decimal should be working properly and SBC ...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Wed, 08 Apr 2009 17:50:04 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=181 STA, STY and STX fixed https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=179 <div><strong>Rev 179 - gabrieloshiro</strong> (2 file(s) modified)</div><div>STA, STY and STX fixed</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Wed, 08 Apr 2009 15:15:10 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=179 STA, STY and STX fixed https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=178 <div><strong>Rev 178 - gabrieloshiro</strong> (2 file(s) modified)</div><div>STA, STY and STX fixed</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Wed, 08 Apr 2009 15:08:03 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=178 RTI works for me https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=176 <div><strong>Rev 176 - gabrieloshiro</strong> (2 file(s) modified)</div><div>RTI works for me</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Wed, 08 Apr 2009 12:20:58 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=176 PLP and RTI should be working according to stella now. ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=175 <div><strong>Rev 175 - gabrieloshiro</strong> (1 file(s) modified)</div><div>PLP and RTI should be working according to stella now. ...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Tue, 07 Apr 2009 16:36:12 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=175 SBC borrow flag bug fixed... again https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=174 <div><strong>Rev 174 - gabrieloshiro</strong> (2 file(s) modified)</div><div>SBC borrow flag bug fixed... again</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Tue, 07 Apr 2009 16:15:19 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=174 SBC bug fixed. Borrow should be working properly. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=173 <div><strong>Rev 173 - gabrieloshiro</strong> (2 file(s) modified)</div><div>SBC bug fixed. Borrow should be working properly.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Tue, 07 Apr 2009 15:45:14 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=173 RTI supported to be compatible with stella https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=172 <div><strong>Rev 172 - gabrieloshiro</strong> (1 file(s) modified)</div><div>RTI supported to be compatible with stella</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Tue, 07 Apr 2009 13:39:57 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=172 Removed debug messages. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=171 <div><strong>Rev 171 - creep</strong> (1 file(s) modified)</div><div>Removed debug messages.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> creep Tue, 07 Apr 2009 12:55:12 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=171 ADC bugs finally fixed. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=169 <div><strong>Rev 169 - gabrieloshiro</strong> (2 file(s) modified)</div><div>ADC bugs finally fixed.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Mon, 06 Apr 2009 20:35:54 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=169 RTI fixed! now ALU doesn`t support RTI instruction anymore. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=168 <div><strong>Rev 168 - gabrieloshiro</strong> (1 file(s) modified)</div><div>RTI fixed! now ALU doesn`t support RTI instruction anymore.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 06 Apr 2009 19:21:09 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=168 Now SBC is supposed to work. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=167 <div><strong>Rev 167 - gabrieloshiro</strong> (1 file(s) modified)</div><div>Now SBC is supposed to work.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 06 Apr 2009 18:44:54 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=167 Commiting again! https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=166 <div><strong>Rev 166 - gabrieloshiro</strong> (1 file(s) modified)</div><div>Commiting again!</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 06 Apr 2009 18:34:53 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=166 SBC and PHP fixed! https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=165 <div><strong>Rev 165 - gabrieloshiro</strong> (2 file(s) modified)</div><div>SBC and PHP fixed!</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Mon, 06 Apr 2009 18:28:14 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=165 ADC with decimal mode bug... is it ok now? https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=164 <div><strong>Rev 164 - gabrieloshiro</strong> (2 file(s) modified)</div><div>ADC with decimal mode bug... is it ok now?</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Mon, 06 Apr 2009 17:20:30 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=164 Still having bugs on ADC with decimal flag! Is it ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=163 <div><strong>Rev 163 - gabrieloshiro</strong> (1 file(s) modified)</div><div>Still having bugs on ADC with decimal flag! Is it ...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 06 Apr 2009 16:21:24 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=163 ADC with decimal mode ON, bug fixed! https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=162 <div><strong>Rev 162 - gabrieloshiro</strong> (1 file(s) modified)</div><div>ADC with decimal mode ON, bug fixed!</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 06 Apr 2009 16:16:28 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=162 Sum and subtract were wrong when D flag was HIGH. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=161 <div><strong>Rev 161 - gabrieloshiro</strong> (2 file(s) modified)</div><div>Sum and subtract were wrong when D flag was HIGH.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Mon, 06 Apr 2009 15:29:51 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=161 Bug 28 fixed. PHA was not coping the register to ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=158 <div><strong>Rev 158 - gabrieloshiro</strong> (2 file(s) modified)</div><div>Bug 28 fixed. PHA was not coping the register to ...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v<br /> gabrieloshiro Fri, 03 Apr 2009 19:05:40 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=158 ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=157 <div><strong>Rev 157 - gabrieloshiro</strong> (1 file(s) modified)</div><div>...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Fri, 03 Apr 2009 18:40:30 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=157

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