OpenCores

URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Error creating feed file, please check write permissions.
t6507lp WebSVN RSS feed - t6507lp https://lists.opencores.org/websvn//websvn/listing?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F& Sun, 12 Apr 2026 13:15:27 +0100 FeedCreator 1.7.2 Fixed the input parametric testing logic, removed a pad. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=258 <div><strong>Rev 258 - creep</strong> (2 file(s) modified)</div><div>Fixed the input parametric testing logic, removed a pad.</div>~ /t6507lp/trunk/rtl/verilog/stubs.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_io.v<br /> creep Fri, 28 Aug 2009 19:30:18 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=258 Changed the PADS verilog description to minimize violations https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=255 <div><strong>Rev 255 - creep</strong> (2 file(s) modified)</div><div>Changed the PADS verilog description to minimize violations</div>~ /t6507lp/trunk/rtl/verilog/stubs.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_io.v<br /> creep Thu, 06 Aug 2009 16:40:36 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=255 Fixed a latch in the design https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=254 <div><strong>Rev 254 - creep</strong> (1 file(s) modified)</div><div>Fixed a latch in the design</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v<br /> creep Thu, 06 Aug 2009 16:39:44 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=254 Changed the rw_mem signal name in the hierarchy https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=253 <div><strong>Rev 253 - creep</strong> (1 file(s) modified)</div><div>Changed the rw_mem signal name in the hierarchy</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v<br /> creep Tue, 14 Jul 2009 16:06:56 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=253 Added a stubs file for the pads. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=252 <div><strong>Rev 252 - creep</strong> (2 file(s) modified)</div><div>Added a stubs file for the pads.</div>+ /t6507lp/trunk/rtl/verilog/stubs.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_io.v<br /> creep Tue, 14 Jul 2009 15:53:35 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=252 Added the io wrapper https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=251 <div><strong>Rev 251 - creep</strong> (2 file(s) modified)</div><div>Added the io wrapper</div>~ /t6507lp/trunk/rtl/verilog/t6507lp.v<br />+ /t6507lp/trunk/rtl/verilog/t6507lp_io.v<br /> creep Tue, 14 Jul 2009 13:03:27 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=251 Added some older files plus the first syn script https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=246 <div><strong>Rev 246 - creep</strong> (4 file(s) modified)</div><div>Added some older files plus the first syn script</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v<br />~ /t6507lp/trunk/rtl/verilog/video.v<br />+ /t6507lp/trunk/syn/cadence/scripts/rc_script.cmd<br /> creep Tue, 07 Jul 2009 13:17:43 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=246 Fixing STA_IDY bug https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=243 <div><strong>Rev 243 - creep</strong> (1 file(s) modified)</div><div>Fixing STA_IDY bug</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v<br /> creep Tue, 26 May 2009 20:23:33 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=243 Bug regardind the STA_IDY opcode https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=242 <div><strong>Rev 242 - creep</strong> (1 file(s) modified)</div><div>Bug regardind the STA_IDY opcode</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_fsm.v<br /> creep Tue, 26 May 2009 16:45:11 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=242 Zero flag fixed for SBC while in Decimal Mode. Bug ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=239 <div><strong>Rev 239 - gabrieloshiro</strong> (1 file(s) modified)</div><div>Zero flag fixed for SBC while in Decimal Mode. Bug ...</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> gabrieloshiro Mon, 25 May 2009 15:05:55 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=239 ALU file is linted. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=238 <div><strong>Rev 238 - creep</strong> (2 file(s) modified)</div><div>ALU file is linted.</div>~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/video.v<br /> creep Fri, 22 May 2009 17:40:03 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=238 Added a preliminary collision detection logic. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=237 <div><strong>Rev 237 - creep</strong> (2 file(s) modified)</div><div>Added a preliminary collision detection logic.</div>~ /t6507lp/trunk/rtl/verilog/controller_test.v<br />~ /t6507lp/trunk/rtl/verilog/video.v<br /> creep Thu, 21 May 2009 16:36:14 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=237 Added the video converter testbench to the repository. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=236 <div><strong>Rev 236 - creep</strong> (1 file(s) modified)</div><div>Added the video converter testbench to the repository.</div>+ /t6507lp/trunk/rtl/verilog/video_converter_tb.v<br /> creep Thu, 21 May 2009 13:11:47 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=236 Bug #60: added a brief simulation to the video_converter module. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=235 <div><strong>Rev 235 - creep</strong> (3 file(s) modified)</div><div>Bug #60: added a brief simulation to the video_converter module.</div>~ /t6507lp/trunk/fv/alu_chk.e<br />~ /t6507lp/trunk/rtl/verilog/video.v<br />~ /t6507lp/trunk/rtl/verilog/video_converter.v<br /> creep Wed, 20 May 2009 19:44:41 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=235 SBC Decimal mode 100% verified. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=234 <div><strong>Rev 234 - creep</strong> (2 file(s) modified)</div><div>SBC Decimal mode 100% verified.</div>~ /t6507lp/trunk/fv/alu_chk.e<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br /> creep Fri, 15 May 2009 17:53:46 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=234 ADC and SBC are 100% verified in regular mode. Decimal ... https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=233 <div><strong>Rev 233 - creep</strong> (6 file(s) modified)</div><div>ADC and SBC are 100% verified in regular mode. Decimal ...</div>~ /t6507lp/trunk/fv/alu_chk.e<br />~ /t6507lp/trunk/fv/alu_input.e<br />~ /t6507lp/trunk/rtl/verilog/controller_test.v<br />~ /t6507lp/trunk/rtl/verilog/t6507lp_alu.v<br />~ /t6507lp/trunk/rtl/verilog/test_top.v<br />~ /t6507lp/trunk/rtl/verilog/vga_controller.v<br /> creep Fri, 15 May 2009 13:57:49 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=233 New video test. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=232 <div><strong>Rev 232 - creep</strong> (3 file(s) modified)</div><div>New video test.</div>~ /t6507lp/trunk/rtl/verilog/controller_test.v<br />~ /t6507lp/trunk/rtl/verilog/test_top.v<br />~ /t6507lp/trunk/rtl/verilog/vga_controller.v<br /> creep Wed, 13 May 2009 19:55:07 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=232 Minor bugs fixed. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=231 <div><strong>Rev 231 - gabrieloshiro</strong> (2 file(s) modified)</div><div>Minor bugs fixed.</div>~ /t6507lp/trunk/rtl/verilog/controller_test.v<br />~ /t6507lp/trunk/rtl/verilog/test_top.v<br /> gabrieloshiro Wed, 13 May 2009 18:17:33 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=231 Changed TIA behavior. It is now pixel-based. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=230 <div><strong>Rev 230 - creep</strong> (3 file(s) modified)</div><div>Changed TIA behavior. It is now pixel-based.</div>~ /t6507lp/trunk/rtl/verilog/controller_test.v<br />~ /t6507lp/trunk/rtl/verilog/test_top.v<br />~ /t6507lp/trunk/rtl/verilog/vga_controller.v<br /> creep Wed, 13 May 2009 18:12:37 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=230 Created a one-line pattern. https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=229 <div><strong>Rev 229 - creep</strong> (1 file(s) modified)</div><div>Created a one-line pattern.</div>~ /t6507lp/trunk/rtl/verilog/vga_controller.v<br /> creep Wed, 13 May 2009 13:35:29 +0100 https://lists.opencores.org/websvn//websvn/revision?repname=t6507lp&path=%2Ft6507lp%2Ftrunk%2Frtl%2F&rev=229

Browse

Tools